EP2342959A1 - Verfahren zur integration eines elektronischen bauteils in eine leiterplatte - Google Patents
Verfahren zur integration eines elektronischen bauteils in eine leiterplatteInfo
- Publication number
- EP2342959A1 EP2342959A1 EP09756396A EP09756396A EP2342959A1 EP 2342959 A1 EP2342959 A1 EP 2342959A1 EP 09756396 A EP09756396 A EP 09756396A EP 09756396 A EP09756396 A EP 09756396A EP 2342959 A1 EP2342959 A1 EP 2342959A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- holes
- electronic component
- adhesive
- openings
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
- H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
- H05K1/185—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
- H05K1/188—Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
- H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
- H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/42—Printed circuits
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/30—Organic materials
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2103/00—Materials to be soldered, welded or cut
- B23K2103/50—Inorganic materials other than metals or composite materials
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0554—Metal used as mask for etching vias, e.g. by laser ablation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/303—Assembling printed circuits with electric components, e.g. with resistors with surface mounted components
- H05K3/305—Affixing by adhesive
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
- H10W72/325—Die-attach connectors having a filler embedded in a matrix
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1056—Perforating lamina
Definitions
- the present invention relates to a method for integrating an electronic component into a printed circuit board, comprising the following steps:
- the present invention therefore aims to avoid the disadvantages of the method of the above-mentioned type according to the prior art, and aims in particular to further develop and improve a method of the type mentioned in that a reliable removal of the in bores or ., Openings corresponding to the contacts of an electronic component to be integrated adhesive, which Fixing the component to a supporting layer is used, can be achieved quickly and with simple and conveniently in connection with the production of a printed circuit board per se known and therefore usually available means or devices.
- a method of the type mentioned is essentially characterized in that for the removal of the adhesive in the holes or openings, a laser beam is used whose dimension or diameter exceeds the inside diameter of the holes or openings. Since the adhesive located in the region of the holes or perforations is removed by a laser beam, a reliable and reliable removal of the entire adhesive in the holes or openings is made possible according to the contacts of the component to be integrated, with further advantages of such removal of the adhesive means Are laser in the controllability of such a laser and the achievable uniformity during the adhesive removal at the same time high process speed.
- a use of a laser is to be regarded as a correspondingly easy-to-handle modification of a production method of a printed circuit board, whereby such modifications are widespread and, for example, even with only minor changes in the structure or design of a printed circuit board respectively required.
- a laser beam is used according to the invention for removing the adhesive in the holes or apertures, the dimension or diameter of which is the clear width of the holes or holes Exceeds breakthroughs.
- the fact that the dimension or the diameter of the laser beam exceeds the clear width of the holes or perforations can additionally with a lower precision with regard to the alignment of the laser beam - A - to every single hole to be cleaned the Ausmaschine be found.
- the adhesive in the region of the holes or openings be removed by a CO 2 laser beam.
- a CO 2 laser can not only be handled according to light and reliable and is also widely used in the production of printed circuit boards, but also ensures that the materials usually contained in adhesives, especially organic materials reliably from the holes or Breakthroughs are removed.
- a laser in particular pulsed CO 2 laser with a power of 0.1 to 75 watts, in particular from 0.1 to 7 watts, for a period or a pulse length of 0.1 to 20 microseconds is used.
- the electronic component For a proper embedding of the electronic component to be integrated in the printed circuit board as well as in particular for providing a substantially planar surface, which is particularly favorable or necessary in a further processing or processing of a usually multi-layer printed circuit board, according to a further preferred embodiment form proposed that the electronic component after being fixed to the layer of an insulating material, in particular a prepreg sheet and / or a resin is surrounded.
- an insulating material in particular a prepreg sheet and / or a resin
- the layer of the circuit board which serves to support the electronic component, optionally has an extremely small thickness and / or low strength
- the layer for supporting the electronic component is applied prior to the formation of holes or openings on a carrier layer, which is removed before removing the adhesive from the holes or openings.
- a carrier layer provides a sufficiently stable base during the deposition of the electronic component on the supporting layer.
- it can be removed in a simple manner after the determination of the electronic component to be integrated and before the removal of the adhesive from the holes or openings.
- Such a carrier layer may be formed to achieve the required strength, for example, of a metal and having a correspondingly large thickness, the carrier layer can be subsequently removed or detached in a simple manner and subsequently optionally used in connection with the production of additional circuit boards can.
- the layer for supporting the electronic component is formed by a conductive layer.
- the electrically conductive layer for contacting the contacts of the electronic component by a chemical deposition of an electrically conductive or conductive material, in particular copper, or a Sputtem a metallic layer is formed.
- a chemical deposition or sputtering allows the formation of a thin uniform layer or layer for contacting, which can serve in particular as a basis for applying further, in particular conductive structures, in which context it is also proposed that the electrically conductive layer is applied substantially over the entire surface on the surface facing away from the component surface of the supporting layer, as corresponds to a further preferred embodiment of the method according to the invention.
- a provision of a substantially planar surface for a further formation of, in particular, conductive or conductive structures after contacting the contacts or contact points of the electronic component to be integrated is proposed according to a further preferred embodiment, that after the application of the electrically conductive layer, the holes or Openings corresponding to the contacts of the component in essentially completely filled with conductive material, in particular by a galvanic deposition of conductive material.
- a production of conductive or conductive structures, such as conductor tracks, can be carried out, for example, by the substantially full-surface conductive layer subsequent structuring, for example, a laser structuring, photostructuring or the like, is subjected, as a further preferred embodiment corresponds to the method according to the invention.
- thermoly conductive or conductive adhesive be used for fixing the component, as claimed in a further preferred embodiment of the invention. complies with the appropriate procedure.
- the inventive method can be used in particular for producing a multilayer printed circuit board.
- FIG. 2a to 2g show a modified embodiment of a method according to the invention for producing a printed circuit board, wherein only the method steps until the removal of adhesive from the holes or openings of the component supporting layer are shown in more detail in Fig. 2, during further steps of a production and integration of the component in a particular multi-layer printed circuit board in Fig. 1 can be removed.
- a layer 1 is provided for supporting an electronic component to be integrated, shown below, on a carrier layer denoted by 2.
- Fig. 1b it is seen that in a subsequent step in the layer 1 holes or openings 3 corresponding contacts of the subsequently to be supported on the layer 1 or to be determined, electronic component, for example, by laser drilling or etching.
- a laser can be used for drilling the layer 1, with which the holes or openings 3 for a subsequent contacting of contacts of the electronic component to be integrated into the printed circuit board can be produced quickly and reliably.
- an attachment of an electronic component 4 to the layer 1 takes place, wherein an adhesive 5 is indicated for fixing.
- an adhesive 5 is indicated for fixing.
- the bores or perforations 3, which are also filled by the adhesive 5 have been formed in the layer 1 corresponding to the positions of contacts or contact points of the component 4 denoted by 6 and the contacts 6 are directed to the holes or openings 3.
- the carrier layer 2 is removed, whereupon, in a further method step according to FIG. 1f, the adhesive 5 received or located in the holes or openings 3 of the layer 1 is removed.
- This removal of the adhesive 5 located in the holes or openings 3 takes place by applying a laser beam, which is schematically indicated by 9 in FIG. 1f.
- the laser beam used to remove the adhesive present in the apertures or holes 3 is formed, for example, by a CO 2 laser, wherein, in particular in coordination with materials and / or fillers usually contained in such adhesives 5, the following parameters are used in accordance with Example 1 for a safe and reliable removal of the adhesive from the holes or openings 3 are used or selected:
- the diameter or the dimension of the laser beam 9 exceeds the dimension or clear width of the holes or openings 3, so that even if less stringent requirements on the precision for aligning the laser beam Relative to the holes 3, the adhesive 5 is reliably and reliably removed from the holes or perforations 3 by their complete covering.
- the directed beam provided by the laser beam 9 reliably removes the adhesive 5 only from the holes or apertures 3, while it is not to be feared that, for example - S -
- an education or application of an electrically conductive layer 10 for contacting the contacts or contact points takes place substantially over the whole area on the side facing away from the electronic component 4 to be integrated.
- the electrically conductive layer 10 for example, by a chemical deposition of an electrically conductive or conductive material, such as copper, or sputtering a metallic layer with a correspondingly low layer thickness of example wise applied or formed less than 1 micron.
- the conductive or conductive layer 10 formed in the method step according to FIG. 1h is usually formed from the same material as that for filling the cavities 11 and for forming the layer 12, in FIG 1h separated conductive or conductive layer 10 is no longer indicated separately and thus forms a part of the material for filling the holes or openings 3 corresponding to the contacts 6 and the additional conductive layer 12th
- further structuring steps are one
- FIG. 1k Structuring of the particular multilayer printed circuit board is indicated, wherein in the illustration according to FIG. 1k it can be seen that a structuring of a resist 13 takes place according to a subsequent structuring, in particular of the layer or layer 12 and / or the layer 1 coupled thereto.
- FIG. 11 it is indicated that, in accordance with the resist 13 applied in FIG. 1k, partial regions of the layer 12 are once again removed, as shown by the stepped or recessed regions 14 and 15 in FIG.
- Fig. 11 is indicated. In Fig. 11 is also indicated that at the same time a corresponding structuring of the further layer 8 can be made.
- the layer 1 While essentially any material can be selected for the layer 1 in order to support the electronic component 4 to be integrated, it is proposed, in particular for a further structuring of conductive or conductive elements, that the layer 1 also be formed from a conductive or conductive material is, so that in the process step shown in Fig. 1 i substantially a combined layer of substantially identical material of the layers or layers 1 and 12 is provided, as in the subsequent method steps according to FIG. 1k and 11 as uniform layer is indicated.
- FIG. 2 the reference symbols of FIG. 1 are retained for identical elements or components, it being apparent from a comparison of the method steps according to FIGS. 1a to 1g with the method steps according to FIGS. 2a to 2g that the essential differences between the method illustrated in FIGS. 1 and 2, in particular in the relative dimensions of the contacts 6 of the electronic component 4 to be integrated and in the thickness of the adhesive 5 used in the method according to FIG. 2.
- a layer 1 is provided on a carrier layer 2, whereupon holes or openings 3 are formed in the layer 1 in the subsequent method step according to FIG.
- adhesive 5 is applied for fixing the electronic component 4 to be integrated in relation to the embodiment of FIG. 1. Larger layer thickness, wherein the contacts 6 in the illustration of FIG. 2 larger dimensions than those of FIG. 1, wherein this is taken into account by a corresponding larger formation of the holes or openings 3.
- a laser beam which is denoted by 16 is also used in the method step shown in FIG. 2f.
- the laser steel 16 may in turn be formed by a CO 2 laser similar to the embodiment according to FIG. 1 f, the following parameters being in accordance with Example 2 for completely removing the adhesive from the holes or Openings 3 are used in a correspondingly short period of time:
- thick adhesive layer (30-50 ⁇ m) and / or high filler content
- Pulsed CO 2 laser Power 4 Watt Beam diameter: 280 ⁇ m Pulse duration: 8 ⁇ s Number of pulses: 13
- the laser beam 16 also has larger dimensions than the perforations 3 in order to meet lower requirements with regard to the orientation or registration of the laser beam 16 to the holes 3, wherein a reliable Removal of the adhesive 5 from the holes 3 can be achieved, so that overall the process time can be optimized and reduced.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Laser Beam Processing (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| AT0061908U AT12316U1 (de) | 2008-10-30 | 2008-10-30 | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte |
| PCT/AT2009/000419 WO2010048654A1 (de) | 2008-10-30 | 2009-10-28 | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP2342959A1 true EP2342959A1 (de) | 2011-07-13 |
Family
ID=41508248
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP09756396A Withdrawn EP2342959A1 (de) | 2008-10-30 | 2009-10-28 | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20110198018A1 (de) |
| EP (1) | EP2342959A1 (de) |
| AT (1) | AT12316U1 (de) |
| WO (1) | WO2010048654A1 (de) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AT13055U1 (de) * | 2011-01-26 | 2013-05-15 | Austria Tech & System Tech | Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt |
| JP5695205B2 (ja) * | 2011-09-12 | 2015-04-01 | 株式会社メイコー | 部品内蔵基板の製造方法及びこれを用いた部品内蔵基板 |
| AT513047B1 (de) * | 2012-07-02 | 2014-01-15 | Austria Tech & System Tech | Verfahren zum Einbetten zumindest eines Bauteils in eine Leiterplatte |
| US9084382B2 (en) | 2012-10-18 | 2015-07-14 | Infineon Technologies Austria Ag | Method of embedding an electronic component into an aperture of a substrate |
| AT514074B1 (de) | 2013-04-02 | 2014-10-15 | Austria Tech & System Tech | Verfahren zum Herstellen eines Leiterplattenelements |
| AT514564B1 (de) * | 2013-07-04 | 2015-02-15 | Austria Tech & System Tech | Verfahren zum Ankontaktieren und Umverdrahten |
| US10219384B2 (en) | 2013-11-27 | 2019-02-26 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Circuit board structure |
| AT515101B1 (de) | 2013-12-12 | 2015-06-15 | Austria Tech & System Tech | Verfahren zum Einbetten einer Komponente in eine Leiterplatte |
| AT515447B1 (de) | 2014-02-27 | 2019-10-15 | At & S Austria Tech & Systemtechnik Ag | Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte |
| US11523520B2 (en) | 2014-02-27 | 2022-12-06 | At&S Austria Technologie & Systemtechnik Aktiengesellschaft | Method for making contact with a component embedded in a printed circuit board |
| US9999136B2 (en) * | 2014-12-15 | 2018-06-12 | Ge Embedded Electronics Oy | Method for fabrication of an electronic module and electronic module |
| CN105328344B (zh) * | 2015-11-14 | 2017-07-04 | 苏州光韵达光电科技有限公司 | 一种用于球栅陈列结构pcb的激光除胶装置及方法 |
| US20240145258A1 (en) * | 2022-10-27 | 2024-05-02 | Stmicroelectronics Pte Ltd | Panel level semiconductor package and method of manufacturing the same |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0437491A (ja) * | 1990-05-31 | 1992-02-07 | Matsushita Electric Ind Co Ltd | 耐熱性樹脂被膜の剥離方法 |
| US5319183A (en) * | 1992-02-18 | 1994-06-07 | Fujitsu Limited | Method and apparatus for cutting patterns of printed wiring boards and method and apparatus for cleaning printed wiring boards |
| JP2710608B2 (ja) | 1996-03-01 | 1998-02-10 | 日本電気株式会社 | 有機フィルム加工方法 |
| US6492616B1 (en) * | 1999-05-24 | 2002-12-10 | Nippon Steel Chemical Co., Ltd. | Processes for laser beam machining of resin film for wiring boards and manufacture of wiring boards |
| FI117814B (fi) * | 2004-06-15 | 2007-02-28 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
| FI117369B (fi) | 2004-11-26 | 2006-09-15 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
-
2008
- 2008-10-30 AT AT0061908U patent/AT12316U1/de not_active IP Right Cessation
-
2009
- 2009-10-28 US US13/125,858 patent/US20110198018A1/en not_active Abandoned
- 2009-10-28 WO PCT/AT2009/000419 patent/WO2010048654A1/de not_active Ceased
- 2009-10-28 EP EP09756396A patent/EP2342959A1/de not_active Withdrawn
Non-Patent Citations (1)
| Title |
|---|
| See references of WO2010048654A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US20110198018A1 (en) | 2011-08-18 |
| AT12316U1 (de) | 2012-03-15 |
| WO2010048654A1 (de) | 2010-05-06 |
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