Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/831—Electrodes characterised by their shape
  • H10H20/8316—Multi-layer electrodes comprising at least one discontinuous layer
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/832—Electrodes characterised by their material
  • H10H20/833—Transparent materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
  • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
  • H10H20/80—Constructional details
  • H10H20/83—Electrodes
  • H10H20/832—Electrodes characterised by their material
  • H10H20/835—Reflective materials
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/0001—Technical content checked by a classifier
  • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

• the luminous efficacy of radiation-emitting semiconductor chips depends on various factors. On the one hand, a relatively high internal quantum efficiency can be achieved by means of a large-area electrical contacting of the semiconductor chip. On the other hand, however, absorption losses can occur due to large-area contacting, which considerably restrict the coupling-out efficiency and thus the luminous efficacy of the semiconductor chip.
• An object to be solved is to specify an optoelectronic semiconductor chip with improved light output.
• the optoelectronic semiconductor chip comprises a
• the active zone has a pn junction for generating radiation.
• this pn junction can be formed by means of a p-type and an n-type semiconductor layer, which adjoin one another directly.
• the actual radiation-generating structure for example in the form of a doped or undoped quantum structure, is preferably formed between the p-type and the n-type layer.
• the quantum structure can be configured as single quantum well structure (SQW, single quantum well) or multiple quantum well structure (MQW, multiple quantum well) or else as quantum wire or quantum dot structure.
• the semiconductor layer sequence Al n Ga m In; i . - n - m N O ⁇ n ⁇ l, 0 ⁇ m ⁇ 1 and n + m ⁇ 1.
• An on nitride compound semiconductor-based semiconductor chip is particularly suited to generate radiation with an emission wavelength in the short wavelength region of visible spectrum.
• the transparent conductive oxide is preferably a metal oxide such as zinc oxide, tin oxide, cadmium oxide, titanium oxide, indium zinc oxide, indium oxide or indium tin oxide (ITO).
• a metal oxide such as zinc oxide, tin oxide, cadmium oxide, titanium oxide, indium zinc oxide, indium oxide or indium tin oxide (ITO).
• ITO indium tin oxide
• Metal oxygen compounds such as ZnO, SnO 2 or In 2 O 3 may also be ternary metal oxygen compounds such as Zn 2 SnO 3 CdSnO 3, ZnSnO 3, M e f In 2 ° 4 'GaO 3, Zn2ln 2 ⁇ 5 or Ir ⁇ Sr ⁇ O ⁇ or mixtures of different transparent conductive oxides can be used. Furthermore, no stoichiometric composition is required. Furthermore, the transparent conductive oxide may also be p-doped or n-doped.
• the current spreading layer By the current spreading layer, a sufficiently good current spreading and energization of the semiconductor chip can be achieved.
• optical absorption losses caused by the current spreading layer can be reduced as compared to a whole current spreading layer.
• the current spreading layer covers 40% to 50% of the main area.
• the absorption losses are advantageously reduced, on the other hand can be sufficiently good in such a surface occupancy
• a smaller area coverage is particularly advantageous if the generated radiation has an emission wavelength between 400 nm and 450 nm.
• the optical absorption by the current spreading layer represents a larger loss mechanism than the electrical losses due to the lower surface coverage.
• the losses due to the optical absorption are lower, so that the electrical losses at a lower surface coverage more into the Weight fall. Therefore, a larger area occupancy is better suited in this case.
• the thickness of the current spreading layer may advantageously be between 10 nm and 60 nm. While through one
• the size that is the length and / or width, of interstices of the structured
• the intermediate spaces therefore advantageously have a size which lies between 1 ⁇ m and 6 ⁇ m.
• the gaps are formed with a size in the range between 3 .mu.m and 4 .mu.m. Taking this relationship into account, the
• Structure of the current spreading layer a rectangular grid.
• the grid has a plurality of parallel strips of transparent conductive oxide which extending in a first direction, and a plurality of parallel strips of transparent conductive oxide extending in a second direction, the first direction being perpendicular to the second direction.
• the distance between the parallel strips extending in the first direction may differ from the distance between the parallel strips extending in the second direction.
• the crossing points of the stripes correspond to grid points.
• An electrical contacting of the current spreading layer is preferably carried out by means of at least one electrical contact web.
• This contact web extends in particular perpendicular to a plane in which the Stromaufweitungstik is arranged and contacts the Stromaufweitungs slaughter at a designated contact point.
• the contact web may have the shape of a truncated cone, truncated pyramid or cylinder.
• a plurality of contact webs are regularly distributed over the surface of the current spreading layer.
• the respective contact point is preferably located at a grid point. However, it is not necessary to provide a contact point at each grid point.
• the contact web contains a metal with high conductivity. Furthermore, a material with a high degree of reflection is preferably used for the contact web.
• a suitable material is, for example, Ag.
• the current spreading layer is arranged between the semiconductor layer sequence and a mirror. - S -
• the electrical contact web extends in an opening of the mirror. If, as already mentioned, the contact web has a high degree of reflection, a high reflectivity can be achieved by the combination of mirror and contact web.
• the radiation emitted by the active zone in the direction of the current spreading layer can thereby be reflected without large optical losses in the direction of a decoupling surface.
• the decoupling surface is arranged on a side of the active zone which is opposite the current spreading layer.
• the optical losses are limited by the structured current spreading layer and the associated reduced area occupancy.
• the mirror has a dielectric layer.
• the dielectric layer has a smaller refractive index than the semiconductor material of the semiconductor layer sequence.
• the dielectric layer is formed of a silicon oxide, a silicon nitride or glass, preferably a spin-on glass.
• the dielectric layer can also be embodied as a Bragg mirror, in which dielectric sublayers with different refractive indices are arranged alternately.
• the mirror in particular the dielectric layer, preferably adjoins the current spreading layer.
• the interspaces of the structured current spreading layer can be filled at least by a part of the mirror, in particular the dielectric layer.
• at least part of the mirror or the dielectric layer may cover the current spreading layer.
• the opening is provided, in which the contact web extends.
• the mirror advantageously has a continuous metal layer. This is arranged in particular on a side facing away from the Stromaufweitungs slaughter of the mirror.
• the dielectric layer is covered by the metal layer.
• the metal layer may be formed at least two layers.
• the metal layer may comprise a layer of platinum and / or titanium for adhesion promotion and a layer with high reflectance, for example of silver.
• the semiconductor chip is a thin-film light-emitting diode chip.
• the semiconductor layer sequence is free of a growth substrate, that is, the growth substrate used for growing the semiconductor layer sequence is removed from the semiconductor layer sequence or at least heavily thinned.
• this may alternatively be arranged on a carrier substrate.
• the carrier substrate is located on one of the outcoupling side opposite back of the
• the current spreading layer is preferably arranged between the semiconductor layer sequence and the carrier substrate.
• Carrier substrate electrically conductive and serves as a first electrical contact for the semiconductor chip.
• the current spreading layer is here by means of the electrical - Q_
• a second electrical contact can be arranged on the decoupling surface.
• the semiconductor layer sequence is p-conducting on the side of the current spreading layer. Since the p-side typically has poor conductivity, a current spreading layer with high electrical conductivity is advantageous. suitable
• Dopant concentrations are in the range of 10 20 / cm 3 .
• FIG. 1 shows a schematic cross-sectional view of an optoelectronic semiconductor chip
• FIG. 2 shows a schematic view of a cross section along the current spreading layer of the semiconductor chip illustrated in FIG. 1,
• FIGS. 3A to 3D show the current density distribution over the main surface with different surface coverage
• FIG. 4 is a graph depicting the electrical losses at various current densities.
• FIG. 5 is a graph illustrating the extraction efficiency for different wavelengths.
• FIG. 1 shows an optoelectronic semiconductor chip 1, which has a semiconductor layer sequence 2 with an active zone 4 for generating electromagnetic radiation.
• the active zone 4 is located between a first semiconductor region 3 and a second semiconductor region 5.
• the first semiconductor region 3 is p-type and the second semiconductor region 5 is n-type.
• the two semiconductor regions 3, 5 include GaN and the active region 4 InGaN.
• the two semiconductor regions 3, 5 and the active zone 4 can each have a plurality of semiconductor layers.
• the semiconductor layer sequence 2 is epitaxially grown, wherein the growth substrate (not shown) is detached from the semiconductor layer sequence 2, so that the semiconductor layer sequence 2 has a thickness of less than 10 ⁇ m.
• the semiconductor layer sequence 2 is alternatively arranged on a carrier substrate 13.
• the carrier substrate 13 is electrically conductive.
• Suitable substrates are, for example, Ge or Si substrates.
• the support substrate 13 may be made of Cu by electroplating a preceding metal layer.
• a structured StromaufWeitungs für 6 is arranged on a main surface 12 of the semiconductor layer sequence 2.
• the current spreading layer 6 containing a transparent conductive oxide may be uniformly vapor-deposited or sputtered on the main surface 12 and then patterned appropriately.
• the structuring can be done, for example, lithographically.
• the thickness of the current spreading layer 6 is advantageously between 10 nm and 60 nm. By reducing the thickness on the one hand, the optical absorption losses can be lowered, whereby on the other hand, the transverse conductivity decreases. At a thickness between 10 nm and 60 nm, there is a good compromise between optical and electrical losses.
• a mirror 9 is arranged on the main surface 12, so that the radiation emitted in the direction of the main surface 12 can be deflected in the direction of the decoupling surface 14.
• the mirror 9 has a dielectric layer 7, which consists in particular of a
• the dielectric layer 7 may have a thickness in the range of 400 nm to 500 nm.
• the mirror 9 comprises a metal layer 8, which is connected to the dielectric
• the metal layer 8 may be formed of an adhesion promoting layer of Pt and a reflective layer of Ag.
• the thickness of the metal layer 8 can be so be thin, that it has interruptions.
• a layer thickness of about 0.2n ⁇ n is sufficient.
• the structured StromaufWeitungs für 6 is embedded.
• the dielectric layer 7 has openings in which contact webs 10 extend.
• the contact webs 10 extend perpendicular to a plane in which the Stromaufweitungs Mrs 6 is arranged and touch them at designated contact points.
• the contact webs 10 contain an electrically conductive material, so that the current spreading layer 6 can be energized by means of the contact webs 10.
• the contact webs may contain 10 Ag, which also has a relatively high
• the reflectivity of the mirror 9 is not significantly reduced at the contact webs 10.
• the shape of the contact webs 10 preferably resembles a cylinder.
• the contact webs 10 can produce an electrical connection between the current spreading layer 6 and the particularly electrically conductive carrier substrate 13.
• FIG. 2 shows the main surface 12 on which the structured current spreading layer 6 is applied.
• the current spreading layer 6 has the shape of a rectangular grid consisting of parallel stripes 6a extending in a first direction and parallel stripes 6b extending in a second direction is formed. At a plurality of grid points, that is at a plurality of crossing points of the strips 6a and 6b, contact points 11 are provided, on which the contact webs 10 are arranged.
• the contact points 11 are made of the same material as the strips 6a and 6b. They are just like the cross sections of the contact webs 10 circular and concentric with these.
• the contact points 11 With a surface coverage of 50% and a chip edge length of 1 mm, the contact points 11 advantageously have a diameter D 2 of approximately 6 ⁇ m.
• the distances A b between the contact points 11 in the first direction and the distances A a between the contact points 11 in the second direction are preferably the same size and amount to about 20 microns.
• the diameter D x of the contact webs 10 is 4 microns.
• the strips 6a are thinner than the strips 6b and may be about 2 ⁇ m wide while the strips 6b are about 4 ⁇ m wide.
• the strips 6a are arranged more densely than the strips 6b, that is, the lattice constants differ in the first and in the second direction from each other.
• the rectangular spaces 15, which are delimited by the strips 6a and 6b, have a length d b of about 16 ⁇ m and a width d a of about 3 ⁇ m.
• FIGS. 3A to 3D show the current density distribution over the main surface of a semiconductor chip as shown in FIG. 1 for various surface assignments.
• the thickness of the current spreading layer 6 is for all variants 40nm.
• the current supply takes place in all variants with a nominal current density of 5OA / cm 2 .
• the area occupancy is 100%, in the case of that shown in FIG. 3A.
• Variant 50% in the variant shown in Figure 3C 40% and in the variant shown in Figure 3D 30%.
• the distances A b and A a are kept constant in the various variants of Figures 3B to 3D.
• the stripe width is reduced.
• the gaps 15 can be increased.
• the width d a (shown in FIG. 2) of the intermediate spaces 15 in the variant illustrated in FIG. 3D may be about 4 .mu.m, while in the variant illustrated in FIG.
• Different current densities are represented by different gray levels, the current density being higher in darker areas than in lighter areas.
• the electrical losses 1-L are essentially independent of the wavelength.
• FIG. 5 shows the extraction efficiency E of a semiconductor chip with one for different emission wavelengths ⁇
• Current spreading layer has a thickness of 30nm.
• K3 represents the absorption losses caused by the current spreading layer. It can be seen that the absorption of the current spreading layer is strongly wavelength dependent. In the short-wave range, losses of approximately 20% occur through the current spreading layer, while they are approximately 5% in the longer-wave range.
• FIG. 6 to 8 show at emission wavelengths of
• the wall-plug efficiencies WP become different at each wavelength for different current densities
• a 40% to 50% area coverage of the main area by the current spreading layer causes an increase in the luminous efficacy at all wavelengths from the short-wave to the longer-wave range of the visible spectrum.

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• 2008
  • 2008-07-28 DE DE102008035110A patent/DE102008035110A1/de not_active Withdrawn
• 2009
  • 2009-06-29 US US13/056,589 patent/US8841685B2/en not_active Expired - Fee Related
  • 2009-06-29 JP JP2011520319A patent/JP5514819B2/ja not_active Expired - Fee Related
  • 2009-06-29 EP EP09775928A patent/EP2313935A1/de not_active Withdrawn
  • 2009-06-29 WO PCT/DE2009/000917 patent/WO2010012256A1/de not_active Ceased
  • 2009-06-29 KR KR1020117004570A patent/KR101606604B1/ko not_active Expired - Fee Related
  • 2009-06-29 CN CN200980129527.1A patent/CN102106008B/zh not_active Expired - Fee Related
  • 2009-07-24 TW TW098124990A patent/TWI415297B/zh not_active IP Right Cessation

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