EP2308275A1 - Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat, substrat mit mindestens einer leiterbahn sowie prägestempel - Google Patents
Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat, substrat mit mindestens einer leiterbahn sowie prägestempelInfo
- Publication number
- EP2308275A1 EP2308275A1 EP09779754A EP09779754A EP2308275A1 EP 2308275 A1 EP2308275 A1 EP 2308275A1 EP 09779754 A EP09779754 A EP 09779754A EP 09779754 A EP09779754 A EP 09779754A EP 2308275 A1 EP2308275 A1 EP 2308275A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- substrate
- film
- embossing
- conductor track
- plane
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/041—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a die for cutting the conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09036—Recesses or grooves in insulating substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/091—Locally and permanently deformed areas including dielectric material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/0108—Male die used for patterning, punching or transferring
Definitions
- the invention relates to a method for hot embossing according to the preamble of claim 1, a substrate according to the preamble of claim 15 and an embossing stamp according to the preamble of claim 21.
- the hot stamping of printed conductors on substrates represents an environmentally friendly option for the production of printed conductors.
- known hot stamping methods first the substrate having the desired microstructure, for example by means of an injection molding process, is produced. Subsequently, the substrate is placed in a press together with a metal foil placed thereon, whereupon the flat (two-dimensional) printed conductors are embossed as recessed structures using pressure and temperature by means of a structured stamping die. The residual film on a raised structural level of the substrate is removed from the substrate after the embossing process. The removal process is extremely critical. The success of the stripping process is essentially dependent on the tear resistance of the metal foil.
- Undressed film residues can lead to short circuits between the printed conductors.
- the embossing pressure was not sufficiently great, the actual remote conductor tracks, which are at a distance from the raised structural plane, can also be removed or damaged.
- the (raised) residual film to be peeled off must not be pressed too strongly against the substrate, which has the consequence that even the lowered, lower conductor tracks are only applied with this maximum force.
- the embossing force must be chosen sufficiently large to ensure that the conductor After the removal process of the remaining film webs sufficiently strong adhered to the substrate.
- a disadvantage of the known method is further that the flat (two-dimensional) conductor tracks can be introduced only in a remote structural plane.
- the fixing of semiconductor chips on the interconnects by means of an adhesive flip-chip method is only possible if the height difference between the interconnects and the raised structural plane falls below the height of the bumps.
- this height is about 50 ⁇ m.
- This is technologically difficult to achieve, since at such low embossing depths due to a minimum thickness of the metal foil used for use virtually no punching of the metal foil is possible and thus no traces can remain on the substrate.
- Even for a solder flip-chip process known substrates with embossed traces are only partially applicable because the solder bumps are spherical and thus only small embossing depths would be acceptable for narrow traces.
- the invention has for its object to propose an alternative, reliable method for hot stamping at least one conductor on a, in particular consisting of plastic, substrate.
- the substrates provided with such a method with at least one conductor track should be suitable for the application of semiconductor components by means of a flip-chip method.
- the object is to provide a correspondingly optimized substrate having at least one printed conductor track and an embossing punch for carrying out the aforementioned method.
- the invention is based on the idea to realize the embossing process, in particular by a suitable structuring, in particular microstructuring, of the embossing stamp in such a way that the initially flat (two-dimensional) film receives a three-dimensional shaping during the embossing process.
- the three-dimensional shape can be obtained by pressing the film against a corresponding, three-dimensional, already existing structuring of the substrate with the aid of the stamping die under the action of pressure and temperature, or preferably by supporting the (three-dimensional) three-dimensional interconnect.
- Substrate structure, in particular microstructure, (first) by means of the structured embossing Stemspeis is introduced simultaneously with the pressing or fixing the film against the substrate in the substrate.
- the film Due to the three-dimensional shaping of the film or of the substrate, it is possible, as will be explained later, to arrange the film in sections in a raised (upper) substrate plane, whereby semiconductor components can be applied to the raised conductor track sections in the flip-chip method.
- the conductor track due to its three-dimensional shape, acquires a larger cross-sectional area, since the conductor track can extend into areas below the abovementioned, raised substrate plane, that is to say into substrate structure trenches, thereby increasing the current carrying capacity of the corresponding conductor track.
- the conductor track In contrast to the prior art is not only a flat (two-dimensional) conductor track section for power line available.
- the structuring of the film for the formation of three-dimensionally shaped conductor tracks is carried out such that it does not lead to the formation of non-functional residual film areas on the substrate, whereby a Abziehvons intimid the film from the substrate in the stamp area between adjacent Tracks can be dispensed after the embossing process.
- a suitable three-dimensional structuring of the film the entire embossed film functionally, so to use the power line.
- the film is hot embossed by means of the embossing stamp, that the at least one of the hot stamping process resulting conductor track is arranged in sections on a raised, in particular flat, substrate level to the setting of semiconductor devices in the flip-chip method to enable.
- the embossed conductor track extends onto the substrate flank adjoining the raised substrate plane and arranged at an angle to the substrate plane, that is to say in the direction of a structural trench adjacent or delimiting the raised substrate plane.
- the interconnect edge arranged on the substrate flank essentially has the task of increasing the current carrying capacity of the interconnect and preferably does not serve to hold semiconductor components fixed to the interconnect.
- the interconnect edge preferably receives all "film excess", so that functionless residual film areas are avoided on the substrate.
- the substrate flank does not undercut the raised, preferably flat, substrate plane in order to be able to ensure removal of the substrate from the embossing punch after the hot embossing process.
- the angle between the substrate flank and the raised substrate plane is chosen to be at least large enough for the substrate flank to be perpendicular to the substrate plane and to be maximally large enough that the raised substrate plane and the substrate flank do not lie in a common plane but are arranged at an angle to one another ,
- the substrate flank and the raised substrate plane preferably span an angle from a range between about 90 ° and about 179 °, preferably from a value range between about 110 ° and about 160 °, most preferably between about 120 ° and about 150 ° on.
- the film is hot embossed such that two adjacent interconnects are spaced laterally so far that the interconnects are electrically isolated from each other, wherein no residual film is formed between the adjacent interconnects in the hot embossing process, but the film completely on the interconnects , in particular on the interconnect edges of the tracks, is distributed. Since the electrical insulation of two adjacent interconnects does not take place via the embossing depth but over the lateral distance, the embossing depth essentially has no influence on the insulating effect.
- an embodiment is preferred in which no film residue remains on the substrate in a region between two adjacent, three-dimensionally formed conductor tracks after the embossing process, without the need for a removal process, but rather that the embossing process is carried out in such a way that the film on the adjacent interconnects, in particular the mutually facing interconnect edges, is distributed.
- embossing punch comprising a blade section having a blade cutting edge, which ensures that the film, in particular in the middle, is separated in an area between two printed conductors to be produced during the embossing process, wherein the one another facing film sections are pressed by means of the advancing stamp moving against each substrate edge and thus laterally spaced from each other.
- a release embossing process is carried out with the aid of the embossing stamp, in which the film is first severed and this is pressed onto the substrate flanks and the raised substrate planes as the stamping process continues, resulting in three-dimensionally formed conductor tracks which are laterally spaced from one another.
- the film comprises at least one metal layer, in particular an aluminum layer, a copper layer and / or a gold layer or consists of an aforementioned layer.
- the embossing stamp used can be made of brass, steel or ceramic, for example.
- at least the structured stamping surface of the stamping die should be made of a tool material that is harder than the film used to minimize the wear of the stamping die.
- Hot stamping to enable multiple substrates with a common film, it is proposed that the film prior to and / or during the embossing process, at least in sections, laminated to the at least one, preferably on all substrates to be embossed, i. is prefixed. Additionally or alternatively, the film can be stretched over the at least one substrate, preferably over a plurality of substrates, before and / or during the common embossing process, for example by means of a tenter.
- the method described above can be optimized by structuring the substrate three-dimensionally simultaneously with the stamping of at least one three-dimensional conductor track by means of the stamping die.
- microstructures preferably fluidic structures, such as channels, through-holes, caverns, etc., can be embossed into the preferably polymer-based substrate.
- the conductor track edge is arranged at an angle to the raised conductor track plane, wherein the substrate edge is in an extreme case perpendicular, but preferably flatter, angled relative to the track track plane.
- two interconnects adjacent to their longitudinal extent extend as far as laterally, i. are spaced apart transversely to their longitudinal extent, that the conductor tracks are electrically isolated from each other.
- This side ladder At the end of the projecting portion of the substrate trench is preferably introduced with a blade portion for separating the film in the substrate during hot stamping.
- the blade section and the embossing section are formed by differently angled structural sections of the embossing punch.
- An embodiment can also be implemented in which the blade section and the embossing section are formed by a common structural flank of a preferably wedge-shaped structural section of the embossing punch.
- Fig. 4 is a press in which a substrate is arranged with a full surface on this applied film.
- Fig. 6 shows a partial area arrangement of two laminated to a single substrate
- FIG. 7 shows a substrate accommodated in a press, on which two spaced-apart foils are laminated, wherein the die is also provided with an embossing structure in an area outside the foils for structuring the substrate,
- FIG. 8 shows a substrate resulting from the embossing process according to FIG. 7 and provided with three-dimensionally formed conductor tracks.
- Fig. 1 two different substrates 1 of a Kunststoffma- material are shown one above the other.
- the upper substrate 1 in the plane of the drawing is unstructured, whereas the substrate 1 which is lower in the plane of the drawing is provided with a microstructure 2 which has been introduced, for example, in an erosive process or in a forming process or, for example, in the production by injection molding.
- FIG. 2 shows a preferred film 3 used for producing three-dimensionally contoured printed conductors.
- the film 3 is designed in three shifts in the embodiment shown.
- a middle electrically conductive layer 4 is formed in the illustrated embodiment of gold.
- An adhesive layer 6 is provided on a lower side facing the substrate 1 in a subsequent embossing process.
- FIG. 3 shows a preferred embossing punch 7 which can be used for the hot stamping process and has an embossing surface 8 (stamp surface).
- the embossing surface 8 is provided with an embossed structure 9 (micrometer structure).
- a further embossing section 14 is arranged, which serves for embossing the film 3 at a raised substrate plane which will also be explained later.
- a plurality of different, non-structured substrates 1, which are covered by a common film 3, are inserted into the press 15.
- the film 3 is laminated to all substrates 1.
- two laterally spaced-apart films 3 are laminated on a single, unstructured substrate 1.
- a punching direction 16 embossing direction
- two identically structured i.
- Substrate sections which are each provided with at least one three-dimensional conductor track and which can be separated from one another in a later method step are obtained.
- a single, non-structured substrate 1 is introduced into a press 15. On this two spaced apart, different sizes, foils 3 are laminated.
- the embossing stamp 7 is not only provided with an embossed structure 9 in the regions above the films 3, but also has an embossed structure 9 in a region located outside the film 3, with which the microstructure 2 exemplified in FIG. 8, in particular a fluidic Microstructure 2, in the substrate 1 can be introduced.
- the hot embossing process for producing the three-dimensional conductor tracks can also be carried out on an already prestructured substrate 1.
- FIG. 8 shows a substrate 1 resulting from the stamping process according to FIG. 7. It can be seen that 3 three-dimensionally formed, mutually insulated interconnects 17 have emerged from the film.
- Each interconnect 17 has a planar interconnect plane 18, which is raised in relation to the microstructure 2 and extends into the plane of the drawing, and at least one interconnect edge 19 arranged at an angle to the interconnect plane 18. It can be seen that, depending on the arrangement of the interconnects 17 on the substrate 1, more precisely depending on the arrangement of the embossed microstructure 2, a single interconnect plane 18 has either a one-sided interconnect edge 19 or two interconnect edges 19 spaced apart from one another transversely to the longitudinal extent of the interconnect 17.
- the conductor flanks 19 extend into substrate trenches 20 of the microstructure 2 (ie in the direction away from the embossing stamp), but do not extend to the base 21 of the corresponding substrate trench 20.
- the microstructure has a plurality of spaced-apart, planar, sublime-arranged substrate planes 22 (raised substrate sections), wherein partially on the raised substrate planes 22 a conductor track plane 18 (raised trace section) is impressed.
- substrate trenches 20 extending in each case into the substrate 1 and extending away from the embossing die each have two substrate flanks 23.
- Two adjacent substrate flanks 23 each meet at the base 21 of the associated substrate trench.
- the substrate flanks 23 serve as carrier surfaces for the conductor flanks 19, wherein the substrate flanks 23 extend beyond the conductor flanks 19 in the direction of the base 21 of the associated substrate trench 20.
- FIG. 8 it can be further seen that in a region between two adjacent, mutually facing substrate flanks 19 no residual film on the substrate 1 is present. This is not due to the fact that residual film sections would have been removed from the substrate 1 after the embossing process, but rather that the film 3 during the embossing process with the help of the blade portion 11 of the die 7 is separated and immediately thereafter from the on the respective blade section 11 adjacent stamping sections 13 was pressed against the substrate flanks 23.
- the entire film is electrically usable, increases the conductor cross-section and increases the current carrying capacity. This is accompanied by the pressing of the film 3 to the raised substrate planes 22 to form the printed circuit traces 18 by pressing the film 3 with the flat embossed sections 14 on the substrate first Furthermore, FIG.
- substrate flanks 23 with associated, directly adjoining raised substrate planes 22 enclose an angle ⁇ of approximately 140 ° in the embodiment shown.
- the same angle ⁇ is clamped between the raised conductor track planes 18 and the strip conductor edges 19 adjacent thereto.
- the angle ⁇ can be varied within an angle range between 90 ° (vertical course) and 179 ° (very flat course with conductor tracks 17 spaced very far apart).
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Shaping Of Tube Ends By Bending Or Straightening (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE200810040882 DE102008040882A1 (de) | 2008-07-31 | 2008-07-31 | Verfahren zum Heißprägen mindestens einer Leiterbahn auf ein Substrat, Substrat mit mindestens einer Leiterbahn sowie Prägestempel |
PCT/EP2009/057376 WO2010012540A1 (de) | 2008-07-31 | 2009-06-15 | Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat, substrat mit mindestens einer leiterbahn sowie prägestempel |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2308275A1 true EP2308275A1 (de) | 2011-04-13 |
Family
ID=41401546
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP09779754A Ceased EP2308275A1 (de) | 2008-07-31 | 2009-06-15 | Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat, substrat mit mindestens einer leiterbahn sowie prägestempel |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP2308275A1 (de) |
CN (1) | CN102165853B (de) |
DE (1) | DE102008040882A1 (de) |
WO (1) | WO2010012540A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011077896A1 (de) | 2011-06-21 | 2012-12-27 | BSH Bosch und Siemens Hausgeräte GmbH | Bedien- und Anzeigeeinrichtung für ein Haushaltsgerät und Haushaltsgerät |
DE102011080934A1 (de) | 2011-08-15 | 2013-02-21 | Robert Bosch Gmbh | Verfahren zum Metallisieren von Polymerschichtsystemen und Polymerschichtsysteme |
CN106104801A (zh) * | 2014-03-13 | 2016-11-09 | 飞利浦照明控股有限公司 | 照明装置及制造照明装置的方法 |
CN105506812B (zh) * | 2015-12-31 | 2018-01-23 | 白德旭 | 一种石墨烯智能服饰 |
US10849234B2 (en) | 2016-04-15 | 2020-11-24 | 3M Innovative Properties Company | Preparation of electrical circuits by adhesive transfer |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19508025A1 (de) * | 1995-03-07 | 1996-09-12 | Bosch Gmbh Robert | Verfahren zur Herstellung eines elektrooptischen Bauelements |
DE19738589A1 (de) * | 1997-09-03 | 1998-12-03 | Siemens Ag | Leiterplatte mit einem isoleirenden Trägersubstrat und einer Leiterbahnstruktur |
US7152317B2 (en) * | 2003-08-08 | 2006-12-26 | Shmuel Shapira | Circuit forming method |
US7205483B2 (en) * | 2004-03-19 | 2007-04-17 | Matsushita Electric Industrial Co., Ltd. | Flexible substrate having interlaminar junctions, and process for producing the same |
-
2008
- 2008-07-31 DE DE200810040882 patent/DE102008040882A1/de not_active Withdrawn
-
2009
- 2009-06-15 WO PCT/EP2009/057376 patent/WO2010012540A1/de active Application Filing
- 2009-06-15 EP EP09779754A patent/EP2308275A1/de not_active Ceased
- 2009-06-15 CN CN200980129698.4A patent/CN102165853B/zh not_active Expired - Fee Related
Non-Patent Citations (2)
Title |
---|
None * |
See also references of WO2010012540A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2010012540A1 (de) | 2010-02-04 |
WO2010012540A9 (de) | 2011-03-10 |
CN102165853A (zh) | 2011-08-24 |
CN102165853B (zh) | 2017-05-24 |
DE102008040882A1 (de) | 2010-02-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2010012540A1 (de) | Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat, substrat mit mindestens einer leiterbahn sowie prägestempel | |
DE102018207955A1 (de) | Leistungselektronisches Metall-Keramik-Modul und Leiterplattenmodul mit integriertem leistungselektronischen Metall-Keramik-Modul sowie Verfahren zu deren Herstellung | |
DE19522338B4 (de) | Chipträgeranordnung mit einer Durchkontaktierung | |
DE102014104819A1 (de) | Träger und/oder Clip für Halbleiterelemente, Halbleiterbauelement und Verfahren zur Herstellung | |
EP0610360A1 (de) | Verfahren zur herstellung einer gedruckten schaltung sowie gedruckte schaltung. | |
WO2016116499A1 (de) | Folienverbund mit elektrischer funktionalität und kontaktierung zum kontaktieren eines elektrischen leiters | |
DE102010039655A1 (de) | Elektrische Verbindungsklemme sowie Verfahren und Vorrichtung zum Herstellen einer elektrischen Verbindungsklemme | |
EP1964219A1 (de) | Klemmkörper für elektrotechnische anschlussklemmen | |
EP2191702B1 (de) | VERFAHREN ZUM HEIßPRÄGEN MINDESTENS EINER LEITERBAHN AUF EIN SUBSTRAT SOWIE SUBSTRAT MIT MINDESTENS EINER LEITERBAHN | |
EP1352551B1 (de) | Verfahren und vorrichtung zum anbringen von leiterdrähten auf oder in einer trageschicht | |
DE20208866U1 (de) | Kontaktierte und gehäuste integrierte Schaltung | |
WO2020043466A1 (de) | Bauelement und verfahren zur herstellung eines bauelements | |
DE102005048153B4 (de) | Verfahren zur Herstellung eines Halbleiterbauteils mit Halbleiterchip und Klebstofffolie | |
DE2805535A1 (de) | Verfahren zur herstellung einer leitfaehigen verbindung durch eine elektronische leiterplatte | |
DE60130108T2 (de) | Verfahren zur herstellung elektrischer verbindungselemente und verbindungselement | |
DE102020134563A1 (de) | Leistungsmodul und Verfahren zur Herstellung eines Leistungsmoduls | |
DE102011088431B4 (de) | Bondverbindung, Verfahren zum Herstellen einer Bondverbindung und Bondwerkzeug | |
DE4232666C1 (de) | Verfahren zum Herstellen von Leiterplatten | |
EP3898023A1 (de) | Stanzen von mindestens zwei übereinander angeordneten metallblechen | |
WO2010025972A1 (de) | Verfahren zum heissprägen mindestens einer leiterbahn auf ein substrat sowie substrat mit mindestens einer leiterbahn | |
DE19710344C2 (de) | Verfahren zum Herstellen von elektrischen Leiterplatten und Vorrichtung zur Durchführung von Teilschritten des Verfahrens | |
DE2649343A1 (de) | Vorrichtung und verfahren zur herstellung eines traegers fuer ein halbleiterbauelement | |
DE102012212283A1 (de) | Verfahren zum Ausbilden einer elektrisch leitenden Schicht auf einem Trägerelement und Verwendung des Verfahrens | |
DE102019111437A1 (de) | Verfahren zur Herstellung eines elektronischen Zwischenprodukts, elektronisches Zwischenprodukt, Verfahren zur Herstellung eines Elektronik-Bauteils und Elektronik-Bauteil | |
EP2023700A2 (de) | Elektrische Schaltung sowie Verfahren zur Herstellung einer elektrischen Schaltung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20110228 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK TR |
|
AX | Request for extension of the european patent |
Extension state: AL BA RS |
|
DAX | Request for extension of the european patent (deleted) | ||
17Q | First examination report despatched |
Effective date: 20140625 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R003 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
18R | Application refused |
Effective date: 20180506 |