EP2041975B1 - Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil - Google Patents

Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil Download PDF

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Publication number
EP2041975B1
EP2041975B1 EP07805053.1A EP07805053A EP2041975B1 EP 2041975 B1 EP2041975 B1 EP 2041975B1 EP 07805053 A EP07805053 A EP 07805053A EP 2041975 B1 EP2041975 B1 EP 2041975B1
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EP
European Patent Office
Prior art keywords
component
receiver
host component
data
time
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Not-in-force
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EP07805053.1A
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German (de)
English (en)
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EP2041975A2 (fr
Inventor
Volker Aue
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NXP BV
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NXP BV
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/60—Network structure or processes for video distribution between server and client or between remote clients; Control signalling between clients, server and network components; Transmission of management data between server and client, e.g. sending from server to client commands for recording incoming content stream; Communication details between server and client 
    • H04N21/63—Control signaling related to video distribution between client, server and network components; Network processes for video distribution between server and clients or between remote clients, e.g. transmitting basic layer and enhancement layers over different transmission paths, setting up a peer-to-peer communication via Internet between remote STB's; Communication protocols; Addressing
    • H04N21/643—Communication protocols
    • H04N21/64315—DVB-H
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/4104—Peripherals receiving signals from specially adapted client devices
    • H04N21/4126—The peripheral being portable, e.g. PDAs or mobile phones
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/414—Specialised client platforms, e.g. receiver in car or embedded in a mobile appliance
    • H04N21/41407—Specialised client platforms, e.g. receiver in car or embedded in a mobile appliance embedded in a portable device, e.g. video client on a mobile phone, PDA, laptop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
    • H04N21/4305—Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
    • H04N21/4383—Accessing a communication channel
    • H04N21/4384—Accessing a communication channel involving operations to reduce the access time, e.g. fast-tuning for reducing channel switching latency

Definitions

  • the present invention relates to a method for controlling a receiver system and to a receiver system, in particular for wireless IP ("Internet Protocol”) datacast networks, the receiver system comprising a receiver component with an antenna, and a host component with a player unit having a buffer.
  • IP Internet Protocol
  • DVB-H digital video broadcasting for handheld appliances
  • DVB-H is a standard for bringing digital television content to mobile handheld devices. It is based on the standard for digital video broadcasting for terrestrial transmission (in the following denoted as DVB-T) and the IP datacasting mode thereof.
  • the benefit for mobile devices comes from the introduction of time slicing that allows a receiver only to listen into the DVB-T stream for the data that are of interest to it.
  • Time slicing is enabled by intelligently grouping MPEG ("Moving Picture Experts Group") transport stream packets.
  • the MPEG transport packet stream is the interface to the physical layer.
  • DVB-H packets that belong to a certain IP data stream are grouped consecutively to form bursts.
  • Time splicing information is included in every burst to notify the receiver about the relative time from the current burst to the transmission of the next burst.
  • the receiver then can set an appropriate timer and switch off the receiver between bursts thereby reducing its on-time by more than 90% and saving a great deal of power consumption.
  • the receiver can use this time interval to scan different channels to enable a seamless handover to network cells offering a better signal strength, in particular during movements of the receiver.
  • WO 03/075494 discloses a DVB-based time slicing broadcasting system comprising a receiver that is capable of adapting to changes in transmission times and to various sizes of transmission bursts.
  • US 6 665 751 B1 discloses a media player capable of dynamically changing its playback rate according to network conditions in order to compensate for delayed packets.
  • a synchronous frequency network synchronously broadcasts the same content from different transmitters on the same frequency.
  • signals received from multiple sides are seen as multipath signals and are accommodated for by the built-in equalizer.
  • a synchronous frequency network may be advantageous for operators that have limited spectrum, e.g., a license to operate at just one channel, i.e. frequency.
  • the first drawback is that receivers cannot cope well with Doppler when the signal has been subject to heavy multipath as it appears in synchronous frequency networks.
  • the second drawback is that operators cannot vary the content, as it may be desired for offering location-dependent services.
  • Another possibility of providing undisrupted handover is to phase-shift the transport streams provided to different transmitters operating at different frequencies if such are available to one operator. In phase shifting, bursts that contain a specific IP flow are slightly shifted in time between adjacent frequencies.
  • a difficulty in receiving mobile digital TV is to recover clocks.
  • a player that possesses its own clock can control the server playing speed for an audio/video stream (denoted as A/V stream).
  • A/V stream an audio/video stream
  • the receiver and the corresponding source decoder must somehow recover the clock of the source encoder in order to prevent the player's internal buffers from running empty when the source decoder clock is too fast, or from overflowing when the source decoder clock is too slow.
  • the adjustment of the source decoder clock is typically done implicitly by interpolating or decimating the A/V stream at the source decoder side. Noting that the clock difference between source encoder and decoder vary by a few ten parts per million (ppm) or at most by a few hundred ppm, adjustment is typically done in its simplest form by every-so-often doubling or dropping a frame.
  • ppm parts per million
  • the only means for an A/V source decoder to recover the clock rate is to buffer some incoming packets to accommodate the jitter and to monitor the buffer level to adjust its internal clocks. This mechanism is similar to a delay lock loop.
  • the main disadvantages of bursting are the discontinuous data transmission and the latencies introduced by such a system, especially in the context of fast channel switching also referred to as zapping and in handover situations between two or more network cells.
  • the burst behaviour of the incoming packets makes it extremely difficult to implement an accurate clock recovery mechanism at the receiver side.
  • a clock recovery algorithm comes at the expense of a larger buffer and/or at the expense of stability meaning a large variation of the play speed up to a point, where those variations can be notified by the viewer/listener.
  • the receive buffer in the player needs to be sufficiently large to buffer an entire burst.
  • An additional safety margin needs to be kept to prevent the buffer from running empty, which would result in a pause in the audio and/or video contents. Under normal circumstances this has to be avoided.
  • the player For fast channel switching, it is desirable that the player starts playing as soon as the burst has been received. For this purpose, the player has to find a synchronization point in the A/V multiplex, typically a so-called I-frame. However, if the player starts too early, there is a risk that the buffer is empty before the next burst is received.
  • the buffer needs to be enlarged to additionally accommodate MPEG transport stream phase shifts.
  • the buffer needs to be enlarged to additionally accommodate MPEG transport stream phase shifts.
  • the method comprises the steps of: within said receiver component, detecting a time of a burst packet coming in via said antenna; communicating information about said detection from said receiver component to said host component; transferring data of said burst packet from said receiver component to said host component via a data interconnection; and within said host component, adjusting a playing speed of said player unit according to said information.
  • Receiver components typically comprise a highly accurate facility for detecting the beginning of an incoming burst due to the need to synchronize with the received signal and to enable time slicing.
  • the invention utilizes this facility for accurately recovering the clock rate of the source encoder by transmitting information about the incoming burst packet to the host component.
  • the host component in particular the source decoder, is thereby informed about the arrival time of a new burst packet.
  • the invention enables clock recovery in a similar quality as known from transmission protocols that have built-in quality of service features.
  • latencies in transferring the data and possible jitters can be counterbalanced by adjusting the playing speed of the data for a smooth reproduction of the data without buffer overflows or underruns.
  • the invention substantially helps to optimize the system behaviour with respect to latencies in the system and therefore has a direct impact on perceived performance of the system. Besides, the invention is easy to implement.
  • said information comprises an indicator signal that is communicated to said host component via a signal line, indicating said detection.
  • the signal line is separate from the data interconnection.
  • it may be connected to an exclusive or shared interrupt line of the host component. Then, the host component can react to the indicator signal without delay, in particular performing an interrupt service routine.
  • an error value is determined from a difference between a current buffer level and a target buffer level, and said playing speed is adjusted according to said error value.
  • said information comprises a first marker that is inserted into said data at the beginning of said data, wherein this part of said information is communicated to said host component by said transferring of said data via said data interconnection.
  • the beginning of a burst packet can be identified faster within the data. So the clock recovery can be more accurate.
  • At least a part of said first marker may be a length of said data.
  • At least a part of the information communicated to the host component may be a second marker that is inserted into the data at its end. Hence, the end of a burst packet can be identified faster within the data.
  • a processing latency is determined from a difference between a time of receiving said first marker and a time of receiving said indicator signal, and said playing speed is adjusted according to said processing latency. This enables a smooth playing of the A/V data.
  • a clock of said host component is synchronized with a clock of said receiver component, or with a clock source common to both the receiver component and the host component.
  • a separate indicator signal can be omitted if the first marker comprises a timestamp representing a time of said detection.
  • a processing latency is determined from a difference between a current time and said timestamp, and said playing speed is adjusted according to said processing latency. This is a simple way to determine the processing latency and to adjust playing speed without the need for an indicator signal.
  • the playing speed is preferably adjusted considering a time shift between corresponding burst packets of different channels in case of a handover situation.
  • the player unit is started before a target minimum buffer is prepared, and the playing speed is reduced before performing a handover.
  • the invention helps system designers on the host/application processor to minimize the latencies at the receiver system.
  • a receiver component 2 mainly consisting of a tuner 3 and a DVB-H baseband receiver 4 is connected to the cellular phone's host component 5, comprising the host processor 6 which can also be an application engine, via a data interconnection 7 comprising one of the interfaces typical for this application domain, which are SPI or SDIO.
  • a display 14 and a speaker 15 are connected to the host component 5.
  • the receiver component 2 is responsible for receiving an off-air signal via an antenna 13, recovering the MPEG transport stream, and decapsulating the IP packets.
  • the IP packets are transferred to the host component 5 via the data interconnection 7.
  • the IP encapsulated audio/video contents are brought forward to a media player unit 8 running on the host processor 6, respectively, for decompression, rendering and displaying to the display 14 and the speaker 15.
  • Common video formats are H.264 or Windows Media Video (WMV).
  • FIG. 2 The main principle of time slicing is shown in Figure 2 .
  • a DVB-H multiplex consisting of six channels is transmitted in bursts.
  • Each burst carries IP datagrams.
  • each burst contains exactly the amount of data to span the time between the current burst and the next burst, also denoted as burst period.
  • the receiver system 1 must provide a buffer that allows streaming from local memory, and that is refilled with every new burst. While the receiver system 1 is playing from memory, the tuner 3 and baseband receiver 4 can be completely switched off and power consumption can be saved. In Figure 2 , this is illustrated for channel 5.
  • Figure 3 illustrates the principle of phase shifting between two different frequency-channels A and B, respectively.
  • frequency-channel B is delayed by a phase shift t.
  • a receiver system 1 that wants to hand over from frequency-channel A to frequency-channel B can acquire the timing of the desired burst of in frequency-channel B during the RX off time of frequency-channel A. At a given time that depends on the signal quality parameters, the receiver can seamlessly hand over from frequency-channel A to frequency-channel B without losing a burst of IP datagrams.
  • FIG 4 shows a schematic block diagram of an IP datacast based receiver system 1 according to the invention.
  • the receiver component 2 is responsible for receiving an off-air signal that is used for IP datacasting, such as DVB-H.
  • the receiver component 2 acquires the signal, demodulates it, and decapsulates the IP packets which are then forwarded to the host component 5.
  • the host component comprises appropriate middleware 9 for retrieving the electronic service guide.
  • the electronic service guide holds information on the parameters used to encode the program including bit rate and mapping to IP addresses.
  • IP packets that carry A/V content of the selected program are forwarded from the receiver component 2 to the A/V player unit 8 where they arrive in a buffer 10 for incoming packets.
  • the A/V player unit 8 plays from this buffer 10.
  • the receiver component 2 has built in a precise timing detector 11 to detect the beginning of a received burst.
  • this kind of timing information is available somewhere inside the receiver component 2 due to the need to synchronize with the received signal and to enable time slicing, i.e. switch off the receiver component 2 while unneeded data are transmitted. It can thus be used for the benefit of the invention.
  • clock recovery is facilitated by means of a hard-wired indicator signal 12 indicating the detection of the beginning of a burst.
  • the receiver component 2 sets the indicator signal 12, e.g., from a logical low value to a high value.
  • This low-high edge triggers the host component 5, e.g., by a means of an interrupt and a corresponding interrupt service routine, immediately to acquire the current buffer level.
  • a conventional delay lock loop can then be used to control the playing speed of the A/V player unit 8: The acquired buffer level is compared to a predefined target value by calculating the difference between the buffer level and the target value.
  • the calculated difference is referred to as an error signal. If the value is larger than zero, the player unit 8 is told to reduce its playing speed, since the buffer level is larger than the target value. If the error signal is negative, the player unit 8 is told to increase its playing speed. In order to reduce jitter, the error signal can be lowpass filtered. Furthermore, the absolute value of the lowpass filtered error signal can be determined in such a way that it expresses the amount about which the playing speed needs to be adjusted. Additional means can be applied to limit the error signal or to control the playing speed variations to prevent them from becoming audible or visible.
  • the indicator signal 12 raises from low to high thereby issuing an interrupt at the processor 6 of the host component 5, hosting the A/V player unit 8.
  • the host component 5 acquires the current A/V buffer level C and compares it with the predefined target buffer level T, starting a delay lock loop.
  • the receiver system 1 prevents the A/V buffer's 10 lowest buffer level L from reaching zero due to processing latencies P and time-slicing jitter.
  • the invention allows dimensioning the lowest buffer level L such that latencies are kept to a minimum keeping channel switching times to a minimum.
  • Figure 6 shows a case of channel switching.
  • a fixed starting delay S in relation to the reception of the indicator signal 12 can be introduced after which the player unit 8 starts playing.
  • the delayed start sets the initial lowest buffer level L inside the A/V player unit 8.
  • a user selects channel 5.
  • the indicator signal 12 rises from low to high, indicating the beginning of the received burst.
  • data are transferred to the host component 5 and IP datagrams with A/V content are forwarded to the A/V player unit 8 and its current buffer level C is increased.
  • the actual play command to the player unit 8 is issued with a fixed starting delay S from the indicator signal 12.
  • the procedure as described above can also be used for networks that provide means for MPEG transport stream phase shift handover, to ensure that always enough data are present in the A/V buffer.
  • the target buffer level T needs to be set to a value that ensures a lowest buffer level L large enough to accommodate the phase shift that can occur during handover. This prevents the A/V buffer 10 from running empty when a burst is received later after the handover. When a burst from a different frequency is received later (earlier) automatically the buffer 10 is built up to the target buffer level T again by reducing (increasing) the playing speed of the player unit 8.
  • a specific combination of buffer control is able to optimize for both, low latency after channel switching and sufficient buffer margin for handover in an MPEG transport stream phase shift network.
  • the constant starting delay S is kept to a value large enough to ensure that the A/V buffer 10 does not run empty when the frequency is not switched.
  • the target buffer level T is set significantly higher, such that over the next period, the A/V player unit 8 plays with a decreased playing speed and the buffer 10 is built up to allow for phase shift MPEG transport stream handover.
  • Figure 7 shows a case where the clocks for the receiver component 2 and the host component 5 are synchronized by a single clock providing a common system clock source 16 to both components 2, 5. Another possibility not shown is to synchronize the components 2, 5 explicitly with each other. In both cases, the indicator signal 12 can be omitted.
  • the common system clock source 16 ensures that timers in the receiver component 2, in particular in the DVB-H baseband receiver 4, and the host/application processor 6 run with related clock frequencies.
  • a hard-wired synchronisation signal from the baseband receiver 4 to the host component 5 can be introduced that is used to initially deliver a specific time instant for which a specific timer value is delivered in a subsequent message to the host component 5, or a hard-wired synchronisation signal from the host component 5 to the baseband receiver 4 that notifies the baseband receiver 4 to set its timer to an initial value.
  • the baseband receiver 4 can notify the host component 5 about the arrival of bursts by associating the timer value to the transfer of each burst.
  • a burst transfer needs to be clearly marked, e.g. by burst start and end markers, or by a burst start marker comprising the data length, and a timestamp that refers to the burst.
  • the invention is applicable to all IP datacast receiver systems 1 where some sort of bursting is used in the network transmission. Therefore, the applicability of the invention is not limited to DVB-H only, but it can also be used for systems like DXB ("Digital Extended Broadcast") or T-DMB ("Terrestrial Digital Multimedia Broadcasting").
  • DXB Digital Extended Broadcast
  • T-DMB Transmission-DMB

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)

Claims (16)

  1. Procédé de commande d'un système récepteur, notamment pour des réseaux de diffusion de données IP sans fil, le système récepteur comprenant un composant récepteur (2) muni d'une antenne (13, et un composant hôte (5) muni d'une unité de lecture (8) comportant un tampon (10), le procédé comprenant les étapes suivantes:
    - dans ledit composant récepteur (2), la détection d'un temps d'un paquet de salve obtenu en entrée via ladite antenne (13); et
    - le transfert de données dudit paquet de salve dudit composant récepteur (2) audit composant hôte (5) via une interconnexion de données (7), le procédé étant caractérisé en ce qu'il comprend en outre:
    - la transmission d'informations concernant ladite détection dudit composant récepteur (2) audit composant hôte (5), dans lequel lesdites informations comprennent un signal indicateur (12) qui est transmis audit composant hôte (5) via un ligne de signal, indiquant ladite détection; et
    - la mesure de la différence de temps entre l'apparition du signal indicateur (12) et l'arrivée des données dudit paquet de salve au niveau du composant hôte (5) et, dans ledit composant hôte (5), l'ajustement d'une vitesse de lecture de ladite unité de lecture (8) conformément à ladite différence de temps.
  2. Procédé selon la revendication 1, dans lequel, après la réception dudit signal indicateur (12) dans le composant hôte (5), une valeur d'erreur est déterminée à partir d'une différence entre un niveau de tampon courant (C) et un niveau de tampon cible (T), et ladite vitesse de lecture est ajustée conformément à ladite valeur d'erreur.
  3. Procédé selon l'une des revendications 1 ou 2, dans lequel lesdites informations comprennent en outre un premier marqueur qui est inséré dans lesdites données au début desdites données, dans lequel cette partie desdites informations est transmise audit composant hôte (5) par ledit transfert desdites données via ladite interconnexion de données (7).
  4. Procédé selon la revendication 3, dans lequel une latence de traitement (P) est déterminée à partir d'une différence entre un temps de réception dudit premier marqueur et un temps de réception dudit signal indicateur (12), et ladite vitesse de lecture est ajustée conformément à ladite latence de traitement (P).
  5. Procédé selon la revendication 3, dans lequel une horloge dudit composant hôte (5) est synchronisée avec une horloge dudit composant récepteur (2) ou avec une source d'horloge commune à la fois au composant récepteur (2) et au composant hôte (5).
  6. Procédé selon la revendication 5, dans lequel ledit premier marqueur comprend un marqueur temporel représentant un temps de ladite détection.
  7. Procédé selon l'une des revendications précédentes, dans lequel, dans le cas d'une situation de transfert intercellulaire dans un réseau à déphasage, ladite vitesse de lecture est ajustée en tenant compte d'un décalage de temps (t) entre des paquets de salve correspondants de différents canaux dudit réseau à déphasage.
  8. Procédé selon l'une des revendications précédentes, dans lequel, dans le cas d'une situation de transfert intercellulaire dans un réseau à déphasage, ladite unité de lecture est mise en fonctionnement avant qu'un tampon minimum cible soit préparé, et ladite vitesse de lecture est réduite avant l'exécution dudit transfert intercellulaire.
  9. Système récepteur, notamment pour des réseaux de diffusion de données IP sans fil, comprenant un composant récepteur (2) muni d'une antenne (13) et un composant hôte (5), dans lequel:
    - ledit composant récepteur (2) détecte un temps d'un paquet de salve obtenu en entrée via ladite antenne (13) ; et
    - ledit composant récepteur (2) transfère des données dudit paquet de salve audit composant hôte (5) via une interconnexion de données (7),
    - ledit composant hôte (5) comprend une unité de lecture (8) comportant un tampon (10), et le système récepteur est caractérisé en ce que:
    - ledit composant récepteur (2) transmet des informations concernant ladite détection audit composant hôte (5), dans lequel ledit composant récepteur (2) transmet un signal indicateur (12) audit composant hôte (5) via un ligne de signal, dans lequel ledit signal indicateur (12) fait au moins partie desdites informations; et
    - ledit composant hôte (5) ajuste une vitesse de lecture de ladite unité de lecture (8) conformément à une différence de temps mesurée entre l'apparition du signal indicateur (12) et l'arrivée des données dudit paquet de salve au niveau du composant hôte (5).
  10. Système récepteur selon la revendication 9, dans lequel ladite ligne de signal est connectée à une ligne d'interruption dudit composant hôte (5).
  11. Système récepteur selon la revendication 9 ou 10, dans lequel ledit composant hôte (5), après la réception dudit signal indicateur (12), détermine une valeur d'erreur à partir d'une différence entre un niveau de tampon courant (C) et un niveau de tampon cible (T), et ajuste ladite vitesse de lecture conformément à ladite valeur d'erreur.
  12. Système récepteur selon l'une des revendications 9 à 11, dans lequel le composant récepteur (2) insère un premier marqueur dans lesdites données au début desdites données en tant qu'au moins une partie desdites informations, et transmet cette partie desdites informations audit composant hôte (5) via ladite interconnexion de données (7).
  13. Système récepteur selon la revendication 12, dans lequel le composant hôte (5) détermine une latence de traitement (P) à partir d'une différence entre un temps de réception dudit premier marqueur et un temps de réception dudit signal indicateur (12), et ajuste ladite vitesse de lecture conformément à ladite latence de traitement (P).
  14. Système récepteur selon la revendication 12, dans lequel une horloge dudit composant hôte (5) est synchronisée avec une horloge dudit composant récepteur (2).
  15. Système récepteur selon la revendication 12, comprenant une source d'horloge commune (16) à la fois pour le composant récepteur (2) et le composant hôte (5).
  16. Système récepteur selon la revendication 14 ou 15, dans lequel ledit premier marqueur comprend un marqueur temporel représentant un temps de ladite détection.
EP07805053.1A 2006-07-04 2007-07-04 Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil Not-in-force EP2041975B1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP07805053.1A EP2041975B1 (fr) 2006-07-04 2007-07-04 Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil

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Application Number Priority Date Filing Date Title
EP06116549 2006-07-04
PCT/IB2007/052610 WO2008004193A2 (fr) 2006-07-04 2007-07-04 Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil
EP07805053.1A EP2041975B1 (fr) 2006-07-04 2007-07-04 Procédé de réglage d'un système récepteur, et système récepteur destiné en particulier à des réseaux de diffusion de données ip sans fil

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EP2041975A2 EP2041975A2 (fr) 2009-04-01
EP2041975B1 true EP2041975B1 (fr) 2016-01-06

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US (1) US20090254961A1 (fr)
EP (1) EP2041975B1 (fr)
JP (1) JP4909409B2 (fr)
KR (1) KR101045707B1 (fr)
CN (1) CN101485205B (fr)
WO (1) WO2008004193A2 (fr)

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EP2180708A1 (fr) * 2008-10-22 2010-04-28 TeliaSonera AB Procédé pour la lecture de média en continu et dispositif terminal
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CN101485205B (zh) 2013-07-24
US20090254961A1 (en) 2009-10-08
CN101485205A (zh) 2009-07-15
JP2009540726A (ja) 2009-11-19
WO2008004193A3 (fr) 2008-04-17
WO2008004193A2 (fr) 2008-01-10
EP2041975A2 (fr) 2009-04-01
KR101045707B1 (ko) 2011-06-30
JP4909409B2 (ja) 2012-04-04
KR20090040310A (ko) 2009-04-23

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