EP2040174B1 - Peripheriegerät des Kartentyps - Google Patents

Peripheriegerät des Kartentyps Download PDF

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Publication number
EP2040174B1
EP2040174B1 EP08164018A EP08164018A EP2040174B1 EP 2040174 B1 EP2040174 B1 EP 2040174B1 EP 08164018 A EP08164018 A EP 08164018A EP 08164018 A EP08164018 A EP 08164018A EP 2040174 B1 EP2040174 B1 EP 2040174B1
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EP
European Patent Office
Prior art keywords
card
terminal
interface
peripheral device
connector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
EP08164018A
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English (en)
French (fr)
Other versions
EP2040174A1 (de
Inventor
Tamaki Konno
Yoshitaka Aoki
Keiichi Tsutsui
Naohiro Adachi
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Sony Corp
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Sony Corp
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Publication of EP2040174A1 publication Critical patent/EP2040174A1/de
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Publication of EP2040174B1 publication Critical patent/EP2040174B1/de
Expired - Fee Related legal-status Critical Current
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer

Definitions

  • the present invention relates to a card-type peripheral device such as a memory card.
  • PC cards Card-type peripheral devices designed to be inserted into card slots of personal computers (PCs), called PC cards, have been available.
  • ExpressCard which was named "NEWCARD” devices have been proposed as card-type peripheral devices having a smaller outer size and higher data transfer speed than PC cards (see, for example, " Pi-shi kado wo kogata kosoku ni: Shinkikaku 'NEWCARD' ga paso-kon no shinka wo atooshi (For Increased-Compactness and Increased-Speed of PC Cards: New Standard 'NEWCARD' Accelerates the Evolution of PCs)", pp. 67-76, June 9 2003 issue, Nikkei Electronics ).
  • PCI ExpressCard is a standard intended to replace traditional PC cards (PCMCIA cards), developed by the Personal Computer Memory Card International Association (PCMCIA), and is a card using a Peripheral Component Interconnect (PCI) Express interface.
  • PCI Express is an input/output (I/O) bus standard intended to replace traditional PCI buses.
  • ExpressCard cards achieve interfaces that have significantly higher speeds than traditional cards.
  • ExpressCard cards with a non-volatile memory would provide high-speed recording and reproduction if they were used as memory cards.
  • ExpressCard technology is expected to be used for a wide variety of devices such as digital cameras, mobile phones, personal digital assistants (PDA), and music players.
  • PDA personal digital assistants
  • An ExpressCard card has a function of a removable memory card including PCI Express and Universal Serial Bus (USB) interfaces as external interfaces.
  • PCI Express Peripheral Component Interconnect Express
  • USB Universal Serial Bus
  • ExpressCard applications one example of applications implementable using either PCI Express or USB interfaces is a storage memory.
  • USB cable adapters In systems for which high speed performance is not demanded but connectivity with out-of-date systems (e.g., old PCs) is demanded, cards implemented using a USB interface are used through USB cable adapters or the like.
  • cards having both interfaces may be used.
  • a mechanism for switching between the interfaces is provided.
  • a host device could identify a common storage region as two interfaces. In this case, the host device does not recognize that the storage region is shared by the two interfaces within a card, and handles the card as if two different cards were inserted.
  • the host device therefore individually accesses PCI Express and USB interfaces, and, as a result, may experience a problem that the use of one of the interfaces could cause destruction of data obtained by accessing the other interface.
  • a connector terminal defined by the ExpressCard specification includes terminals (CPPE# and CPUSB#) for notifying a host device of an interface of a card but does not include a dedicated terminal for switching between the interfaces.
  • One method of switching between the interfaces is to place a dedicated mechanical switch on a housing of a card so that a user may switch between the interfaces using the switch depending on the use as disclosed by US 2005/0138288 .
  • This method has a drawback in that a user is caused to perform a time-consuming operation of switching between the interfaces using the switch.
  • a card-type peripheral device having a plurality of specifications of external interfaces includes a connector configured to connect the card-type peripheral device to a connectable device connectable to the card-type peripheral device, the connector including a dedicated terminal in which an interface to be used is set; an electronic component configured to be accessed via the set interface; a plurality of interface function units each configured to control an interface compliant with one of the plurality of specifications; and a communication function unit configured to perform communication with the electronic component using one of the interface function units having a specification corresponding to a setting of the dedicated terminal.
  • a level of the dedicated terminal is set using the connectable device according to a specification.
  • the interface function unit having the specification corresponding to the setting of the dedicated terminal is enabled, and at least one of the interface function units having a specification that does not correspond to the setting of the dedicated terminal is disabled.
  • the communication function unit recognizes which specification of interface is enabled to be controlled on the basis of the setting of the dedicated terminal, and performs communication with the electronic component using one of the interface function units corresponding to the recognized specification.
  • each of the interface function units includes an analog circuit connected to the connector via a transmission line, the analog circuit including an enable terminal for determining whether the analog circuit is enabled or disabled according to a setting level of the dedicated terminal, and a logic circuit configured to operate in synchronization with a clock signal to transmit and receive data to and from the communication function unit, and, in accordance with the setting of the dedicated terminal, at least one of the interface function units is configured such that the analog circuit is disabled and the supply of the clock signal to the logic circuit is stopped.
  • the connectable device is an adapter, and includes a switch capable of switching a setting level of the dedicated terminal according to a specification supported by a device to which the adapter is connected.
  • the connector includes an output terminal capable of requesting the connectable device to transmit a condition to be notified.
  • the connectable device includes a notification unit configured to transmit the condition in response to the request from the output terminal.
  • the electronic component includes a non-volatile memory, and has a function of a memory card capable of recording and reproducing data via the set interface.
  • the plurality of specifications include a Peripheral Component Interconnect Express specification and a Universal Serial Bus specification.
  • an interface function unit corresponding to a setting of a dedicated terminal, which is set using a connectable device to which a card-type peripheral device is to be connected, is enabled, and a communication function unit performs communication with an electronic component through the enabled interface function unit.
  • Fig. 1 is a functional block diagram showing an example structure of a card-type peripheral device according to an embodiment of the present invention.
  • Fig. 2 is a functional block diagram showing an example structure of a host device to which the card-type peripheral device shown in Fig. 1 is connectable.
  • the card-type peripheral device may be a PC card medium that directly uses a PCI Express or USB interface as an interface.
  • the card-type peripheral device may include an internal non-volatile memory, and may have a function of a memory card configured to record and reproduce data via the interface.
  • the card-type peripheral device is also used as a compact high-density memory module with respect to a high-performance mobile-device removable medium of a host device such as a video camera or a digital still camera, and is thus configured as a memory card with compatibility in the functionality, the number of pins, etc.
  • a memory card 10 which may be the card-type peripheral device of the present embodiment, includes a connector 11, a transmission line 12 for a PCI Express interface, a PCI Express block 13 serving as a first interface function unit, a transmission line 14 for a USB interface, a USB block 15 serving as a second interface function unit, a common block 16 serving as a communication function unit, a storage device 17, and an inverter 18.
  • the connector 11 is a connector dedicated to the memory card 10.
  • the connector 11 includes a terminal 111 for the PCI Express interface and a terminal 112 for the USB interface.
  • the connector 11 further includes an IFSEL input terminal (interface selection terminal) 113 serving as a dedicated terminal for switching between both interfaces.
  • the connector 11 further includes a power supply terminal, a ground (GND) terminal, and a terminal used by a host device to detect a card, which are not described herein.
  • a power supply terminal a power supply terminal
  • a ground (GND) terminal a terminal used by a host device to detect a card
  • the PCI Express block 13 is a functional block that controls the PCI Express interface.
  • the PCI Express block 13 is connected to the terminal 111 of the connector 11 via the transmission line 12.
  • the USB block 15 is a functional block that controls the USB interface.
  • the USB block 15 is connected to the terminal 112 of the connector 11 via the transmission line 14.
  • the common block 16 is a functional block that controls data transfer to or from the PCI Express block 13 or the USB block 15 and that controls the reading or writing of data from or to the storage device 17.
  • the common block 16 includes a central processing unit (CPU), a software storage memory, a working memory, a data buffer, and dedicated hardware components.
  • CPU central processing unit
  • software storage memory e.g., a hard disk drive
  • working memory e.g., a hard disk drive
  • data buffer e.g., a hard disk drive
  • the storage device 17 is a memory region for holding data in a rewritable manner, and serves as a memory (recording area) of a memory card.
  • the storage device 17 is formed of a non-volatile memory such as a NAND flash memory.
  • the IFSEL input terminal 113 of the connector 11 is connected to an input pin EN (enable) of the PCI Express block 13 through the inverter 18.
  • the PCI Express block 13 is enabled, for example, when a signal of logic "1" is input to the input pin EN.
  • the IFSEL input terminal 113 of the connector 11 is directly connected to an input pin EN (enable) of the USB block 15.
  • the IFSEL input terminal 113 is also directly connected to the common block 16.
  • the signal input to the IFSEL input terminal 113 of the connector 11 is supplied to the input pin EN (enable) of the USB block 15 without inverting the level of the signal.
  • the USB block 15 is enabled, for example, when a signal of logic "1" is input to the input pin EN.
  • the PCI Express block 13 and the USB block 15 are controlled so that one of the PCI Express block 13 and the USB block 15 is enabled according to the level of the signal input to the IFSEL input terminal 113 of the connector 11.
  • the IFSEL terminal 113 is clamped to a power supply potential (whose level corresponds to logic "1") or ground potential GND (whose level corresponds to logic "0") on a host device to which the memory card 10 is connected or on any of various adapters.
  • the input pin EN of the PCI Express block 13 is set to logic "1". Thus, the control of the PCI Express interface is enabled.
  • the input pin EN of the USB block 15 is set to logic "0". Thus, the control of the USB interface is disabled.
  • the common block 16 recognizes that the control of the PCI Express interface is enabled, and controls the PCI Express block 13 to transfer data to or from the storage device 17.
  • the input pin EN of the PCI Express block 13 is set to logic "0". Thus, the control of the PCI Express interface is disabled.
  • the input pin EN of the USB block 15 is set to logic "1". Thus, the control of the USB interface is enabled.
  • the common block 16 recognizes that the control of the USB interface is enabled, and controls the USB block 15 to transfer data to or from the storage device 17.
  • the inverter 18 may be connected to the input pin EN (enable) of the USB block 15 instead of the input pin EN (enable) of the PCI Express block 13.
  • FIG. 2 The internal structure of the memory card 10 to be connected to the host device 20 is similar to that shown in Fig. 1 .
  • the host device 20 is, for example, a camera device configured to capture an image of an object to generate image data.
  • the memory card 10 serves as a medium storing the image data.
  • the host device 20 includes a connector 21, a transmission line 22 for a PCI Express interface, a transmission line 23 for a USB interface, a card controller 24, an upper layer 25, and a memory 26.
  • the connector 21 is a connector physically connectable to the connector 11 of the memory card 10 shown in Fig. 1 .
  • the connector 21 has an arrangement of terminals corresponding to the arrangement of terminals of the connector 11 in one-to-one correspondence.
  • the connectors 11 and 21 are connected to establish communication between the memory card 10 and the host device 20.
  • the connector 21 includes a terminal 211 for the PCI Express interface and a terminal 212 for the USB interface.
  • the terminal 212 is connected to the ground potential GND because the USB interface is not in use.
  • the connector 21 further includes a terminal 213 for transmitting a dedicated signal IFSEL for switching between both interfaces.
  • the terminal 213 is connected to the ground potential GND.
  • the card controller 24 is a control block dedicated to the memory card 10 having the PCI Express interface, and is connected to the connector 21 via the transmission line 22.
  • the card controller 24 is configured to control the PCI Express interface, and is further configured to detect a card and to supply power to the card.
  • the upper layer 25 includes hardware resources for generating image data, and software (application) for controlling the hardware resources.
  • the memory 26 is a memory storing various types of data, and includes a memory storing the software, a working memory, and a memory storing actual data.
  • the IFSEL terminal 213 is clamped to the ground potential GND or the power supply potential at the host device side to switch between interfaces.
  • the PCI Express interface is used, and the IFSEL terminal 213 is clamped to the ground potential GND.
  • the terminal 212 is preferably clamped to the ground potential GND.
  • the card controller 24 may be provided with a USB interface function, and may be connected to the connector 21 via the transmission line 22.
  • the IFSEL terminal 213 is clamped to the power supply potential, and a host-device output signal of the PCI Express interface is set to the ground potential GND while an input signal thereof is set open (this processing is hereinafter referred to as "non-use processing").
  • the structure and functions of the memory card 10, which may be the card-type peripheral device according to the present embodiment, and the structure and functions of a host device to which the memory card 10 is connectable have been described.
  • Fig. 3 is a diagram showing a USB cable adapter in which the memory card 10 is inserted.
  • Fig. 4 is a diagram showing a PCI-Express-based ExpressCard adapter in which the memory card 10 is inserted.
  • a USB adapter 30 includes a connector 31, and has a USB cable 32 externally connected thereto.
  • the memory card 10 is inserted into a card receiving portion 33 of the USB adapter 30 through a slot 34, and the connector 11 of the memory card 10 is connected to the connector 31.
  • the connector 31 includes a terminal 311 for a PCI Express interface and a terminal 312 for a USB interface.
  • the connector 31 further includes a terminal 313 for a dedicated signal IFSEL for switching between both interfaces.
  • USB interface is directly linked between the connector 31 and the USB cable 32. Power is supplied through the USB cable 32.
  • a regulator or any other suitable component is connected between the USB cable 32 and the connector 31, as necessary, to adjust a voltage so as to conform to the specification of the memory card 10.
  • the IFSEL terminal 313 is clamped to the power supply through a resistor R30.
  • the clamped power supply has a voltage equal to a voltage output from the regulator.
  • the non-use processing described above is applied to the PCI Express interface.
  • the PCI Express interface is directly linked between the connector 31 and a PCI Express cable.
  • the power supply is provided through the PCI Express cable, and the power supply voltage is adjusted so as to conform to the specification of the memory card 10, as necessary.
  • An IFSEL terminal is clamped to the ground potential GND, and the non-use processing described above is applied to the USB interface.
  • an ExpressCard adapter 40 includes a connector 41, and has an ExpressCard connector 42 formed at an end thereof.
  • the memory card 10 is inserted into a card receiving portion 43 of the ExpressCard adapter 40 through a slot 44, and the connector 11 of the memory card 10 is connected to the connector 41.
  • the connector 41 includes a terminal 411 for a PCI Express interface and a terminal 412 for a USB interface.
  • the connector 41 further includes a terminal 413 for a dedicated signal IFSEL for switching between both interfaces.
  • the ExpressCard connector 42 includes a terminal 421 for the PCI Express interface and a CPPE# terminal 422.
  • the PCI Express interface is directly linked between the connector 41 and the ExpressCard connector 42, and the CPPE# terminal 422 of the ExpressCard connector 42 is clamped to the ground potential GND.
  • USB interface is directly linked between the connector 41 and the ExpressCard connector 42, and a CPUSB# terminal provided on the ExpressCard connector 42 is clamped to the ground potential GND.
  • the CPPE# or CPUSB# terminal is clamped to the ground potential GND on the ExpressCard adapter 40.
  • the dedicated card detection terminal provided on the memory card 10 may be directly connected to the CPPE# or CPUSB# terminal.
  • an adapter can be shared, and a dedicated mechanical switch may be mounted on a housing of the adapter to switch between the interfaces.
  • Fig. 5 is a diagram showing a PCI-Express-based ExpressCard adapter having a switch, in which the memory card 10 is inserted.
  • An ExpressCard adapter 50 includes a connector 51, and has an ExpressCard connector 52 formed at an end thereof.
  • the memory card 10 is inserted into a card receiving portion 53 of the ExpressCard adapter 50 through a slot 54, and the connector 11 of the memory card 10 is connected to the connector 51.
  • the connector 51 includes a terminal 511 for a PCI Express interface and a terminal 512 for a USB interface.
  • the connector 51 further includes a terminal 513 for a dedicated signal IFSEL for switching between both interfaces.
  • the ExpressCard connector 52 includes a terminal 521 for the PCI Express interface, a CPPE# terminal 522, a CPUSB# terminal 523, and a terminal 524 for the USB interface.
  • the ExpressCard adapter 50 is provided with a mechanical switch 55 to switch the potential to which each of the CPPE# terminal 522, the CPUSB# terminal 523, and the IFSEL terminal 513 is clamped.
  • the CPPE# terminal 522 is clamped to the ground potential GND
  • the CPUSB# terminal 523 is clamped open
  • the IFSEL terminal 513 is clamped to the ground potential GND.
  • the CPPE# terminal 522 is clamped open, the CPUSB# terminal 523 is clamped to the ground potential GND, and the IFSEL terminal 513 is clamped to the power supply potential.
  • the card detection terminal of the memory card 10 may be connected to the CPPE# terminal 522 and the CPPUSB# terminal 523.
  • a light-emitting diode (LED) (not shown) serving as a notification unit may be provided at the rear of the ExpressCard adapter 50. As is beneficial for a user, the LED changes the color of emitted light to visually notify the user of an interface currently being used.
  • Light may not necessarily be continuously emitted from the LED for a period of time during which power is supplied to the adapter 50. It is more useful to combine the light emission condition of the LED with the condition of the memory card 10.
  • memory cards are provided with an LED.
  • the provision is difficult due to the increased compactness of the cards and the increased capacity of storage regions of the cards.
  • an adapter be provided with an LED that emits light under any condition suitable for a memory card.
  • the connector 11 is provided with a dedicated LEDON terminal (output terminal).
  • the LEDON terminal is controlled by the common block 16 that manages data transfer to the storage device 17 so that the LEDON terminal is set to logic "1" for a period of time during which data is written to or read from the storage device 17 and is set to logic "0" otherwise.
  • the ExpressCard adapter 50 is configured to turn on the LED when the LEDON terminal of the memory card 10 is set to logic value 1, and to turn off the LED when the LEDON terminal is set to logic value 0.
  • the ExpressCard adapter 50 is also configured to change the color of the LED according to, for example, the interface to be used. For example, a plurality of LEDs that emit light of different colors may be provided.
  • the LEDON terminal has been described in combination with a mechanism for notifying a user of an interface, the LEDON terminal is not originally designed to relate to the notification of an interface to be used.
  • the LEDON terminal can be used for the host device 20, the USB adapter 30, or the ExpressCard adapter 40.
  • Fig. 6 is a diagram showing an example internal hardware configuration of a memory card 10A according to this embodiment.
  • the memory card 10A includes a connector 11, transmission lines 12 and 14, a storage device 17, and a controller 60 including a PCI Express block, a USB block, and a common block.
  • the controller 60 controls communication between the interfaces and the storage device 17.
  • the controller 60 includes a PCI Express block 61, a USB block 62, a common block 63, an inverter 64, a clock generator 65, and two-input ANDs 66 and 67.
  • the PCI Express block 61 of the controller 60 includes an analog circuit 611 and a logic circuit 612.
  • the PCI Express interface is connected to a terminal 111 of the connector 11 via the transmission line 12.
  • the USB block 62 includes an analog circuit 621 and a logic circuit 622.
  • the USB interface is connected to a terminal 112 of the connector 11 via the transmission line 14.
  • the common block 63 is a functional block that controls data transfer to or from the PCI Express block 61 or the USB block 62 and that controls the reading or writing of data from or to the storage device 17.
  • the common block 63 includes a CPU, a software storage memory, a working memory, a data buffer, and dedicated hardware components.
  • the inverter 64 has an input connected to an IFSEL input terminal 113 of the connector 11, and an output connected to an input pin EN (enable) of the analog circuit 611 of the PCI Express block 61 and a first input terminal of the two-input AND 66.
  • the PCI Express block 61 is enabled, for example, when a signal of logic "1" is input to the input pin EN.
  • the IFSEL input terminal 113 of the connector 11 is directly connected to an input pin EN (enable) of the analog circuit 621 of the USB block 62 and a first input terminal of the two-input AND 67.
  • the IFSEL input terminal 113 is also directly connected to the common block 63.
  • the signal input to the IFSEL input terminal 113 of the connector 11 is supplied to the input pin EN (enable) of the analog circuit 621 of the USB block 62 and the two-input AND 67 without inverting the level of the signal.
  • the USB block 62 is enabled, for example, when a signal of "logic" 1 is input to the input pin EN.
  • the PCI Express block 61 and the USB block 62 are controlled so that one of the PCI Express block 61 and the USB block 62 is enabled according to the level of the signal input to the IFSEL input terminal 113 of the connector 11.
  • the clock generator 65 which may be an on-chip clock generator, has a clock output connected to second input terminals of the two-input ANDs 66 and 67.
  • a clock signal CLK output from the clock generator 65 allows clock synchronization circuits of the logic circuits 612 and 622 and the common block 63 to operate.
  • the clock generator 65 is an on-chip clock generator by way of example.
  • the clock generator 65 may be externally mounted on the controller 60.
  • the clock signal CLK is supplied to the clock synchronization circuit of the logic circuit 612 of the PCI Express block 61.
  • the clock signal CLK is supplied to the clock synchronization circuit of the logic circuit 622 of the USB block 62.
  • each of the analog circuits 611 and 621 has an input pin EN.
  • the pin EN is set to logic "1" (enable)
  • the circuit that performs interface control is enabled.
  • the pin EN is set to logic "0" (disable) (disable)
  • the circuit that performs interface control is disabled.
  • An analog circuit to be targeted is disabled, which means that the circuit does not consume power other than leakage.
  • the logic circuits 612 and 622 operate in clock synchronization.
  • the logic circuits 612 and 622 are enabled when the clock signal CLK is supplied from outside the circuits 612 and 622, and are disabled when the clock signal CLK is not supplied.
  • a logic circuit to be targeted is disabled, which means that the circuit does not consume power other than leakage.
  • the pin EN of the analog circuit 611 is set to logic "1".
  • the output clock signal CLK of the clock generator 65 is supplied to the logic circuit 612. Inversely, the pin EN of the analog circuit 621 is set to logic "0".
  • USB block 62 does not consume power other than leakage.
  • the pin EN of the analog circuit 611 is set to logic "0".
  • the pin EN of the analog circuit 621 is set to logic "1".
  • the first input terminal of the two-input AND 67 is also set to logic "1".
  • the output clock signal CLK of the clock generator 65 is supplied to the logic circuit 622.
  • USB block 62 is enabled while the operation of the PCI Express block 61 is disabled.
  • the PCI Express block 61 does not consume power other than leakage.
  • a memory card capable of minimizing the increase in power consumption and achieving the advantages of both PCI Express and USB interfaces can be achieved.
  • the development of various low-cost adapters is also facilitated.
  • interface specifications two types, namely, PCI Express and USB interface specifications, have been described.
  • other interface specifications such as Serial ATA (Serial Advanced Technology Attachment) may be used.

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Claims (10)

  1. Externe Einrichtung vom Kartentyp, welche mehrere Spezifikationen externer Schnittstellen (111, 112) hat, wobei die externe Einrichtung vom Kartentyp umfasst:
    einen Verbinder (11), der konfiguriert ist, die externe Einrichtung vom Kartentyp mit einer verbindbaren Einrichtung zu verbinden, welche mit der externen Einrichtung vom Kartentyp verbunden werden kann;
    eine elektronische Komponente (17), die konfiguriert ist, dass auf sie über eine der Schnittstellen (111, 112) zugegriffen wird;
    mehrere Schnittstellenfunktionseinheiten (13, 15; 61, 62), wobei jede konfiguriert ist, eine Schnittstelle zu steuern, welche mit einer der mehreren Spezifikationen konform ist; und
    eine Kommunikationsfunktionseinheit (16, 63), die konfiguriert ist, Kommunikation mit der elektronischen Komponente (17) unter Verwendung einer der Schnittstellenfunktionseinheiten (13, 15; 61, 62) durchzuführen,
    dadurch gekennzeichnet, dass
    der Verbinder (11) einen zweckbestimmten Anschluss (113) aufweist, mit dem die Schnittstelle (111, 112), die zu verwenden ist, ausgewählt wird;
    die elektronische Komponente (17) konfiguriert ist, dass auf sie über die ausgewählte Schnittstelle (111, 112) zugegriffen wird;
    wobei die Schnittstellenfunktionseinheiten (13, 15; 61, 62) eine Spezifikation haben, welche einer Einstellung des zweckbestimmten Anschlusses (113) entspricht.
  2. Externe Einrichtung vom Kartentyp nach Anspruch 1, wobei ein Pegel des zweckbestimmten Anschlusses (113) unter Verwendung einer verbindbaren Einrichtung gemäß einer Spezifikation eingestellt wird.
  3. Externe Einrichtung vom Kartentyp nach Anspruch 1 oder 2, wobei die Schnittstellenfunktionseinheiten (13, 15; 61, 62), welche die Spezifikation hat, welche der Einstellung des zweckbestimmten Anschlusses (113) entspricht, freigegeben wird, und zumindest eine der Schnittstellenfunktionseinheiten (13, 15), welche eine Spezifikation haben, welche nicht der Einstellung des zweckbestimmten Anschlusses (113) entspricht, gesperrt wird.
  4. Externe Einrichtung vom Kartentyp nach Anspruch 3, wobei die Kommunikationsfunktionseinheit (16, 63) erkennt, welche Spezifikation der Schnittstelle (111, 112) freigegeben wird, um auf Basis der Einstellung des zweckbestimmten Anschlusses (113) gesteuert zu werden, und um Kommunikation mit der elektronischen Komponente (17) unter Verwendung einer der Schnittstellenfunktionseinheiten (13, 15; 61, 62), welche der erkannten Spezifikation entspricht, durchzuführen.
  5. Externe Einrichtung vom Kartentyp nach Anspruch 3 oder 4, wobei jede der Schnittstellenfunktionseinheiten (61, 62) aufweist:
    eine Analogschaltung (611, 621), welche mit dem Verbinder (11) über eine Übertragungsleitung (12, 14) verbunden ist, wobei die Analogschaltung (611, 621) einen Freigabeanschluss (EN) aufweist, um zu bestimmen, ob die Analogschaltung (611, 621) freigegeben wird oder gesperrt ist gemäß einem Einstellungspegel des zweckbestimmten Anschlusses (113), und
    eine Logikschaltung (621, 622), welche konfiguriert ist, synchron mit einem Taktsignal (CLK) zu arbeiten, um Daten zu und von der Kommunikationsfunktionseinheit (63) zu übertragen und zu empfangen, und
    wobei gemäß der Einstellung des zweckbestimmten Anschlusses (113) zumindest eine der Schnittstellenfunktionseinheiten (61, 62) konfiguriert ist, dass die Analogschaltung gesperrt wird und die Zufuhr des Taktsignals (CLK) zur Logikschaltung (621, 622) gestoppt wird.
  6. Externe Einrichtung vom Kartentyp nach einem der Ansprüche 1 bis 5, wobei die verbindbare Einrichtung ein Adapter ist, und einen Schalter aufweist, der in der Lage ist, einen Einstellpegel des zweckbestimmten Anschlusses (113) gemäß einer Spezifikation, welche durch eine Einrichtung unterstützt wird, mit der der Adapter verbunden ist, umzuschalten.
  7. Externe Einrichtung vom Kartentyp nach einem der Ansprüche 1 bis 6, wobei der Verbinder (11) einen Ausgangsanschluss aufweist, der in der Lage ist, die verbindbare Einrichtung aufzufordern, einen Zustand, der mitzuteilen ist, zu übertragen.
  8. Externe Einrichtung vom Kartentyp nach Anspruch 7, wobei die verbindbare Einrichtung eine Mitteilungseinheit aufweist, welche konfiguriert ist, den Zustand als Antwort auf die Anforderung vom Ausgangsanschluss zu übertragen.
  9. Externe Einrichtung vom Kartentyp nach einem der Ansprüche 1 bis 8, wobei die elektronische Komponente (17) einen nichtflüchtigen Speicher aufweist und eine Funktion einer Speicherkarte hat, welche in der Lage ist, Daten über die gesetzte Schnittstelle (111, 112) aufzuzeichnen und wiederzugeben.
  10. Externe Einrichtung vom Kartentyp nach einem der Ansprüche 1 bis 9, wobei die mehreren Spezifikationen eine Externe-Komponenten-Zwischenverbindung-Express (Peripheral Component Interconnect Express) Spezifikation und eine universeller-serieller Bus (Universal-Serial-Bus) Spezifikation aufweisen.
EP08164018A 2007-09-14 2008-09-10 Peripheriegerät des Kartentyps Expired - Fee Related EP2040174B1 (de)

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CN101387944B (zh) 2011-06-08
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EP2040174A1 (de) 2009-03-25
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CN101387944A (zh) 2009-03-18
TWI390449B (zh) 2013-03-21
US7925812B2 (en) 2011-04-12
JP2009070255A (ja) 2009-04-02
KR101493527B1 (ko) 2015-02-13
US20090077295A1 (en) 2009-03-19

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