EP2021930A4 - APPARATUS AND METHOD FOR ESTABLISHING DEVICE IDENTIFIERS TO INTERCONNECT SERIAL DEVICES - Google Patents
APPARATUS AND METHOD FOR ESTABLISHING DEVICE IDENTIFIERS TO INTERCONNECT SERIAL DEVICESInfo
- Publication number
- EP2021930A4 EP2021930A4 EP07719813A EP07719813A EP2021930A4 EP 2021930 A4 EP2021930 A4 EP 2021930A4 EP 07719813 A EP07719813 A EP 07719813A EP 07719813 A EP07719813 A EP 07719813A EP 2021930 A4 EP2021930 A4 EP 2021930A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- device identifiers
- interconnected devices
- establishing device
- serially interconnected
- serially
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
- G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0052—Assignment of addresses or identifiers to the modules of a bus system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Memory System (AREA)
- Small-Scale Networks (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US80264506P | 2006-05-23 | 2006-05-23 | |
| PCT/CA2007/000891 WO2007134444A1 (en) | 2006-05-23 | 2007-05-18 | Apparatus and method for establishing device identifiers for serially interconnected devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP2021930A1 EP2021930A1 (en) | 2009-02-11 |
| EP2021930A4 true EP2021930A4 (en) | 2011-04-20 |
Family
ID=38722902
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP07719813A Withdrawn EP2021930A4 (en) | 2006-05-23 | 2007-05-18 | APPARATUS AND METHOD FOR ESTABLISHING DEVICE IDENTIFIERS TO INTERCONNECT SERIAL DEVICES |
Country Status (7)
| Country | Link |
|---|---|
| EP (1) | EP2021930A4 (enExample) |
| JP (3) | JP5118130B2 (enExample) |
| KR (3) | KR101443002B1 (enExample) |
| CN (1) | CN101449251B (enExample) |
| CA (1) | CA2651434A1 (enExample) |
| TW (2) | TW201430568A (enExample) |
| WO (1) | WO2007134444A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8781053B2 (en) | 2007-12-14 | 2014-07-15 | Conversant Intellectual Property Management Incorporated | Clock reproducing and timing method in a system having a plurality of devices |
| US8307180B2 (en) | 2008-02-28 | 2012-11-06 | Nokia Corporation | Extended utilization area for a memory device |
| US8874824B2 (en) | 2009-06-04 | 2014-10-28 | Memory Technologies, LLC | Apparatus and method to share host system RAM with mass storage memory RAM |
| US8312088B2 (en) * | 2009-07-27 | 2012-11-13 | Sandisk Il Ltd. | Device identifier selection |
| US8392614B2 (en) | 2009-07-27 | 2013-03-05 | Sandisk Il Ltd. | Device identifier selection |
| TWI386812B (zh) * | 2009-08-26 | 2013-02-21 | Wistron Corp | 週邊裝置、寫入治具以及具此週邊裝置之電子設備 |
| JP5150591B2 (ja) | 2009-09-24 | 2013-02-20 | 株式会社東芝 | 半導体装置及びホスト機器 |
| TWI456406B (zh) | 2011-10-17 | 2014-10-11 | Acer Inc | 電子系統與管理方法 |
| US9417998B2 (en) | 2012-01-26 | 2016-08-16 | Memory Technologies Llc | Apparatus and method to provide cache move with non-volatile mass memory system |
| US9311226B2 (en) | 2012-04-20 | 2016-04-12 | Memory Technologies Llc | Managing operational state data of a memory module using host memory in association with state change |
| US9766823B2 (en) | 2013-12-12 | 2017-09-19 | Memory Technologies Llc | Channel optimized storage modules |
| BR112020020736A2 (pt) * | 2018-04-12 | 2021-01-19 | Lexmark International, Inc. | Comunicação entre um dispositivo de formação de imagem e um item de suprimento substituível |
| TWI668632B (zh) * | 2018-10-08 | 2019-08-11 | 新唐科技股份有限公司 | 控制方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5204669A (en) * | 1990-08-30 | 1993-04-20 | Datacard Corporation | Automatic station identification where function modules automatically initialize |
| US6256324B1 (en) * | 1997-09-10 | 2001-07-03 | Cisco Technology, Inc. | Chip address allocation through a serial data ring on a stackable repeater |
| US20020188781A1 (en) * | 2001-06-06 | 2002-12-12 | Daniel Schoch | Apparatus and methods for initializing integrated circuit addresses |
| US6658509B1 (en) * | 2000-10-03 | 2003-12-02 | Intel Corporation | Multi-tier point-to-point ring memory interface |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55102034A (en) * | 1979-01-26 | 1980-08-04 | Mitsubishi Electric Corp | Set unit for unit address |
| JP2740063B2 (ja) * | 1990-10-15 | 1998-04-15 | 株式会社東芝 | 半導体記憶装置 |
| JPH11272601A (ja) * | 1998-03-24 | 1999-10-08 | Fuji Electric Co Ltd | カスケード接続カード、このカードにより構成されるシステムにおけるid割付け方法、及び共通バスのバス使用権優先判定方法 |
| JP2000285685A (ja) * | 1999-03-31 | 2000-10-13 | Hitachi Ltd | 半導体記憶装置 |
| JP3853537B2 (ja) * | 1999-04-30 | 2006-12-06 | 株式会社日立製作所 | 半導体メモリファイルシステム |
| JP2001084172A (ja) * | 1999-09-10 | 2001-03-30 | Nec Home Electronics Ltd | 半導体記憶装置 |
| JP3892655B2 (ja) * | 1999-09-17 | 2007-03-14 | 株式会社東芝 | 半導体集積回路装置 |
| JP4204226B2 (ja) * | 2001-12-28 | 2009-01-07 | 日本テキサス・インスツルメンツ株式会社 | デバイス識別方法、データ伝送方法、デバイス識別子付与装置、並びにデバイス |
| JP2005123685A (ja) * | 2003-10-14 | 2005-05-12 | Ricoh Co Ltd | 機器拡張方式 |
-
2007
- 2007-05-18 EP EP07719813A patent/EP2021930A4/en not_active Withdrawn
- 2007-05-18 CN CN2007800187815A patent/CN101449251B/zh not_active Expired - Fee Related
- 2007-05-18 CA CA002651434A patent/CA2651434A1/en not_active Abandoned
- 2007-05-18 JP JP2009511310A patent/JP5118130B2/ja not_active Expired - Fee Related
- 2007-05-18 KR KR1020137015534A patent/KR101443002B1/ko not_active Expired - Fee Related
- 2007-05-18 WO PCT/CA2007/000891 patent/WO2007134444A1/en not_active Ceased
- 2007-05-18 KR KR1020087031147A patent/KR101354376B1/ko not_active Expired - Fee Related
- 2007-05-18 KR KR1020147002806A patent/KR101392609B1/ko not_active Expired - Fee Related
- 2007-05-22 TW TW103111714A patent/TW201430568A/zh unknown
- 2007-05-22 TW TW096118202A patent/TWI439860B/zh not_active IP Right Cessation
-
2012
- 2012-07-02 JP JP2012148343A patent/JP2012208948A/ja active Pending
-
2014
- 2014-12-05 JP JP2014246974A patent/JP2015043244A/ja active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5204669A (en) * | 1990-08-30 | 1993-04-20 | Datacard Corporation | Automatic station identification where function modules automatically initialize |
| US6256324B1 (en) * | 1997-09-10 | 2001-07-03 | Cisco Technology, Inc. | Chip address allocation through a serial data ring on a stackable repeater |
| US6658509B1 (en) * | 2000-10-03 | 2003-12-02 | Intel Corporation | Multi-tier point-to-point ring memory interface |
| US20020188781A1 (en) * | 2001-06-06 | 2002-12-12 | Daniel Schoch | Apparatus and methods for initializing integrated circuit addresses |
Non-Patent Citations (1)
| Title |
|---|
| See also references of WO2007134444A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015043244A (ja) | 2015-03-05 |
| EP2021930A1 (en) | 2009-02-11 |
| WO2007134444A1 (en) | 2007-11-29 |
| JP5118130B2 (ja) | 2013-01-16 |
| TWI439860B (zh) | 2014-06-01 |
| CA2651434A1 (en) | 2007-11-29 |
| JP2012208948A (ja) | 2012-10-25 |
| KR101443002B1 (ko) | 2014-09-23 |
| KR101392609B1 (ko) | 2014-05-08 |
| KR20140029537A (ko) | 2014-03-10 |
| CN101449251B (zh) | 2011-05-11 |
| CN101449251A (zh) | 2009-06-03 |
| JP2009538065A (ja) | 2009-10-29 |
| KR20130081320A (ko) | 2013-07-16 |
| TW200819981A (en) | 2008-05-01 |
| KR20090031516A (ko) | 2009-03-26 |
| TW201430568A (zh) | 2014-08-01 |
| KR101354376B1 (ko) | 2014-01-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| 17P | Request for examination filed |
Effective date: 20081201 |
|
| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR |
|
| AX | Request for extension of the european patent |
Extension state: AL BA HR MK RS |
|
| RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: MOSAID TECHNOLOGIES INCORPORATED |
|
| A4 | Supplementary search report drawn up and despatched |
Effective date: 20110323 |
|
| DAX | Request for extension of the european patent (deleted) | ||
| 17Q | First examination report despatched |
Effective date: 20120913 |
|
| RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20151201 |