EP1973148A3 - Gravure de masque en carbone amorphe sans halogène disposant d'une forte sélectivité aux photorésines - Google Patents

Gravure de masque en carbone amorphe sans halogène disposant d'une forte sélectivité aux photorésines Download PDF

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Publication number
EP1973148A3
EP1973148A3 EP08153089A EP08153089A EP1973148A3 EP 1973148 A3 EP1973148 A3 EP 1973148A3 EP 08153089 A EP08153089 A EP 08153089A EP 08153089 A EP08153089 A EP 08153089A EP 1973148 A3 EP1973148 A3 EP 1973148A3
Authority
EP
European Patent Office
Prior art keywords
amorphous carbon
halogen
etch
photoresist
high selectivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08153089A
Other languages
German (de)
English (en)
Other versions
EP1973148A2 (fr
Inventor
Jong Mun Kim
Judy Wang
Ajey M. Joshi
Jingbao Liu
Bryan Y. Pu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Applied Materials Inc
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of EP1973148A2 publication Critical patent/EP1973148A2/fr
Publication of EP1973148A3 publication Critical patent/EP1973148A3/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
EP08153089A 2007-03-21 2008-03-20 Gravure de masque en carbone amorphe sans halogène disposant d'une forte sélectivité aux photorésines Withdrawn EP1973148A3 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/689,389 US7807064B2 (en) 2007-03-21 2007-03-21 Halogen-free amorphous carbon mask etch having high selectivity to photoresist

Publications (2)

Publication Number Publication Date
EP1973148A2 EP1973148A2 (fr) 2008-09-24
EP1973148A3 true EP1973148A3 (fr) 2009-10-14

Family

ID=39462093

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08153089A Withdrawn EP1973148A3 (fr) 2007-03-21 2008-03-20 Gravure de masque en carbone amorphe sans halogène disposant d'une forte sélectivité aux photorésines

Country Status (7)

Country Link
US (1) US7807064B2 (fr)
EP (1) EP1973148A3 (fr)
JP (1) JP2008263186A (fr)
KR (1) KR20080086385A (fr)
CN (1) CN101320224A (fr)
SG (1) SG146578A1 (fr)
TW (1) TW200905726A (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2643510C (fr) 2006-02-27 2014-04-29 Microcontinuum, Inc. Formation d'outils de reproduction de motifs
KR100976647B1 (ko) * 2007-04-25 2010-08-18 주식회사 하이닉스반도체 반도체 소자의 제조 방법
US20090004875A1 (en) * 2007-06-27 2009-01-01 Meihua Shen Methods of trimming amorphous carbon film for forming ultra thin structures on a substrate
KR100919350B1 (ko) * 2008-04-24 2009-09-25 주식회사 하이닉스반도체 반도체 소자의 패턴 형성 방법
EP2144117A1 (fr) * 2008-07-11 2010-01-13 The Provost, Fellows and Scholars of the College of the Holy and Undivided Trinity of Queen Elizabeth near Dublin Procédé et système de fabrication de motifs sur une surface
JP2010283095A (ja) * 2009-06-04 2010-12-16 Hitachi Ltd 半導体装置の製造方法
US8252699B2 (en) * 2010-11-22 2012-08-28 Applied Materials, Inc. Composite removable hardmask
EP2525416A2 (fr) * 2011-05-17 2012-11-21 Intevac, Inc. Procédé de fabrication de point de contact arrière pour cellules solaires
CN102354669B (zh) * 2011-10-25 2013-02-27 上海华力微电子有限公司 硅纳米线器件的制作方法
CN103137443B (zh) * 2011-11-25 2015-11-25 中芯国际集成电路制造(上海)有限公司 无定形碳硬掩膜层的形成方法及刻蚀方法
US9589797B2 (en) 2013-05-17 2017-03-07 Microcontinuum, Inc. Tools and methods for producing nanoantenna electronic devices
US9396963B2 (en) * 2013-11-06 2016-07-19 Mattson Technology Mask removal process strategy for vertical NAND device
CN105355538A (zh) * 2014-08-21 2016-02-24 北京北方微电子基地设备工艺研究中心有限责任公司 一种刻蚀方法
US9455135B2 (en) 2014-12-07 2016-09-27 United Microelectronics Corp. Method for fabricating semiconductor device
US10049875B2 (en) 2016-03-04 2018-08-14 Tokyo Electron Limited Trim method for patterning during various stages of an integration scheme
US9852924B1 (en) * 2016-08-24 2017-12-26 Lam Research Corporation Line edge roughness improvement with sidewall sputtering
US10580661B2 (en) 2016-12-14 2020-03-03 Mattson Technology, Inc. Atomic layer etch process using plasma in conjunction with a rapid thermal activation process
CN107968094A (zh) * 2017-11-21 2018-04-27 长江存储科技有限责任公司 一种用于3d nand闪存的台阶结构成形工艺
US10811270B2 (en) * 2019-03-15 2020-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Ultra narrow trench patterning using plasma etching

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999056310A2 (fr) * 1998-04-29 1999-11-04 Applied Materials, Inc. Procede d'attaque chimique de couches a faible constante dielectrique
US6194128B1 (en) * 1998-09-17 2001-02-27 Taiwan Semiconductor Manufacturing Company Method of dual damascene etching

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6326307B1 (en) 1999-11-15 2001-12-04 Appllied Materials, Inc. Plasma pretreatment of photoresist in an oxide etch process
US6541361B2 (en) 2001-06-27 2003-04-01 Lam Research Corp. Plasma enhanced method for increasing silicon-containing photoresist selectivity
US6767824B2 (en) * 2002-09-23 2004-07-27 Padmapani C. Nallan Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask
US6900123B2 (en) 2003-03-20 2005-05-31 Texas Instruments Incorporated BARC etch comprising a selective etch chemistry and a high polymerizing gas for CD control
US7129180B2 (en) * 2003-09-12 2006-10-31 Micron Technology, Inc. Masking structure having multiple layers including an amorphous carbon layer
US6911399B2 (en) 2003-09-19 2005-06-28 Applied Materials, Inc. Method of controlling critical dimension microloading of photoresist trimming process by selective sidewall polymer deposition
US7572386B2 (en) * 2006-08-07 2009-08-11 Tokyo Electron Limited Method of treating a mask layer prior to performing an etching process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999056310A2 (fr) * 1998-04-29 1999-11-04 Applied Materials, Inc. Procede d'attaque chimique de couches a faible constante dielectrique
US6194128B1 (en) * 1998-09-17 2001-02-27 Taiwan Semiconductor Manufacturing Company Method of dual damascene etching

Also Published As

Publication number Publication date
US20080230511A1 (en) 2008-09-25
CN101320224A (zh) 2008-12-10
JP2008263186A (ja) 2008-10-30
US7807064B2 (en) 2010-10-05
SG146578A1 (en) 2008-10-30
KR20080086385A (ko) 2008-09-25
EP1973148A2 (fr) 2008-09-24
TW200905726A (en) 2009-02-01

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