EP1933553A1 - Hochfrequenzschaltung mit parallel zur integrierten Schaltung installiertem Hochfrequenzfilter - Google Patents

Hochfrequenzschaltung mit parallel zur integrierten Schaltung installiertem Hochfrequenzfilter Download PDF

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Publication number
EP1933553A1
EP1933553A1 EP07023360A EP07023360A EP1933553A1 EP 1933553 A1 EP1933553 A1 EP 1933553A1 EP 07023360 A EP07023360 A EP 07023360A EP 07023360 A EP07023360 A EP 07023360A EP 1933553 A1 EP1933553 A1 EP 1933553A1
Authority
EP
European Patent Office
Prior art keywords
integrated circuit
frequency
disposed
filter
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP07023360A
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English (en)
French (fr)
Inventor
Masaki Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alps Alpine Co Ltd
Original Assignee
Alps Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alps Electric Co Ltd filed Critical Alps Electric Co Ltd
Publication of EP1933553A1 publication Critical patent/EP1933553A1/de
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15—Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17—Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/455—Demodulation-circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/41—Structure of client; Structure of client peripherals
    • H04N21/426—Internal components of the client ; Characteristics thereof
    • H04N21/42607—Internal components of the client ; Characteristics thereof for processing the incoming bitstream
    • H04N21/4263—Internal components of the client ; Characteristics thereof for processing the incoming bitstream involving specific tuning arrangements, e.g. two tuners
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards

Definitions

  • the present invention relates to a high-frequency circuit in which a high-frequency filter is parallel installed to an integrated circuit.
  • a television tuner that has a mixer for converting an UHF band television signal or a VHF band television signal into an intermediate band television signal by converting the frequency of the UHF or VHF band television signal, an intermediate frequency band amplifier for amplifying the intermediate frequency band television signal, and a SAW filter, which includes a trap circuit for attenuating video and audio intermediate frequency signals of a channel adjacent to the intermediate frequency band, interposed between the mixer and the intermediate frequency amplifier has been proposed (for example, see JP-A-H11-69245 or JP-A-2003-318754 ).
  • Fig. 2 is a diagram illustrating the configuration of a television tuner described in JP-A-11-69245 .
  • a television signal of a specific channel in the UHF or VHF band selected by a tuning circuit or the like, which is not shown in the figure, is input to a mixer 101 through an input terminal 101a, and a local oscillator signal is input to the mixer 101 from a local oscillator 102.
  • the mixer 101 the input UHF or VHF band television signal is mixed with the local oscillator signal, and thereby being converted into an intermediate frequency band television signal.
  • the intermediate frequency band television signal will be abbreviated as an intermediate frequency signal.
  • the intermediate frequency signal output from the mixer 101 is input to an intermediate frequency amplifier 104 through a SAW (surface acoustic wave) filter 103 that is an intermediate frequency band pass filter.
  • the intermediate frequency signal input to the intermediate frequency amplifier 104 is amplified and is detected by a video detector 105 having a synchronization detecting circuit, and a video signal V is output from the video detector 105.
  • the mixer 101, the intermediate frequency amplifier 104, and the video detector 105 are configured as one integrated circuit 108.
  • output terminals 101b and 101c of the mixer 101 and input terminals 104a and 104b of the intermediate frequency amplifier 104 are disposed.
  • Input terminals 103a and 103b of the SAW filter 103 are connected to the output terminals 101 b and 101c of the mixer 101 through a capacitor 106.
  • output terminals 103c and 103d of the SAW filter 103 are connected to the input terminals 104a and 104b of the intermediate frequency amplifier 104 through a capacitor 107.
  • the SAW filter 103 is connectable in a simple manner and the intermediate frequency amplifier 104 and the video detector 105 can be directly connected together, and thereby the configuration of the integrated circuit 108 becomes simple.
  • the output terminals 101 b and 101c of the SAW filter 103 and the input terminals 104a and 104b thereof are disposed to be adjacent to each other on one side of the integrated circuit 108, the input and output sides of the SAW filter 103 are capacitively coupled, and thereby there is a problem that the original characteristics of the SAW filter 103 cannot be acquired.
  • terminal pitches (for example 1.78 mm to 2.5 mm) of the SAW filter 103 are much larger than terminal pitches (for example, 0.5 mm to 0.65 mm) of the output terminals 101 b and 101 c and the input terminals 104a and 104b which are disposed on one side of the integrated circuit 108, there is a problem that it is difficult to effectively use a mounting space for disposition of the SAW filter 103 and the peripheral components.
  • the present invention is designed to solve the above-described problems, and an object of the invention is to provide a high-frequency circuit capable of acquiring the original transmission characteristics of a filter by preventing capacitive coupling between input and output terminals of the filter externally attached to the integrated circuit and effectively using a mounting space.
  • a high-frequency circuit includes a rectangular integrated circuit having first and second sides which face with each other and third and fourth sides which face with each other, a high-frequency filter disposed to be adjacent to the third side which is one side of the integrated circuit and is interposed between the first and second sides and having an input terminal disposed on a first side and an output terminal disposed on a second side, a first terminal, which is connected to the input terminal of the high-frequency filter, disposed in a position of the first side of the integrated circuit on a high-frequency filter side, and a second terminal, which is connected to the output terminal of the high-frequency filter, disposed in a position of the second side of the integrated circuit on a high-frequency filter side.
  • the first terminal is disposed on the first terminal of the integrated circuit forming a rectangular shape and the second terminal is disposed on the second side of the integrated circuit, and thus, a capacitive coupling circuit is not formed between the first and second terminals used as input and output terminals of the integrated circuit, and thereby it is possible to prevent deterioration of transmission characteristics of the high-frequency filter due to capacitive coupling of the input and output terminals of the high frequency filter.
  • terminal pitches can be formed to be appropriate for the scale of the high frequency filter, compared to a structure in which the input and output terminals of the integration circuit are disposed adjacently, and thereby it is possible to use the mounting space effectively.
  • the high-frequency filter may be a SAW filter.
  • peripheral terminals adjacent to the first and second terminals are in a low impedance state.
  • the high-frequency circuit it may be configured that a television signal is converted into an intermediate frequency signal by the integrated circuit, the intermediate frequency signal is input to the high-frequency filter through the first terminal, an unnecessary frequency component is removed from the intermediate frequency signal by the high-frequency filter, the intermediate frequency signal from which the unnecessary frequency component has been removed is input to the integrated circuit through the second terminal again, and an output signal optimized for digital television signal processing is acquired.
  • the original transmission characteristics of a filter by preventing capacitive coupling between input and output terminals of the filter externally attached to the integrated circuit can be acquired and the mounting space can be effectively used.
  • Fig. 1 is a diagram illustrating disposition of an integrated circuit of a television tuner according to an embodiment of the present invention and peripheral circuits thereof. Since the whole configuration of the television tuner is basically the same as shown in Fig. 2 , a description thereof is omitted, here.
  • the integrated circuit 10 is disposed on a circuit substrate of the television tuner which is not shown in the figure.
  • This integrated circuit 10 is in the shape of a rectangular and has a pair of left and right long sides 10a and 10b and a pair of upper and lower short sides 10c and 10d.
  • the pair of long sides 10a and 10b correspond to the first and second sides
  • the pair of short sides 10c and 10d correspond to the fourth and third sides.
  • the integrated circuit 10 has a square shape, there is no difference between the long sides and the short sides.
  • a mixer 11 Inside the integrated circuit 10, a mixer 11, a first intermediate frequency amplifier 12, a second intermediate frequency amplifier 13, a variable gain amplifier 14, and other circuit components used for acquiring a video signal are installed.
  • a SAW filter 15 is disposed in a position facing the short side 10d of the integrated circuit 10 and close to the short side 10d
  • an RF input terminal 21 to which an RF signal supplied from an antenna side is applied and IC output terminals 22a and 22b used as the first terminals for outputting a balanced output of the second intermediate frequency amplifier 13 outside the integrated circuit are disposed.
  • ground terminals 23a and 23b are disposed to interpose the IC output terminals 22a and 22b therebetween.
  • the IC output terminals 22a and 22b are connected to input terminals 24a and 24b of the SAW filter 15 through wiring patterns 25a and 25b.
  • IC input terminals 26a and 26b used as second terminals for inputting an output signal of the SAW filter 15 to the inside of the integrated circuit are disposed to have a predetermined terminal pitch.
  • ground terminals 27a and 27b are disposed to interpose the IC input terminals 26a and 26b therebetween.
  • Output terminals 28a and 28b of the SAW filter 15 are connected to the IC input terminals 26a and 26b through wiring patterns 29a and 29b.
  • a coupling circuit 30 is disposed in a position facing the other long side 10b of the integrated circuit 10 and close to the other long side.
  • an output terminal 31 a for outputting an unbalanced output of the first intermediate frequency amplifier 12 outside the integrated circuit and an input terminal 31 b for inputting an unbalanced output of the coupling circuit 30 to the integrated circuit are provided.
  • the mixer 11, the first intermediate frequency amplifier 12, and the second intermediate frequency amplifier 13 are disposed on the one long side 10a side, and the variable gain amplifier 14 is disposed on the other long side 10b side.
  • a ground pattern 41 is formed so as to separate the one long side 10a side and the other long side 10b side from the center of the integrated circuit.
  • This ground pattern 41 extends to the SAW filter 15 and separates the input terminals 24a and 24b disposed on one short side (a side on the same side as the one long side 10a) of the SAW filter 15 and the output terminals 28a and 28b disposed on the other short side (a side on the same side as the other long side 10b) from the center of the SAW filter 15.
  • a ground pattern 42 connecting the ground terminal 23a disposed on the one long side 10a side to the ground terminal 27a disposed on the other long side 10b side is formed horizontally.
  • a ground pattern 43 connecting the ground terminal 23b disposed on the one long side 10a side to a center ground pattern 41 is formed horizontally.
  • the ground terminal 27b adjacent to the IC input terminal 26b disposed on the other long side 10b side is grounded for high frequencies by being connected to the ground pattern 41 through a capacitor 44.
  • a television signal of a specific channel is input to the inside of the integrated circuit 10 from the RF input terminal 21 and is mixed with a local oscillator signal by the mixer 11, and thereby being frequency-converted into an intermediate frequency signal.
  • the intermediate frequency signal output from the mixer 101 is amplified by the first intermediate frequency amplifier 12 and is output from the output terminal 31a to the coupling circuit 30 as an unbalanced output.
  • a frequency component of a lower adjacent channel of a selected channel for reception is removed from the amplified intermediate frequency signal by the coupling circuit 30, and then the intermediate frequency signal is input to the input terminal 31b of the integrated circuit 10 again as an unbalanced input.
  • the intermediate frequency signal applied to the input terminal 31b of the integrated circuit 10 is input to the second intermediate frequency amplifier 13.
  • the intermediate frequency signal amplified by the second intermediate frequency amplifier 13 is output from the IC output terminals 22a and 22b to the SAW filter 15 other than the integrated circuit 10, as a balanced output.
  • a digital television signal component is extracted from the intermediate frequency signal by the SAW filter 15.
  • An intermediate frequency signal having the digital television signal component extracted by the SAW filter 15 is output from the output terminals 28a and 28b and is applied to the IC input terminals 26a and 26b of the integrated circuit 10.
  • the gain of the intermediate frequency signal applied to the IC input terminals 26a and 26b of the integrated circuit 10 is adjusted by the variable gain amplifier 14, and the intermediate frequency signal having the adjusted gain is supplied to a digital television detecting circuit not shown in the figure and is demodulated.
  • the IC output terminals 22a and 22b of the integrated circuit 10 connected to the input terminals 24a and 24b of the SAW filter 15 are disposed on one long side 10a of the integrated circuit 10
  • the IC input terminals 26a and 26b of the integrated circuit 10 connected to the output terminals 28a and 28b of the SAW filter 15 are disposed on the other long side 10b of the integrated circuit 10.
  • the IC output terminals 22a and 22b of the integrated circuit 10 and the IC input terminals 26a and 26b of the integrated circuit 10 are disposed on the long sides 10a and 10b located separately on opposite sides.
  • the problem that the IC output terminals 22a and 22b of the integrated circuit 10 and the IC input terminals 26a and 26b thereof are capacitively coupled can be solved, and thereby deterioration of the transmission characteristics of the SAW filter 15 due to formation of a capacitive coupling circuit between the input terminals 24a and 24b of the SAW filter 15 and the output terminals 28a and 28b thereof can be prevented.
  • terminal pin pitches of the input and output terminals of the integrated circuit side can be formed in a size appropriate for the scale of the SAW filter 15, and thereby it is possible to use the mounting space effectively.
  • the ground pattern 41 is disposed between the IC output terminals 22a and 22b and the IC input terminals 26a and 26b, terminals (the ground terminals 23a and 23b) adjacent to the IC output terminals 22a and 22b are grounded, and a terminal (the ground terminal 27a) adjacent to the input terminal 26a is grounded, and a terminal (the ground terminal 27b) adjacent to the input terminal 26b is grounded for high frequencies. Accordingly, the terminals adjacent to the IC output terminals 22a and 22b and the IC input terminals 26a and 26b can be in a low impedance state, and thereby it is possible to prevent interferences between circuits.
  • the SAW filter 15 has been described as a filter connected between the IC output terminals 22a and 22b of the integrated circuit 10 and the IC input terminals 26a and 26b of the integrated circuit 10, as an example, any type of filter may be used.
  • the present invention is not limited to an integrated circuit of a television tuner and may be applied to a high-frequency circuit in which a high frequency filter having desired characteristics is connected to an integrated circuit similarly.
  • the present invention can be applied to a television tuner in which a high-frequency filter is parallel installed to an integrated circuit.

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Superheterodyne Receivers (AREA)
  • Structure Of Receivers (AREA)
EP07023360A 2006-12-11 2007-12-03 Hochfrequenzschaltung mit parallel zur integrierten Schaltung installiertem Hochfrequenzfilter Withdrawn EP1933553A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006333048A JP4261576B2 (ja) 2006-12-11 2006-12-11 高周波回路及びテレビジョンチューナ

Publications (1)

Publication Number Publication Date
EP1933553A1 true EP1933553A1 (de) 2008-06-18

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP07023360A Withdrawn EP1933553A1 (de) 2006-12-11 2007-12-03 Hochfrequenzschaltung mit parallel zur integrierten Schaltung installiertem Hochfrequenzfilter

Country Status (5)

Country Link
US (1) US8422980B2 (de)
EP (1) EP1933553A1 (de)
JP (1) JP4261576B2 (de)
KR (1) KR20080053892A (de)
CN (1) CN101202859B (de)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1169245A (ja) 1997-08-19 1999-03-09 Alps Electric Co Ltd テレビジョン信号の中間周波回路
EP1005155A1 (de) * 1998-11-27 2000-05-31 Alps Electric Co., Ltd. Fernsehsignalempfängstuner
EP1328064A1 (de) * 2002-01-15 2003-07-16 Alps Electric Co., Ltd. Integrierter Fernsehtuner
JP2003318754A (ja) 2002-04-24 2003-11-07 Alps Electric Co Ltd テレビジョンチューナ
US20050040896A1 (en) * 2003-08-22 2005-02-24 Koichi Yahagi High frequency semiconductor integrated circuit device, wireless electric unit and wireless communication system
US20050101282A1 (en) * 1999-04-15 2005-05-12 Kumiko Takikawa Semiconductor integrated circuit
US20050201175A1 (en) * 2004-02-05 2005-09-15 Josef Fenk Radio frequency arrangement, method for producing a radio frequency arrangement and use of the radio frequency arrangement

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376148A (ja) * 1989-08-17 1991-04-02 Mitsubishi Electric Corp 混成集積回路装置
US5777529A (en) * 1996-10-10 1998-07-07 Northern Telecom Limited Integrated circuit assembly for distributed broadcasting of high speed chip input signals

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1169245A (ja) 1997-08-19 1999-03-09 Alps Electric Co Ltd テレビジョン信号の中間周波回路
EP1005155A1 (de) * 1998-11-27 2000-05-31 Alps Electric Co., Ltd. Fernsehsignalempfängstuner
US20050101282A1 (en) * 1999-04-15 2005-05-12 Kumiko Takikawa Semiconductor integrated circuit
EP1328064A1 (de) * 2002-01-15 2003-07-16 Alps Electric Co., Ltd. Integrierter Fernsehtuner
JP2003318754A (ja) 2002-04-24 2003-11-07 Alps Electric Co Ltd テレビジョンチューナ
US20050040896A1 (en) * 2003-08-22 2005-02-24 Koichi Yahagi High frequency semiconductor integrated circuit device, wireless electric unit and wireless communication system
US20050201175A1 (en) * 2004-02-05 2005-09-15 Josef Fenk Radio frequency arrangement, method for producing a radio frequency arrangement and use of the radio frequency arrangement

Also Published As

Publication number Publication date
US8422980B2 (en) 2013-04-16
JP4261576B2 (ja) 2009-04-30
CN101202859B (zh) 2010-09-01
JP2008148015A (ja) 2008-06-26
US20080136558A1 (en) 2008-06-12
CN101202859A (zh) 2008-06-18
KR20080053892A (ko) 2008-06-16

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