Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
  • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
  • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
  • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
  • H01L21/045—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide passivating silicon carbide surfaces
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
  • H01L21/048—Making electrodes
  • H01L21/0485—Ohmic electrodes
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/0001—Technical content checked by a classifier
  • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T428/00—Stock material or miscellaneous articles
  • Y10T428/31504—Composite [nonstructural laminate]
  • Y10T428/31678—Of metal

Definitions

• the present invention relates to a method of metallizing the surface of a semiconductor material, in particular using hydrogen, as well as the metallized surface material obtained by this method.
• the invention has many applications, including microelectronics.
• metal contacts must be formed. This is commonly done by depositing layers of a metal that can be chosen in particular from Au, Al, Cu and transition metals such as Ti, W and Ni.
• the present invention aims to overcome the above disadvantages.
• the method which is the subject of the invention makes it possible not only to use very thin metal layers but also to obtain steep interfaces.
• This method which is the subject of the invention makes it possible to work with precision on the atomic scale and therefore on the level of the atomic layer. It thus makes it possible to obtain an abrupt interface between two layers with distinct electrical properties. For example, it provides a steep interface between a metal layer and a semiconductor layer.
• the subject of the present invention is a process for treating a semiconductor material, with a view to putting the surface of this material in a conductive electrical state, this method being characterized in that it comprises the following steps:
• this surface is prepared so that it has bonds capable of adsorbing hydrogen atoms or atoms of at least one metallic element
• a passivation step in which one or more layers, preferably immediately underlying this surface, are passed by exposing this surface to a passivation compound, and a metallization step in which the surface is metallized by exposing this surface; to hydrogen atoms or atoms of the metal element, the preparation and combination of the surface with hydrogen or metal element cooperating to obtain the conductive electrical state of the surface, the method optionally further comprising a partial depassivation step of the passivated layer or layers, which follows the passivation step.
• the order of the steps may be arbitrary: in this process, for example, the following order may be used for these steps: preparation, then passivation, then possibly depassivation, then metallization, or passivation, then possibly depassivation, and then preparation, then metallization.
• the depassivation step follows the passivation step and is itself followed by the preparation step and then by the metallization step.
• the semiconductor material is preferably monocrystalline.
• the passivation of the layer or layers is carried out by oxidation of this layer or these layers, exposing the surface to an oxidizing compound.
• the passivation of the layer or layers is performed by oxynitriding this layer or layers, exposing the surface to an oxynitriding compound.
• the passivation of the layer or layers is carried out by nitriding this layer or these layers, exposing the surface to a nitriding compound.
• bonds capable of absorbing hydrogen atoms or atoms of the metal element are preferably dangling bonds.
• the semiconductor material is silicon carbide.
• the surface of the silicon carbide is prepared so as to have, on the atomic scale, a controlled organization of 3 ⁇ 2 symmetry.
• the layers that are passive may be layers immediately underlying the surface.
• the metallized surface is exposed to oxygen to enhance the metallization of this surface.
• the present invention also relates to a semiconductor material, preferably monocrystalline, the surface of which is metallized by the treatment method of the invention.
• the present invention also relates to a solid composite material comprising a semiconductor substrate whose surface is metallized, this material being characterized in that this surface covers one or more atomic layers of the substrate, which are passivated and are preferably immediately underlying this surface, and in that the interface between the passivated atomic layer (s) and the substrate as well as the interface between the passivated atomic layer (s) and the metallized surface are steep.
• rupt interface means an interface in which there is a sudden change in composition and / or structure between the two materials on either side of the interface.
• this abrupt change occurs in a space consisting of two to three monoatomic layers.
• the metallized layer has a thickness of 1 to 3 monoatomic layers.
• the surface has pendant bonds, this surface being metallized, that is to say made electrically conductive, by adsorption of hydrogen atoms or atoms of a metal element.
• the material is preferably silicon carbide of cubic structure, the surface of which has, on the atomic scale, a controlled organization of 3 ⁇ 2 symmetry.
• the present invention also relates to a method of manufacturing an electrical contact on the surface of a semiconductor material, in which this contact is made by metallizing the surface of the material by the treatment method of the invention.
• the present invention also relates to a method of manufacturing an interface between a semiconductor material and a biological material, in which this interface is manufactured by metallizing the surface of the material by the treatment method that is the subject of the invention.
• the present invention furthermore relates to a method for reducing the coefficient of friction of a surface of a semiconductor material, in which this surface is metallized by the treatment method that is the subject of the invention.
• a method of treating a semiconductor material according to the invention is described below. This method makes it possible to put the surface of this material in a conductive electrical state.
• This material for example silicon carbide, is preferably monocrystalline.
• the surface of the material is prepared so that this surface has bonds capable of adsorbing hydrogen atoms. Preferably, they are pendant bonds.
• passivation of one or more layers immediately underlying the surface thus prepared is carried out by exposing it to a suitable compound, allowing this passivation. We will come back to this step later.
• the surface thus prepared is metallized by exposing it to hydrogen atoms.
• the surface is exposed with 3x2 symmetry to atomic hydrogen.
• ultrapure molecular hydrogen is used which is decomposed by means of an incandescent tungsten filament placed 2 cm from the sample.
• the surface is maintained at a temperature equal to 300 ° C. The preparation of the surface and the combination of this surface with hydrogen cooperate to obtain the conductive electrical state of the surface.
• MOS metal-oxide-semiconductor
• the oxidation of these layers is preferably carried out by exposing the surface, for example, to molecular oxygen or oxygen-containing molecule, such as H 2 O, CO or CO 2 , or ii) oxynitriding these layers, for example by exposing the surface to NO or N 2 O, or i ⁇ ) nitriding these layers, by exposing the surface for example NH 3 or N 2 .
• molecular oxygen or oxygen-containing molecule such as H 2 O, CO or CO 2
• ii) oxynitriding these layers for example by exposing the surface to NO or N 2 O, or i ⁇ ) nitriding these layers, by exposing the surface for example NH 3 or N 2 .
• the oxygen-containing molecule is not exclusively in gaseous form. It may be in the form of fine droplets that is to say in nebulized form or a saturated atmosphere (water vapor for example).
• the surface which is prepared so that it can adsorb hydrogen atoms is preferably a surface which has been prepared in such a way that Atomic scale, a controlled organization of 3x2 symmetry.
• the material may have a 3C-SiC (100) 3 ⁇ 2 surface which is rich in silicon.
• Such a preparation can be done in the following way: using a silicon source heated at 1300 ° C., several monolayers of silicon are deposited on the surface of the substrate. With the aid of thermal annealing, a portion of the deposited silicon is evaporated in a controlled manner until the surface has an atomic scale organization.
• one or more layers selected from among the layers immediately underlying the surface are passive.
• the layer having the number 3 or 4 is passivated, while leaving the upper layers unpassivated.
• the metallization is not limited to the outermost layer: it can be done on more than one atomic layer and can, for example, extend over the first three layers.
• the metallization is confined to the first outermost layer of the surface, it can be envisaged that semiconductor layers are interposed between the metallized outer layer and the deeper passivated layers.
• one or more layers of semiconductor material may be interposed between the metallized surface and the underlying layers. passivated jacques.
• Si-terminated semiconductor material Si the structure of the material is as follows:
• This metal element may be chosen for example from metals whose band d is solid, jellium type metals, alkali metals (such as Cs, Rb, K or Na, in particular Na and K), and transition metals. and money.
• the surface so that it has bonds capable of adsorbing atoms of the metal element it is possible to proceed as follows: using a silicon source heated to 1300 ° C. C, several monolayers of silicon are deposited on the surface of the substrate. With the aid of thermal annealing, a portion of the deposited silicon is evaporated in a controlled manner until the surface has an atomic scale organization.
• thermal annealing can be carried out in order to evaporate a portion of the metal element in a controlled manner and to organize the deposition.
• Metallization obtained by means of hydrogen atoms or atoms of a metal element, can be enhanced by further exposure to oxygen.
• oxygen for example, after having metallized, by means of hydrogen, a pre-oxidized surface of SiC, the same surface was again exposed to oxygen and it was found that it was necessary to annealing at a higher temperature to remove hydrogen and thus metallization.
• the post-oxidation protects the metallization or, in a way, passive this metallization. Therefore, with respect to the process that is described in document (1), metallization is enhanced.
• a clean surface of SiC rich in silicon, or finished Si is slightly pre-oxidized by exposure to oxygen ranging from 1 langmuir to 1000 langmuirs (1 langmuir (IL) being equal to 10 ⁇ 6 torr. second is to say about 10 "4 Pa. s) by maintaining that surface at a temperature in the range from 25 0 C to 800 ° C.
• the surface thus oxidized is exposed to atomic hydrogen (which can be obtained by exciting dihydrogen by a hot tungsten filament), the exposure ranging from a few langmuirs to a few hundred langmuirs.
• atomic hydrogen which can be obtained by exciting dihydrogen by a hot tungsten filament
• the metallization of the preoxidized surface is then obtained.
• an additional step of "depassivation” is carried out, consisting of a rapid thermal annealing at high temperature which partially removes the oxides. native.
• This step is of course followed by the step of preparing the surface and the metallization step.
• the passivated underlying zone thus obtained is relatively localized and extends at most only in a few layers. It remains interesting for the manufacture of MOS transistors, the interfaces are still sufficiently steep.
• the duration of the thermal annealing can be of the order of a few seconds to a few minutes and the temperature during this annealing can be of the order of 700 0 C to 1300 0 C.
• SiC (100), rich in Si, having two oxidation states and having a 3x2 pattern by LEED (low energy electron diffraction).
• Exposures to atomic hydrogen are carried out at 300 ° C., using laboratory grade hydrogen (research grade H 2 ) which is dissociated by a heated tungsten filament.
• the present invention highlights novel and very original properties that open the way to applications in the fields of electronics, mechanics, biocompatibility, nanotechnologies and microfabrication.
• the metallization of the surface of a semiconductor, which one has previously oxidized / passivated, is an absolutely unprecedented property.
• a silicon carbide substrate 2 for example of cubic structure, whose surface 4 has been metallized according to the invention, using atomic hydrogen or atoms of a metal element.
• a layer 5 which was passivated prior to metallization.
• the obtaining of an ohmic contact results from such a metallization, carried out locally on the substrate.
• the metallization with hydrogen is very interesting in the field of biocompatibility, to manufacture devices having interfaces between an electronic material and a biological material.
• hydrogen is biocompatible - it is an essential element of living matter - and so is silicon carbide.
• the surface 4, metallized by means of hydrogen, can constitute such an interface between the material 2 and a biological material 6.
• the metallization with hydrogen makes it possible to reduce the coefficient of friction of the surface of SiC and other semiconductors, in particular diamond.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Chemical & Material Sciences (AREA)
• Crystallography & Structural Chemistry (AREA)
• Electrodes Of Semiconductors (AREA)
• Insulated Gate Type Field-Effect Transistor (AREA)

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• 2004
  • 2004-06-21 FR FR0406751A patent/FR2871936B1/fr not_active Expired - Fee Related
• 2005
  • 2005-06-20 US US11/630,452 patent/US20080026231A1/en not_active Abandoned
  • 2005-06-20 JP JP2007517381A patent/JP2008503889A/ja active Pending
  • 2005-06-20 WO PCT/FR2005/050469 patent/WO2006005869A1/fr not_active Application Discontinuation
  • 2005-06-20 EP EP05778242A patent/EP1759406A1/de not_active Withdrawn

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