Classifications

• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
  • H03H11/00—Networks using active elements
  • H03H11/02—Multiple-port networks
  • H03H11/04—Frequency selective two-port networks
  • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
  • H03H11/1291—Current or voltage controlled filters

Definitions

• the present invention relates to a controlled tuning system for television receivers, and in particular, the present invention relates to tunable filters which can be incorporated in a tuner circuit for all VHF and UHF channels, including those channels having the frequencies in the low VHF band, the VHF and the UHF band.
• TV signals are transmitted in allocated radio frequency bands.
• the low-VHF band extends between 54 to 88 MHz
• the VHF band extends from 120 to 216 MHz
• UHF band extends up to 1 GHz.
• Conventional television receivers employ a tuner to tune or select the desired radio frequency (RF) signals in a given frequency range (6 MHz) to the exclusion of all other signals in order to receive the desired channel.
• RF radio frequency
• FIG. 1 is an example of a conventional tuning system which can be used for the reception of low VHF, VHF and UHF broadcast channels.
• the input RF signal on the input terminal 1 can be received from terrestrial broadcast or cable transmissions .
• the input RF signal is coupled to RF input circuits including a bandpass filter 2, a bandstop filter 3 (also known as a "trap or notch filter")/ and a RF amplifier 4 whose gain could be externally controlled.
• the output of the amplifier 4 is O 2005/081402 connected to a tuner circuit 8, which is typically an integrated circuit.
• Tuner 8 may include one or more mixers, denoted by a mixer 5, and one or more variable local oscillators, denoted by variable oscillato-r 6.
• a tuning frequencies control system 7 in IC tuner 8 generates controlling signals for tuning the operation frequency of bandpass filter 2, bandstop filter 3 and variable local oscillator 6 to receive and to select the desired channel .
• tuners such as the tuner represented in Figure 1
• the discrete components include varactors (variable capacitance diode) , inductors, capacitors and/or switchable diodes. For instance, switchable diodes are used to switch between the several allocated frequency bands.
• the va-ractors components perform a fine tuning operation for selecting a precise frequency operation within the selected frequency band.
• the remaining tuner components such as the mixer and oscillator circuits, are manufactured on an integrated circuit component, apart from the filters in the tuner.
• the filters can be integrated with, the remaining tuner circuitry using active transistors-based circuits.
• a common way to realize high-order active filters is to cascasde biquadratic filter sections (also referred to as biquad filters) .
• biquad filters are constructed using coupled pairs of transistors and capacitors. The frequency tuning is carried out by varying the current of the coupled pair.
• One of the disadvantages of active biquad filters is that their dynamic range is limited as compared to passive structures.
• the input voltage range is inferior to 2V, where V ⁇ is about 26mV at 300°K and is technology O 2005/081402 independent. Examples of tuning systems for television receivers can be found in United States Patent Nos . 4,363,135 and " 5,752,179.
• tuner with integrated filters. It is also desirable to provide filters for use in tuners that are capable of receiving an extended input voltage range.
• a tunable filter circuit includes a first differential pair and a second differential pair.
• the first differential pair has a first input terminal coupled to a first node, a second input terminal coupled to a second node, and an output terminal coupled to a first current source.
• the first differential pair is biased by a second current source.
• the second differential pair has a first input terminal coupled to the output terminal of the first differential pair, a second input terminal coupled to the second node, and an output terminal coupled to a third current source and providing an output voltage signal.
• the second differential pair is biased by a fourth current source.
• the circuit further includes a first capacitor coupled between a third node and the output terminal of the first differential pair and a second capacitor coupled between the first node and the output terminal of the second differential pair.
• the tunable filter circuit of the present invention can be configured as a bandpass filter by connecting the input voltage signal to the third node and connecting the first node to a first supply voltage, such as ground.
• the tunable filter circuit of the present invention can be configured as a bandstop filte-r by connecting the input voltage s-ignal to the first node and connecting the third node to trie first supply voltage, such as ground .
• th ⁇ e tunable filter circuit of the present invention is tuned by adjusting the current values in the first, second, thiird and fourth current sources .
• the first and second differential pairs of the tunab»le filter circuit are implemented as bipolar emitter- coupled pairs.
• a variable resistive element is introduced at the emitter termi-nals of each of the bipolar transistors in the first and second differential pairs .
• the variable resistive elements intrroduce emitter resistance at the differential pairs, effecti-vely extending the input voltage range of the tunable fiHter circuit.
• the tunable filter circuit further includes a coarse tuning system for selecting between different frequency bands of interest.
• the coarse tuning system includes a first bank of capacitors each capacitor serially connected to a respective one of a first bank of switches. Each grroup of the serially connected capacitors and switches is connected between tre third node and the output termirxal of the first differential pair.
• the coarse tuning system further includes a second bank of capacitors each capacito»r serially connected to a. respective one of a second bank of switches. Each group of the serially connected capacito s and switches is connected between the first node and the o ⁇ utput terminal of the second differential pair.
• the first and second banks of switches are controlled by corresponding control signals to selectively connect one or more of the first bank of capacitors in parallel with the first capacitor and to selectively connect one or more of the second bank of capacitors in parallel with the second capacitor.
• emitter resistance is introduced at each differential pair through a bank of transistor pairs.
• Each of the transistor pairs is controlled by a control signal for selectively turning on the respective transistor pai-trs .
• a stepwise increase or decrease in the resistive load at the emitter terminals of the differential pairs is realized.
• the voltage value of the control signal can be varied precisely to introduce precise but small variations in resistance.
• coarse tuning of the tunable filter circuit is effectuated by switching of capacitance and switching of resistance. Accordingly, trie first and second banks of capacitors are selectively connected and the banks of transistor pairs are selectively engaged for selecting a desired frequency band.
• fine tuning of the tunable filter circuit is effectuated by adjusting precisely the voltage value of the control signal controlling each transistor pair in the bank of transistor pairs.
• Figure 1 shows a conventional tuning system for the reception of low VHF, VHF and UHF broadcast channels.
• Figure 2 is a block diagram of a tuner circuit in which the integrated tunable filter of the present invention can be practiced.
• Figure 3 is a circuit diagram of a bandpass biquad filter in a single-ended topology according to one embodiment of the present invention.
• Figure 4 is a circuit diagram of a bandstop biquad filter in a single-ended topology according to one embodiment of the present invention.
• Figure 5 is a circuit diagram of a bandpass biquad filter in a single-ended topology according to an alternate embodiment of the present invention.
• Figure 6 is a circuit diagram of a bandstop biquad filter in a single-ended topology according to an alternate embodiment of the present invention.
• Figure 7 is a circuit diagram of a bandpass biquad filter in a single-ended topology according to a second alternate embodiment of the present invention.
• Figure 8 is a circuit diagram of a bandstop biquad filter in a single-ended topology according to a second alternate embodiment of the present invention.
• a tunable biquad filter for use in a tuner for low VHF, VHF and UHF reception.
• the tunable biquad filter includes two differential pairs biased by a first and a second current source respectively.
• the filter can be tuned by adjusting the values of the currents through the first and second current sources.
• the tunable biquad filter of the present invention can-, be readily integrated into an integrated circuit, enablin-g the construction of a fully integrated tuner. By obviating the use of discrete components, the size of a tuner thus constructed can be minimized and the manufacturing cos : thereof can be reduced.
• the tunable biqu «ad filter is constructed so as to provide an extended input -voltage range as compared to filters using conventional bipolar emitter-coupled pairs.
• the tunable biquad filter of the present invention can provide improved tuning performance .
• FIG. 2 is a block diagram of a tuner circuit in which the integrated tunable filter of the present invention can be practiced.
• a tuner 20 includes a RF input circuit and a tuning circuit S .
• the RF input circuit includes a bandpass filter 22 and bandstop filter 23 constructed using the tunable biqua ⁇ l filter in accordance with the present invention. Accordingly, tuner 20 can integrate bandpass filter 22 and ban-dstop filter 23 onto the same integrated circuit as tuning circuit 8, improving the performance of the tuner and reducin-g- the manufacturing cost.
• tuner 20 shown in Figure 2 is illustrative only and one of ordinary skill in the art would appreciate that the tu-nable biquad filters of the present invention can be incorpo-rated into tuners having any configurations to provide RF filtering functions.
• Another advantage of the tiunable biquad filter of the present invention is the adaptability of the basic filter circuit. That is, the basic tunable biquad filter circuit can be readily configured to provide the desired filter shape and functions as a bandpass filter or a bandstop filter. Specifically, the basic tunable biquad filter is reconfigured by coupling the input RF signal to different input nodes of the filter circuit, resulting in a different transfer function. The details of the biquad filter circuit of the present invention will be explained in more detail below with reference to Figures 3 to 6.
• Figure 3 is a circuit diagram of a biquad filter configured as a bandpass filter in a single-ended topology according to one embodiment of the present invention.
• bandpass biquad filter 100 (bandpass filter 100) includes two emitter-coupled pairs.
• the first emitter-coupled pair is made up of bipolar transistors Tl and Tl' and the second emitter-coupled pair is made up of bipolar transistors T2 and T2 ' .
• the collector terminal of transistor Tl is connected to Vcc which is the power supply voltage for the filter circuit.
• the collector terminal of transistor Tl' is connected to a current source Curl', delivering a current of value II.
• the emitter terminals of transistors Tl and Tl ' are connected together and are connected to a current source Curl which current source delivering a current equal to 2*11.
• the base terminal of transistor Tl is connected to an analogue ground voltage.
• the collector terminal of transistor T2 is connected to the Vcc voltage.
• the collector terminal of transistor T2 ' is connected to a current source Cur2 ' , delivering a current of value 12.
• the emitter terminals of transistors T2 and T2 ' are connected together and are connected to a current source Cur2 which current source delivering a current equal to 2»I2.
• the base terminal of transistor T2 is connected to the collector terminal of transistor Tl' and is also connected to a capacitor CI .
• the other plate of capacitor CH is coupled to receive the input RF signal Vin.
• the base te-rminals of transistors Tl' and T2 ' are connected togethe-ir.
• the collector of T2 ' is connected to a capacitor C2 , whose other plate is connected to the ground voltage.
• the capacitance of capacitors CI and C2 are not tine same and are selected based on the equations given below.
• a unity gain amplifier Amp-L or follower may be connected ⁇ across the collector terminal-, and the base terminal of transistor T2 ' .
• the output signal-- Vout at the collector terminal of transistor T2 ' is the same Vout signal that appears at the output terminal of amplif-Ler Ampl .
• amplifier Amp can be equivalently replaced by a wire.
• Av plifier Ampl is not required for the operation of the filter circuit but rather is included when the filter circuit is interconnected with other circuit blocks.
• Amplifier Ampl bu fers the output signal Vout and prevents the subsequent circuit blocks from interfering with the operation of the filter circuit .
• the center frequency and the 3-dB bandwidth of bandpass filter 100 are tunable by adjusting the currents II and 12 of the filter circuit .
• Figure 4 is a circuit diagram of a biquad filter configured as a bandstop filter in a single-ended topology according to one embodiment of the present invention.
• a bandstop filter is also referred to as a "trap or notch filter.”
• Like elements in Figures 3 and 4 are given like reference numerals to simplify the discussion.
• the basic biquad filter circuit of two emitter-coupled pairs is used to provide different filter shape, and thereby different filter functions, by coupling the input RF signal to different nodes of the filter circuit.
• bandstop filter 200 includes two emitter-coupled pair connected in the same manner as that of bandpass filter 100 of Figure 3.
• the first emitter-coupled pair is macle up of bipolar transistors Tl and Tl ' .
• the collector terminal of transistor Tl is connected to the power supply voltage Vcc and the collector terminal of transistor Tl' is corxnected to a current source Curl', delivering a current of value II.
• the emitter terminals of transistors Tl and Tl ' are connected together and connected to a current sourc e Curl which current source delivering a current equal to 2*11.
• the base terminal of transistor Tl is couplod to receive the input RF signal Vin.
• the collector terminal of transistor T2 is connected to the power supply volt-age Vcc and the collector terminal of transistor T2 ' is coninected to a current source Cur2 ' , delivering a current of valu ⁇ e 12.
• the emitter terminals of transistors T2 and T2 ' are connected together and are connected to a current source Cur2 which current source delivering a current equal-, to 2*12.
• the base terminal of transistor T2 is connected to the collector terminal of transistor Tl ' and is also connected to a capacitor CI .
• the other plate of capacitor CI is connected to the grou-nd (GND) voltage.
• the base terminals of transistors Tl' and T2 ' are connected together.
• T2 ' is connected to a capacitor C2.
• the other plate of capacitor C2 is co-nnected to the input signal Vin.
• An amplifier Ampl having a gain 1 (a unity gain amplifier) is coupled across the collector terminal and the base terminal of transistor T2 ' .
• Tiie output signal Vout is both provided at the collector terminal of transistor T2 ' and the output of ampli ier Ampl.
• amplifier Ampl is optional, but inclusion of the amplifier achieves advantageously a low impedance at the filter output.
• Vout s 2 + ⁇ l ' ⁇ ⁇ 2 H(s) / where Vin s 2 + s • co2 + ⁇ l • ⁇ 2 ⁇ l n/u ⁇ and 2 - Cl '
• U ⁇ is the thermodynamic potential, approximately equaX to 26mV at 300°K, s is the Laplace variable and equals to j ⁇ for a pure sine wave signal .
• V ⁇ l• ⁇ 2 . , f 0 - (in Hz) - ⁇
• FIGS. 5 and 6 illustrate alternate embodiments of the present invention where the biquad filter is configured to provide an extended input voltage range for receiving input RF signals in all of the relevant frequency bands.
• the biquad filter having extended input voltage range is incorporated in a tuner for receiving television signals, the tuning performance of the tuner can be significantly improved.
• Figure 5 is a circuit diagram of a biquad filter configured as a bandpass filter in a single-ended topology according to an alternate embodiment of the present invention. Like elements in Figure 5 and Figure 3 are given like reference numerals to simplify the discussion.
• bandpass filter 300 includes two emitter-coupled pairs coupled in an analogous manner as the emitter-coupled pairs in bandpass filter 100 of Figure 3.
• the first emitter-coupled pair includes bipolar transistors Tl and Tl ' .
• the collector terminal of transistor Tl is connected to the power supply voltage Vcc and the collector terminal of transistor Tl ' is connected to a current source Curl', delivering a current of value II.
• the base terminal of transistor Tl is connected to an analogue ground voltage.
• the emitter terminals of transistors Tl and Tl' are connected together through two MOS transistors Ml and Ml' which are biased in the triode region.
• the common node of transistors Ml and Ml' is connected to a current source Curl, delivering a current equal to 2 * 11.
• the gate terminals of transistors Ml and Ml' are connected to a control signal Vgl which causes transistors Ml and Ml' to be always turned on.
• the second emitter-coupled pair is made up of bipolar transistors T2 and T2 ' .
• the collector terminal of transistor T2 is connected to the power supply voltage Vcc and the collector terminal of transistor T2 ' is connected to a current source Cur2 ' , delivering a current of value 12.
• the emitter terminals of transistors T2 and T2 ' are connected together through two MOS transistors M2 and M2 ' which are biased in the triode region.
• the common node of transistors M2 and M2 ' is connected to a current source Cur2 , delivering a current equal to 2 «I2.
• the gate terminals of transistors M2 and M2 ' are connected to a control signal Vg2 which causes transistors M2 and M2 ' to be always turned on.
• bandpass filter 300 includes a switching circuit for realizing coarse tuning by discrete frequency steps.
• the switching circuit including a bank of capacitors is switchably connected in parallel across capacitor CI .
• capacitors CI' and CI" are connected in parallel between the input signal Vin and the base terminal of transistor T2 through the action of switches swl and swl ' , respectively.
• Switch swl is controlled 'by a control signal SI and switch swl' is controlled by a control signal S2.
• the coarse switching circuit in bandpass filter 300 includes a bank of two capacitors and two switches.
• This configuration is illustrative only and in other embodiment, the coarse switching circuit can be provided with one or more capacitors and the corresponding one or more switches to O 2005/081402 provide the desired capacitance values to realize the coarse switching function.
• each capacitor in the bank of capacitors can have different capacitance values to realize the desired capacitance values, as will be seen in the equations below.
• the collector terminal of transistor T2 ' is connected to a capacitor C2 which also provides the output signal Vout.
• the other plate of capacitor C2 is connected to the ground (GND) voltage.
• a bank of capacitors is switchably connected in parallel across capacitor C2.
• capacitors C2 ' and C2" are connected between the ground voltage and the output signal Vout through the action of switches sw2 and sw2 ' , respectively.
• Switch sw2 is controlled by the control signal SI and switch sw2 ' is controlled by a control signal S2.
• the bank of capacitors includes two capacitors with two corresponding switches .
• the bank of capacitors can include one or more capacitors with the corresponding one or more switches.
• an amplifier Ampl having a gain 1 is coupled across the collector terminal and the base terminal of transistor T2 ' .
• the base terminals of transistor Tl' and T2 ' are connected together.
• amplifier Ampl is optional and is required only when the filter circuit is interconnected with other circuit blocks.
• MOS transistors Ml and Ml', M2 and M2 ' are biased in the triode region, the transistors act like resistors.
• transistors Ml and Ml' are equally sized transistors and transistors M2 and M2 ' are equally sized transistors.
• Ml' has a resistance value Rel while each of transistors M2 and M2 ' have a resistance value of Re2 given as follows:
• Vgl is the control voltage on the gate terminals of transistors Ml and Ml'
• Vg2 is the control voltage on the gate terminals of transistors M2 and M2 '
• V ⁇ is the threshold voltage of transistors.
• Introducing resistance Rel and Re2 at the emitter terminals (emitter resistance) of the emitter-coupled pairs causes emitter degeneration which has the effect of extending the input voltage range of the emitter-coupled pairs.
• MOS transistors are used as a variable resistive elements to introduce the desired amount of emitter resistance.
• other variable resistive elements such as a variable resistor, can be used for introducing the resistance Rel and Re2.
• Ctl is the total capacitance at the collector terminal of transistor Tl'
• Ct2 is the total capacitance at the collector terminal of transistor T2 '
• U ⁇ is the thermodynamic potential approximately equal to 26mV at 300°K
• s is the Laplace variable and equals to j ⁇ for a pure sine wave signal .
• FIG. 6 is a circuit diagram of a biquad filter configured as a bandstop filter in a single-ended topology according to an alternate embodiment of the present invention.
• bandstop filter 400 is constructed using the basic biquad filter circuit of the present invention but with the input RF signal coupled to different input nodes of the biquad filter circuit to realize the desired trap or notch filter function.
• bandpass filter 300 and bandstop filter 400 illustrate the adaptability of the basic biquad filter circuit of the present invention to provide the desired filter shapes.
• Bandstop filter 400 of Figure 6 includes two emitter-coupled pairs coupled in the same manner as bandpass filter 300 of Figure 5.
• the first emitter-coupled pair is made up of bipolar transistors Tl and Tl ' .
• the collector terminal of transistor Tl is O 2005/081402 connected to the power supply Vcc and the collector terminal of transistor Tl' is connected to a current source Curl', delivering a current of value II.
• the emitter terminals of transistors Tl and Tl' are connected together through two MOS transistors Ml and Ml' which are biased in the triode region.
• the common node between transistors Ml and Ml' is connected to a current source Curl, delivering a current equal to 2*11.
• the gate terminals of MOS transistors Ml and Ml' are connected to a control signal Vgl which causes transistors Ml and Ml' to be always turned on.
• the input RF signal Vin is connected to the base terminal of transistor Tl.
• the second emitter-coupled pair is made up of bipolar transistors T2 and T2 ' .
• the collector terminal of transistor T2 is connected to the power supply voltage Vcc and the collector terminal of transistor T2 ' is connected to a current source Cur2 ' , delivering a current of value 12.
• the emitter terminals of transistors T2 and T2 ' are connected together through two MOS transistors M2 and M2 ' which are biased in the triode region.
• the common node of transistors M2 and M2 ' is connected to a current source Cur2, delivering a current equal to 2*12.
• the gate terminals of MOS transistors M2 and M2 ' are connected to a control signal Vg2 which causes transistors M2 and M2 ' to be always turned on.
• the base terminal of transistor T2 is connected to the collector terminal of transistor Tl ' and is also connected to a capacitor CI .
• the other plate of capacitor CI is connected to the ground (GND) voltage.
• a bank of capacitors is switchably connected in parallel across capacitor CI .
• capacitors CI ' and CI" are O 2005/081402 connected between the ground voltage and the base terminal of transistor T2 through the action of switches swl and swl', respectively.
• Switch swl is controlled by a control signal SI and switch swl' is controlled by a control signal S2.
• the collector terminal of transistor T2 ' is connected to a capacitor C2 which also provides the output signal Vout.
• the other plate of capacitor C2 is connected to the input signal Vin.
• a bank of capacitors is switchably connected in parallel across capacitor C2.
• capacitors C2 ' and C2" are connected between the input signal Vin and the output signal Vout through the action of switches sw2 and sw2 ' , respectively.
• Switch sw2 is controlled by the control signal SI and switch sw2 ' is controlled by a control signal S2.
• an amplifier Ampl having a gain 1 is coupled across the collector terminal and the base terminal of transistor T2 ' .
• the base terminals of transistor Tl ' and T2 ' are connected together.
• Ampl is optional, but inclusion of the amplifier achieves advantageously a low impedance at the filter output.
• MOS transistors Ml and Ml', M2 and M2 ' are biased in the triode region, the transistors act like resistors.
• transistors Ml and Ml', M2 and M2 ' are biased in the triode region, the transistors act like resistors.
• Ml' are equally sized transistors and transistors M2 and M2 ' are equally sized transistors.
• Vgl is the control voltage on the gate terminals of transistors Ml and Ml'
• Vg2 is the control voltage on the gate terminals of transistors M2 and M2 '
• V ⁇ is the threshold voltage of the transistors.
• Vout s + col • co2 H(s) Vin s + s • co2 + col • co2
• Ctl is the total capacitance at the collector terminal of transistor Tl'
• Ct2 is the total capacitance at the collector terminal of transistor T2 '
• U ⁇ is the thermodynamic potential approximately equal to 26mV at 300°K
• s is the Laplace variable and equals to j ⁇ for a pure sine wave signal .
• switches swl, swl', sw2 and sw2 ' perform frequency switching between the several frequency bands in interest, such as low-VHF, mid/high-VHF and UHF.
• the total capacitance Ctl at the collector terminal of transistor Tl ' and the total capacitance Ct2 at the collector terminal of transistor T2 ' are equal to:
• FIG. 7 is a circuit diagram of a bandpass biquad filter in a single-ended topology according to a second alternate embodiment of the present invention.
• Bandpass biquad filter 500 of Figure 7 is constructed in an analogous manner as bandpass biquad filter 300 of Figure 5. Like elements in Figures 5 and 7 are given like reference numerals and will not be further described.
• bandpass filter 500 includes two emitter-coupled pairs coupled in an analogous manner as the emitter-coupled pairs in bandpass filter 300 of Figure 5. However, in the present embodiment, the emitter terminals of each emitter- coupled pair are coupled together through a bank of transistor pairs.
• the emitter terminals of each emitter-coupled pair are connected together through a bank of two pairs of MOS transistors.
• the total resistive load on the emitter terminals of the emitter-coupled pair is given by the parallel resistance of the bank of MOS transistor pairs.
• a first pair of MOS transistors M10 and M10' is connected in series between the emitter terminals of transistors Tl and Tl ' .
• the common node of transistors M10 and M10' is connected to current source Curl.
• the gate terminals of transistors M10 and M10' are connected to a control signal Vgl'.
• a second pair of MOS transistors Mil and Mil' is connected in parallel to the first pair of MOS transistors M10 and M10'.
• the common node of transistors Mil and Mil' is also connected to current source Curl .
• the gate terminals of transistors Mil and Mil' are connected to a control signal Vgl" .
• a first pair of MOS transistors M20 and M20' is connected in series between the emitter terminals of transistors T2 and T2 ' .
• the common node of transistors M20 and M20' is connected to current source Cur2.
• the gate terminals of transistors M20 and M20' are connected to a control signal Vg2 ' .
• a second pair of MOS transistors M21 and M21' is connected in parallel to the first pair of MOS transistors M20 and M20' .
• the common node of transistors M21 and M21' is also connected to current source Cur2.
• the gate terminals of transistors M21 and M21' are connected to a control signal Vg2" .
• the bank of transistor pairs incorporated in the emitter-coupled pairs of bandpass filter 500 in effect acts as switches and as variable resistance devices.
• the control signal driving the gate terminal of the transistors causes each transistor pair to turn on or off, thereby introducing discrete stepwise variations in resistance.
• the control signal delivers a gate voltage that biases the transistors in the triode region.
• the gate voltage of each transistor pair is adjusted precisely, thereby introducing precise but finite variations in resistance.
• the on-resistance of the MOS transistors can be continuously modulated by adjusting the gate voltage.
• the resistive load at the emitter terminals of the emitter- coupled pair can be precisely adjusted to the desired resistance value so as to provide accurate control of the frequency operation of the bandpass filter.
• each pair of tr-ansistors M10 and M10', Mil and Mil', M20 and M20', and M21 and M21' includes identical transistors. If the gate voltage is higher than the threshold voltage, the resistance values of each transistor pair is given in first approximation by:
• Re10 kV-(VgV-V T ) ⁇ l ;
• Re20 k2'-(Vg2' ⁇ V T ) _I ; and where RelO is the resistance value of transistor pair M10 and M10', Rell is the resistance value of transistor pair Mil and Mil' , Re20 is the resistance value of transistor pair M20 and M20', and R21 is the resistance value of transistor pair M21 and M21' .
• kl' , kl' ' are constants depending on the technology and the geometry of transistor pairs M10/M10' and Mil/Mil'
• k2 ' , k2 ' ' are constants depending on the technology and the geometry of transistor pairs M20/M20' and M21/M21'.
• Vgl' and Vgl'' are control voltages for transistors pairs M10/M10' and
• the total equivalent resistance for coarse frequency tuning is the parallel resistance of the MOS transistors that are in the "on" mode (that is, for Vgi>V T , where i is 1 or 2) and the total equivalent resistance is given by:
• each of the emitter-coupled pairs in bandpass filter 500 of Figure 7 includes a bank of two transistor pairs. However, this is illustrative only and in other embodiments, each emitter-coupled pair may incorporate a bank of two or more transistor pairs. For example, in one embodiment, a bank of four transistor pairs is included at each emitter-coupled pair of the bandpass filter.
• FIG. 8 is a circuit diagram of a bandstop biquad filter in a single-ended topology according to a second alternate embodiment of the present invention.
• Bandstop biquad filter 600 of Figure 8 is constructed in an analogous manner as bandstop biquad filter 400 of Figure 6.
• Like elements in Figures 6 and 8 are given like reference numerals and will not be further described. Referring to
• bandstop filter 600 includes two emitter-coupled pairs coupled in an analogous manner as the emitter-coupled pairs in bandstop filter 400 of Figure 6.
• the emitter terminals of each emitter- coupled pair are coupled together through a bank of transistor pairs, in the same manner as in bandpass filter 500 of Figure 7.
• the emitter terminals of each emitter-coupled pair are connected together through a bank of two pairs of MOS transistors. The total resistive load on the emitter terminals of the emitter-coupled pair is given by the parallel resistance of the bank of MOS transistor pairs .
• each bank of transistor pairs includes two transistor pairs.
• bandstop filter 600 can include two or more transistor pairs in each bank to provide the desired resistance values for coarse and fine frequency tuning.
• the biquad filter circuit of the present invention is constructed using transistor and capacitor which circuit elements can be readily manufactured in an integrated circuit.
• the biquad filter circuit of the present invention can be integrated with other tuner circuitry to yield a fully integrated tuner.
• the biquad filter circuit of the present invention can be constructed to provide an extended input voltage range capability, ensuing high quality reception of input signals from all relevant frequency bands.
• the biquad filter of the present invention can be realized in tuners constructed for either terrestrial broadcast or cable transmission.
• the differential pairs in the biquad filter circuit can be implemented using only MOS transistors.
• Another possible alteration of these circuits is to combine the MOS transistors in parallel or in series with linear resistors to limit the total variability of the resistive load of the emitter node.
• emitter resistance is introduced to the filter circuit to boost the input voltage range and a coarse tuning system is introduced for performing frequency band switching.
• either emitter resistance or the coarse tuning system can be introduced to enhance the performance of the biquad filter circuit of the present invention.
• emitter resistance can be introduced to the bandpass filter circuit of Figure 3 to extend the input voltage range of the filter circuit.
• MOS transistors are used to introduce emitter resistance to the differential pair where the MOS transistors also function as switches for introducing stepwise variations in resistance.
• the MOS transistors can be replaced by switching devices that have a variable on-resistance.
• Figures 3-8 are illustrative only.
• One of ordinary skill in the art would appreciate that the basic biquad filter circuit of Figures 3-8 can be extended to achieve high-order filters by using a similar tuning principle, mixing simultaneously a continuous and a stepwise control of the operation frequency.
• the present invention is defined by the appended claims.

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