EP1609323B1 - Apparatus and method for distributing frame synchronization information at a base station - Google Patents

Apparatus and method for distributing frame synchronization information at a base station Download PDF

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Publication number
EP1609323B1
EP1609323B1 EP04724308.4A EP04724308A EP1609323B1 EP 1609323 B1 EP1609323 B1 EP 1609323B1 EP 04724308 A EP04724308 A EP 04724308A EP 1609323 B1 EP1609323 B1 EP 1609323B1
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EP
European Patent Office
Prior art keywords
synchronization information
base station
frame
air interface
frame synchronization
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Expired - Lifetime
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EP04724308.4A
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German (de)
English (en)
French (fr)
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EP1609323A1 (en
Inventor
Pekka Adolfsen
John Beale
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Nokia Oyj
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Nokia Oyj
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W88/00—Devices specially adapted for wireless communication networks, e.g. terminals, base stations or access point devices
    • H04W88/08—Access point devices
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/24—Radio transmission systems, i.e. using radiation field for communication between two or more posts
    • H04B7/26—Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
    • H04B7/2662—Arrangements for Wireless System Synchronisation
    • H04B7/2671—Arrangements for Wireless Time-Division Multiple Access [TDMA] System Synchronisation
    • H04B7/2678—Time synchronisation
    • H04B7/2687—Inter base stations synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements

Definitions

  • the invention relates to a method and a system for distributing frame synchronization information at a base station implementing air interfaces of at least two different standards and to a base station implementing air interfaces of at least two different standards.
  • a base station, or base transceiver station, or node B (a term used by the European Telecommunications Standards Institute, ETSI) is a network element in a mobile network responsible for radio transmission and reception to or from the mobile station.
  • the base station provides the transceiver functions of the base station system.
  • One base station may include one or more transceivers.
  • the base station terminates an Iub interface towards a radio network controller (RNC).
  • RNC radio network controller
  • GSM Global System for Mobile Communications
  • UMTS Universal Mobile Telecommunications System
  • WO 02/104050 discloses a method for synchronizing a multi-mode base station utilizing a GSM system and a WCDMA system using a common system clock of the WCDMA system.
  • the WCDMA system clock can be used for GSM frame synchronization with an interval of 13 GSM frames.
  • WO 02/104050 describes a way to synchronize the frames of the GSM and WCDMA systems using a common clock, but does not describe a way to distribute the frame synchronization information at a base station.
  • US 5,940,384 discloses a base station, which multiplexes user data into the TDM bus.
  • the TDM bus is reconfigurable and thus able to support various air interface standards. For example the time slot duration and the frame rate of the TDM bus may be reconfigured.
  • US 5,940,384 actually describes a way to allocate TDM bus capacity for user data of each air interface standard supported by the base station, and does not describe a way to distribute frame synchronization information at a base station.
  • US 5,940,384 neither describes a way to distribute a way to distribute the frame clock (for time reference) or the continuous system clock (for frequency reference) between the different units of the base station.
  • US 6,282,184 discloses a common digitizing rate for multiple air interfaces.
  • the common digitizing rate is based on their respective CDMA, TDMA and GSM requirements. Consequently, US 6,282,184 does not describe a way to distribute the frame synchronization information at a base station.
  • the present invention seeks to provide an improved method for distributing frame synchronization information in a base station implementing air interfaces of at least two different standards.
  • the present invention also seeks to provide an improved base station implementing air interfaces of at least two different standards.
  • a base station as specified in claim 19.
  • the present invention also seeks to provide an improved system for distributing frame synchronization information at a base station implementing air interfaces of at least two different standards.
  • the invention provides several advantages. For example, only one serial bus for frame synchronization information is needed even in a multi-standard base station. Usage of time division multiplexing and bursts, i.e. non-continuous signals, reduces interference caused to other signals. The solution is also future-proof; there is no need to alter the synchronization bus structure in the future as processing units of some new standard emerge.
  • the base station implements air interfaces of at least two different standards, and therefore it includes processing units 104, 106, 108, 110, 112, 114, 116, 118 of different air interface standards.
  • the standard here refers to any air interface standards that have different frame synchronization requirements.
  • GSM represents the second-generation radio systems
  • GSM-based radio system which employs EDGE (Enhanced Data Rates for Global Evolution) technology for increasing the data transmission rate and which can also be used for implementing packet transmission in a GPRS (General Packet Radio System) system, which represents the 2.5-generation radio systems
  • GPRS General Packet Radio System
  • IMT-2000 International Mobile Telecommunications 2000
  • UMTS Universal Mobile Telecommunications System
  • WCDMA Wideband Code Division Multiple Access
  • the examples are, however, not restricted to these systems, but a person skilled in the art can also apply the examples to other radio systems that can utilize multi-standard base stations.
  • the air interface standards are GSM and UMTS.
  • the processing units 104, 106, 108 and 110 are in accordance with the GSM standard and the processing units 112, 114, 116 and 118 are in accordance with the UMTS standard.
  • the base station requires an accurate clock signal to guarantee high frequency stability and accurate timing on the air interface.
  • This high accuracy can be achieved by conveying a clock signal from a national reference clock as a pulse train along the national telephone backbone, along the radio system infrastructure, e.g. a mobile switching center (MSC), base station controller (BSC), or radio network controller (RNC) up to the base stations.
  • MSC mobile switching center
  • BSC base station controller
  • RNC radio network controller
  • other atomic clocks or a GPS (Global Positioning System) clock can be used as a source for an accurate clock signal.
  • a clock unit 100 of the base station is configured to generate frame synchronization information for at least two air interface standards.
  • a clock unit 100 can be such that it maintains both the system clock and the frame clock, or it can only maintain the frame clock, whereupon the system clock is maintained in another unit
  • the clock unit 100 can also be combined into some other unit, such as the main control unit of the base station.
  • the clock unit 100 is configured to generate a frame clock for the frame synchronization information.
  • the clock unit 100 is configured to generate a frame number for the frame synchronization information.
  • One GSM hyper frame includes 2715648 frames, thus the frame number runs from the beginning to the end in 3 h 28 minutes and 53.760 seconds.
  • a UMTS frame includes fifteen time slots each having a length of 666 microseconds, and in UMTS the system frame number (SFN) is a 12-bit number. The frame number is used by several procedures, such as processing of base band and radio frequency signals that span more than a single frame.
  • the base station also includes a serial bus 102 connecting the clock unit 100 and the processing units 104, 106, 108, 110, 112, 114, 116, 118.
  • the serial bus 102 is configured to transfer the synchronization bursts containing the frame synchronization information from the clock unit 102 to processing units 104, 106, 108, 110, 112, 114, 116, 118 using time-division multiplexing for synchronization bursts addressed to processing units of different air interface standards. This means that synchronization bursts of the GSM standard are addressed to processing units 104, 106, 108 and 110, whereas synchronization bursts of the UMTS standard are addressed to processing units 112, 114, 116 and 118.
  • Time division multiplexing is a digital transmission technique in which several signals are interleaved in time for transmission over a common channel, i.e. in our example, the synchronization bursts are interleaved in time for transmission over the common serial bus 102.
  • Processing units 104, 106, 108, 110, 112 114, 116, 118 of different air interface standards are each configured to extract the frame synchronization information from a received synchronization burst of its respective air interface standard.
  • processing units 104, 106, 108 and 110 each extract synchronization information from the synchronization bursts of the GSM standard and processing units 112, 114, 116 and 118 each extract synchronization information from the synchronization bursts of the UMTS standard.
  • the distribution of the frame synchronization information can be performed during the start-up of the base station, on demand, and/or at predetermined time intervals.
  • the clock unit 100 is configured to perform the frame synchronization information distribution on demand.
  • the processing unit 104, 106, 108, 110, 112, 114, 116, 118 is configured to demand the frame synchronization information from the clock unit 100.
  • Processing unit 104, 106, 108, 110, 112, 114, 116, 118 can be configured to make the demanding during the start-up of the processing unit.
  • the clock unit 100 is configured to perform the frame synchronization information distribution during the start-up of the base station.
  • the clock unit 100 is configured to perform the frame synchronization information distribution to processing units 104, 106, 108, 110, 112, 114, 116, 118 by broadcasting (unidirectional distribution to several users) or multicasting. Multicasting can be defined as broadcasting to a sub-set of processing units, i.e. it may necessitate the use of a router in the serial bus 102. There is thus a point-to-multipoint connection between the clock unit 100 and the processing units. Inside the processing unit, point-to-point connections can be used, as will be explained below.
  • the processing units presented in Figure 1 can be specified as follows: a radio frequency receiver unit 104 of the GSM standard for uplink reception, a base band processing unit 106 of the GSM standard for uplink detection, decoding and deciphering, a radio frequency transmitter unit 108 of the GSM standard for downlink transmission, a base band processing unit 110 of the GSM standard for downlink coding and ciphering, a radio frequency receiver unit 112 of the UMTS standard for uplink reception, a base band processing unit 114 of the UMTS standard for uplink detection, a radio frequency transmitter unit 116 of the UMTS standard for downlink transmission, and a base band processing unit 118 of the UMTS standard for downlink coding and modulation.
  • uplink we mean direction of transmission in which the mobile station transmits and the base station receives. Downlink is then the opposite direction of transmission.
  • the radio frequency receiver unit 200 as well as the base band processing unit 202 include frame clock receivers 210, 230 that receive the synchronization bursts from the serial bus 102.
  • the processing units 200, 202 also include a system clock 212, 232.
  • the system clock 212, 232 receives timing information over a bus 250.
  • the timing information may be a continuous frequency reference.
  • the clock unit 100 is configured to distribute to the processing units 200, 202 a system clock that is phase-locked with the frame clock.
  • the processing unit 200, 202 may be configured to sample the serial bus 102 with a sampling rate derived from the system clock 212, 232. This inter-synchronization between the frame clock and the system clock makes it easier to implement the frame synchronization information distribution with sufficiently good timing precision.
  • the processing unit 200, 202 is configured to utilize the extracted frame synchronization information for air interface frame synchronization between different processing units 200, 202 of one air interface standard.
  • both the radio frequency receiver unit 200 and the base band processing unit 202 include frame timing blocks 214, 234 which utilize the extracted frame synchronization information for air interface frame synchronization.
  • the radio frequency receiver unit 200 includes radio frequency processing blocks 218 controlled by the frame timing block 214
  • the base band processing unit 202 includes base band processing blocks 242 controlled by the frame timing block 234.
  • the radio frequency processing blocks 218 utilize the frame timing reference while packaging uplink samples into bus messages.
  • the messages utilize a time stamp, which carries air interface timing information to the base band processing blocks 242.
  • both processing units 200, 202 are configured to utilize the extracted frame synchronization information for bus 204 synchronization between different processing units 200, 202 of one air interface standard. As illustrated in Figure 2 , both processing units 200, 202 include bus timing blocks 216, 236 which control the bus interfaces 222, 238 at both ends of the bus 204.
  • the processing units 200, 202 are configured to generate independent synchronization information locked to the extracted synchronization information, i.e. frame timing blocks 214, 234 and bus timing blocks 216, 236 maintain synchronization information independently. It is to be noted that frame timing blocks 214, 234 and bus timing blocks 216, 236 may maintain synchronization information commonly. A single block implementing both the frame timing block 214, 234 and the bus timing block 216, 236 is also possible. Counters can be used in the frame timing blocks 214, 234 for generation of frame numbers.
  • FIFO block First In First Out, i.e. a queuing discipline in which arriving entities are handled in their order of arrival
  • FIFO block 240 between the bus interface 238 and base band processing blocks 242.
  • Circular buffers that maintain both read and write addresses can implement the FIFO blocks 220, 240.
  • the processing unit 300 includes one frame clock receiver 210 that receives synchronization bursts over the serial bus 102.
  • the frame clock receiver distributes the received synchronization information to a frame timing block 316 and to a bus timing block 318.
  • the frame timing block 316 controls the frame synchronization in both uplink radio frequency processing blocks 310 and downlink radio frequency processing blocks 320.
  • the bus timing block 318 also controls the bus synchronization of both an uplink bus interface 314 and a downlink bus interface 324.
  • the uplink bus interface 314 transmits to the uplink bus 330, and the downlink bus interface 324 receives from the downlink bus 332. Both link directions have separate FIFO blocks 312, 322.
  • the processing units relating to an air interface standard include radio frequency transceiver blocks 404 and base band processing blocks 408, and the blocks are included in one special unit 400 of the base station.
  • the special unit 400 processes both radio frequency data and base band data.
  • the special unit 400 also includes the frame clock receiver 210 and frame timing block 402, but it does not necessarily need the bus timing block, depending, of course, on the timing requirements of the output signals sent to the bus 410.
  • the special unit 400 may need a FIFO block 406 between the radio frequency transceiver blocks 404 and base band processing blocks.
  • the special unit 400 of Figure 4 is for uplink direction, but also a special unit designed for downlink direction is possible. A special unit incorporating features of Figures 3 and 4 is also possible; such special unit would then have both radio frequency transceiver blocks and base band processing blocks for uplink and downlink directions.
  • the internal structure of a multi-standard processing unit is illustrated. Processing units of two different air interface standards are included in one multi- standard unit of the base station.
  • the multi-standard processing unit is a base band processing unit 700 capable of processing both base band signals obtained from the GSM uplink radio frequency receiver unit 104 and base band signals obtained from the UMTS uplink radio frequency receiver unit 112.
  • the base band processing unit 700 includes a frame clock receiver 702, which receives the synchronization bursts of both a GSM air interface standard and a UMTS air interface standard over the serial bus 102.
  • the base band processing unit 700 includes a bus timing block 704, GSM frame timing block 706, and UMTS frame timing block 708.
  • the base band processing unit 700 further includes both GSM base band processing blocks 714 controlled by the GSM frame timing block 706 and UMTS base band processing blocks 716 controlled by the UMTS frame timing block 708.
  • the bus timing block 704 controls both bus interface 710 for the incoming buses 722 and 724 and bus interface 718 for the outgoing bus 726.
  • the incoming bus interface 710 is capable of handling both GSM and UMTS base band signals.
  • there is also a FIFO block 712 capable of queuing both GSM and UMTS base band signals between the incoming bus interface 710 and the base band processing blocks 714, 716.
  • Figure 7 also illustrates an example where base band processing capacity is distributed among several serially connected base band processing units.
  • the required base band functionality is divided between two base band processing units 700, 720 connected by the bus 726.
  • the same principle can also be exploited for the radio frequency processing units.
  • the clock unit 100 and processing unit 104, 106, 108, 110, 112, 114, 116, 118, with all the variations shown in Figures 1 to 4 and 7 are each usually implemented with one or more application-specific integrated circuits (ASIC) placed on a circuit board.
  • ASIC application-specific integrated circuits
  • the units may also include other hardware parts, such as microprocessors and other integrated circuits, for example clock circuits and bus interfaces. Some functions can also be implemented with software that is run in a microprocessor.
  • the building blocks thus include hardware components, ASIC blocks, and software modules. In selecting the implementation mix, a person skilled in the art will take into consideration for instance the requirements set on the size and power consumption of the device, the required processing power, manufacturing costs and production volumes.
  • Each block maintains an internal 'Mode' register and 'State' register.
  • the operation on receiving a synchronization burst depends on the 'Mode' and 'State' registers as follows:
  • 'Compare' will return 'OK' if synchronization is correct within some limit, for example within ⁇ 1 or ⁇ 2 ASIC clock periods.
  • the 'State' register will be set to 'Not Synchronized' by an ASIC power-up and by the 'Compare' operation returning 'Compare Not OK' as its result.
  • Figure 5 illustrates an example of the structure of a synchronization burst.
  • the numbers within the parts are given as examples of the bit sizes of the parts.
  • the clock unit 100 is configured to insert in the synchronization burst a start part 500, a mode part 502 indicating whether the synchronization burst is intended for frame synchronization of a certain air interface standard or for bus synchronization, and an end part 508.
  • the synchronization burst also includes a system frame number 504.
  • the synchronization burst also includes an error detection code 506.
  • the described non-continuous synchronization burst could be 90 bits long. If the serial bus 102 uses a rate of 3.84 megabits/second, the synchronization burst is 25 microseconds long.
  • the start part 500 indicates that a new synchronization burst will be coming. In our example, at least 89 consecutive zeros are needed before the start bit can be recognized.
  • the mode part 502 begins with the LSB (Least Significant Bit).
  • the processing unit is implemented with the ASIC technology, the mode of an ASIC block is maintained in a register and the value of this register is compared to the received mode part 502.
  • the system frame number 504 begins with the end bits, i.e. the LSB bit comes first, and unused bits have the value zero. In the bus synchronization mode there is no frame number, and hence all bits have value zero. In the UMTS/FDD mode there is a 12-bit frame number. UMTS/TDD mode is to be defined. In the GSM/EDGE mode there are the following values: T1 (11 bits 0-10), T2 (5 bits 11-15) and T3 (6 bits 16-21). In the CDMA2000 mode, the system time is in 20 millisecond frames (33 bits). For other modes the bits are to be defined.
  • CRC Cyclic Redundancy Check
  • CRC 506 is calculated over the mode part 502 and the system frame number 504. CRC 506 is sent with the LSB first.
  • the end part 508 indicates that the synchronization burst is ending.
  • the processing unit 104, 106, 108, 110, 112, 114, 116, 118 is configured to change the frame number at a predetermined offset to a predetermined point of the synchronization burst.
  • the predetermined point may be for example the end of the synchronization burst.
  • the predetermined offset can also have the value zero.
  • the data rate in the serial bus 102 is 3.84 megabits/second clocked out at the clock unit 100 with a 19.2 MHz (megahertz) clock.
  • Each processing unit re-clocks/samples the serial bus 102 with the received 19.2 MHz system clock.
  • the ASIC blocks of the processing units can clock/sample the serial bus 102 with their 76.8 internal ASIC clocks, provided that the ASIC clock speed is 76.8 MHz.
  • the ASIC block will then take the falling edge (as re-clocked by the ASIC clock) of the end part 508 to denote the exact frame boundary time.
  • the execution of the method starts at 600.
  • the frame synchronization information distribution is performed during the start-up of the base station.
  • the frame synchronization information distribution is performed on demand.
  • the processing unit demands the frame synchronization information from the clock unit.
  • the demanding is made during the start-up of the processing unit.
  • the demanding can also be made during the normal operation of the processing unit, for example at regular time intervals, or after the processing unit has detected a need to correct synchronization.
  • the frame synchronization information distribution is performed at predetermined time intervals, without any specific messages.
  • the frame synchronization information is generated 604 in a clock unit for at least two air interface standards.
  • a start part a mode part indicating whether the synchronization burst is intended for frame synchronization of a specific air interface standard or for bus synchronization, and an end part.
  • a system frame number In an example, in the synchronization burst is inserted an error detection code.
  • a frame clock is generated for the frame synchronization information.
  • a frame number is generated for the frame synchronization information.
  • the frame number is changed at a predetermined offset to a predetermined point of the synchronization burst.
  • the frame number can therefore be changed at the end of the synchronization burst.
  • the synchronization bursts containing the frame synchronisation information are transferred 606 from the clock unit to processing units over a serial bus using time-division multiplexing for synchronization bursts addressed to processing units of different air interface standards.
  • the frame synchronization information is extracted 608, 610 in each processing unit from the received synchronization burst of its respective air interface standard.
  • the method ends at 620.
  • the processing unit is generated 612, 614 independent synchronization information locked to the extracted synchronization information.
  • the extracted frame synchronization information is utilized 616, 618 for air interface frame synchronization between different processing units of one air interface standard.
  • the extracted frame synchronization information is utilized for bus synchronization between different processing units of one air interface standard.
  • a system clock that is phase-locked with the frame clock is distributed to the processing units, and the serial bus is sampled with a sampling rate derived from the system clock.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
EP04724308.4A 2003-03-31 2004-03-30 Apparatus and method for distributing frame synchronization information at a base station Expired - Lifetime EP1609323B1 (en)

Applications Claiming Priority (3)

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FI20030477 2003-03-31
FI20030477A FI20030477A0 (fi) 2003-03-31 2003-03-31 Kehyssynkronointitiedon jakelu tukiasemassa
PCT/FI2004/000187 WO2004089014A1 (en) 2003-03-31 2004-03-30 Apparatus and method for distributing frame synchronization information at a base station

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EP1609323A1 EP1609323A1 (en) 2005-12-28
EP1609323B1 true EP1609323B1 (en) 2014-03-12

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US (1) US7602763B2 (ja)
EP (1) EP1609323B1 (ja)
JP (1) JP4299306B2 (ja)
KR (1) KR100752409B1 (ja)
CN (1) CN100455076C (ja)
BR (1) BRPI0408877B1 (ja)
FI (1) FI20030477A0 (ja)
MX (1) MXPA05010559A (ja)
MY (1) MY135713A (ja)
PL (1) PL234910B1 (ja)
TW (1) TWI293230B (ja)
WO (1) WO2004089014A1 (ja)

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CN1146161C (zh) * 2001-06-30 2004-04-14 华为技术有限公司 一种用于tdm/tdma系统的上行突发控制的相位补偿方法及装置

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MXPA05010559A (es) 2005-11-23
WO2004089014A1 (en) 2004-10-14
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US7602763B2 (en) 2009-10-13
JP2006521032A (ja) 2006-09-14
KR100752409B1 (ko) 2007-08-28
FI20030477A0 (fi) 2003-03-31
BRPI0408877B1 (pt) 2018-02-27
BRPI0408877A (pt) 2006-04-11
TWI293230B (en) 2008-02-01
EP1609323A1 (en) 2005-12-28
JP4299306B2 (ja) 2009-07-22
CN1768540A (zh) 2006-05-03
CN100455076C (zh) 2009-01-21
PL379124A1 (pl) 2006-07-10
PL234910B1 (pl) 2020-05-18
KR20050110703A (ko) 2005-11-23
TW200423777A (en) 2004-11-01

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