EP1532526A2 - Procede pour initialiser des systemes programmables - Google Patents

Procede pour initialiser des systemes programmables

Info

Publication number
EP1532526A2
EP1532526A2 EP03793579A EP03793579A EP1532526A2 EP 1532526 A2 EP1532526 A2 EP 1532526A2 EP 03793579 A EP03793579 A EP 03793579A EP 03793579 A EP03793579 A EP 03793579A EP 1532526 A2 EP1532526 A2 EP 1532526A2
Authority
EP
European Patent Office
Prior art keywords
initialization
program
external
internal
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03793579A
Other languages
German (de)
English (en)
Inventor
Jens David
Jens Bretschneider
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Philips Semiconductors Dresden AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Semiconductors Dresden AG filed Critical Philips Semiconductors Dresden AG
Publication of EP1532526A2 publication Critical patent/EP1532526A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation

Definitions

  • the invention relates to a method for initializing programmable systems in which the information required for initializing registers and internal and / or external modules is contained in an external memory and is read out, in particular for use in programmable system-on-chip ASIC elements.
  • ASIC Application specific integrated circuit
  • PCI Peripheral Components Interconnect
  • Cardbus Cardbus
  • USB Universal Serial Bus
  • Due to the nature of the products, which are manufactured in large quantities at low prices, it is common for semiconductor design houses to develop a hard-wired solution that is manufactured by contract partners and sold to OEM customers (OEM original device manufacturer) who sell the semiconductors integrate into their peripherals. The resulting end products mostly differ by Functional scope, performance, power consumption and price, depending on which circuitry and additional components were used for the respective solution.
  • the additional electronics on the circuit board must be brought into an initial state in a variable manner when the device is switched on or plugged in.
  • the OEM-specific elements must be initialized when switching on. It can happen that the external electronic modules, which are located next to the ASIC on the device, have to be brought into a defined initial state directly when switching on or plugging in or within a very short time afterwards. B. destruction, excessive power consumption or confusing Avoid status displays, by means of LEDs or a display. Since the ASIC in the circuit is usually the only "intelligent component that can perform this task, but the external circuitry generally differs, as described above, a way must be found for the ASIC to provide information about the initialization of the other modules to convey so that it can carry out the initialization accordingly.
  • Identification features and serial numbers are stored in the EEPROM.
  • the identification features are understood to be the product ID, vendor ID, subsystem ID and subsystem vendor ID as revision identifier and device class.
  • the MAC-ID should be used for Ethernet network cards.
  • This OEM-specific information is read out by the end user by means of hardware logic from the EEPROM when the device is switched on and transferred to the corresponding register in the PCI / USB core of the ASIC. This enables the device to be recognized by the computer.
  • the registers in the IO blocks via which the remaining electronics on the device are controlled, either remain uninitialized, are set to a "burned-in * reset value" in the ASIC or can be set by the hardware logic according to the EEPROM content.
  • the invention is therefore based on the object of specifying a method in which all registers and assemblies can be initialized, flexible initialization of the external electronics is possible, the ASIC development is simplified and different external and internal storage media are supported.
  • the object is achieved with a method for initializing programmable systems of the type mentioned in the introduction in that after switching on or another event triggering a restart, controlled by a program of an instruction memory, a transfer of initialization information from an external or internal non-volatile storage medium to an internal memory, that the initialization information contains initialization data and / or at least one initialization program, that the initialization of the registers and assemblies is controlled by one or more processor elements or other intelligent building blocks arranged in the system, which in turn are controlled by the initialization program.
  • the initialization of the registers and Assemblies carried out by one or more processor elements. After switching on or after an external restart event of the device, this requires a program to be processed.
  • the program for starting the initialization phase is contained in a so-called instruction memory (bootstrap loader).
  • the initialization information can include both initialization data and an initialization program.
  • Initialization data are identifications (ID), such as the product ID, vendor ID, subsystem vendor ID or a serial number of an Ethernet network card.
  • ID identifications
  • the initialization program controls the processor element after the transfer of the initialization information into the instruction RAM and realizes the initialization of the registers and modules.
  • One embodiment of the invention provides that an integrity check of the initialization information is carried out after the transfer and that a program branch is carried out, controlled by the result of the integrity check.
  • One embodiment of the invention provides that when an incorrect or missing internal or external storage medium is detected, an error routine is processed which carries out the initialization with standard values or restores the content of the internal or external storage medium in whole or in part.
  • the data is checked for integrity, for example by determining a checksum.
  • the processor element either processes the initialization program that has just been transmitted or macro instructions or a routine for handling exceptional cases in the instruction memory is started. Through this routine, the functionally most important registers in the ASIC are programmed in such a way that the device can at least basically be addressed via the respective PC interface. If a missing or incorrect storage medium was detected in the switch-on phase, a routine for initialization with standard values is also processed.
  • the initialization data are read from the storage medium as standard values, changed by the processor element and the changed initialization data are used for initialization.
  • the EEPROM contains standard values, for example for the product ID, vendor ID, subsystem vendor ID or a serial number of an Ethernet network card and the like. a. saved. These values can be used directly to initialize the registers and / or modules. However, the processor element can also be used to change the standard values or to make an alternative selection controlled by an event. From the point of view of error handling, this results in the possibility of using the support logic to change or restore the initialization information of the external EEPROM, and the checksum can also be recalculated.
  • initialization data are calculated by the initialization program from the processor element and used for initialization.
  • the processor element can calculate initialization data, for example depending on the status of a port or register.
  • One embodiment of the invention provides that, depending on the status data of peripheral components and / or internal components, their initialization data and the data for the internal components are calculated.
  • the program flow of the initialization program can be designed in such a way that an initialization value is selected or calculated depending on the status of individual internal or external registers or modules. For this purpose, for example, a register or port is queried in a first step and, depending on this result, the initialization takes place after a jump to a designated point in the program sequence.
  • the processor element changes to a power-saving mode after initialization has taken place.
  • the processor element can be put into a power-saving mode, from which it is reset, for example, by a signal from a PC or a peripheral module.
  • the initialization of further processor elements is started and monitored.
  • the processor element can carry out the initialization of further processors present in the system, which subsequently start their own initialization routines.
  • the completion of the initialization is either reported back to the first processor or the first processor transfers control to another processor.
  • the instruction memory arranged in the ASIC contains a start program to be executed after the device is switched on and reads the initialization information from the external EEPROM and transfers it to the instruction RAM.
  • This start program contains a routine that recognizes the connected storage medium and ensures compliance with the transmission protocol required in each case.
  • the initialization program reloads further data and / or program code from a storage medium.
  • the processor element can reload further initialization information (program code or state data).
  • Fig. 1 shows a circuit arrangement according to the prior art
  • Fig. 2 shows a circuit arrangement for implementing the method according to the invention.
  • a processor element 8 which does not necessarily have to be a component of the ASIC logic 1 in the prior art, an instruction memory 9 (bootstrap loader), an instruction RAM 10, a data RAM 11, an EEPROM interface 12 and a support -Logik 13.
  • the external EEPROM 14 known from the prior art is also arranged outside the ASIC 1 and connected to it via a second bus system 15.
  • An I 2 C, SPI or Microwire bus can be used as the second bus system 15.
  • the ASIC 1, the external EEPROM 14 and the external electronics 7 form a peripheral device 18 to be controlled by the PC 3.
  • the instruction memory 9 arranged in the ASIC contains a start program to be processed after the device is switched on and implements the readout of the initialization information from the external EEPROM 14 and the transfer into the instruction RAM 10. Since the exchange of the bus signals from the respectively used external EEPROM 14 and Bus system 15 is dependent and the process is controlled by a program, the adaptation to different bus systems 15 or EEPROM types 14 can be implemented in terms of program technology. This also enables automatic detection of the connected EEPROM type 14.
  • the initialization information to be transmitted consists of the initialization data and an initialization program. After the initialization information has been transferred to the instruction RAM 10, an integrity check is carried out to ensure the error-free transfer of the data.
  • the further program execution takes place using the initialization program just transferred into the instruction RAM 10.
  • This program carries out the actual initialization of register 5 and modules with the aid of the initialization data.
  • This initialization makes, for example, the necessary settings in the bus interface 2 in order to enable communication with the PC 3 and the initialization of the other internal modules and the I / O interface 6 for the control of the external electronics 7.
  • the program-controlled initialization makes it possible to set all registers 5 or assemblies that are directly or indirectly addressable by processor element 8 and state machines that are dependent on them. Furthermore there is Possibility of performing the initialization dynamically, i.e. depending on input values. This makes it possible to immediately show on the display 7 in the commissioning phase of the device whether a certain condition is met or not.
  • the method according to the invention enables the peripheral device 18 to act independently in order to “wake up” the PC 3 from an initial idle state (for example wake-on-lan or wake-up in the case of a fax call).
  • PC personal computers

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Storage Device Security (AREA)

Abstract

La présente invention concerne un procédé pour initialiser des systèmes programmables, les informations nécessaires à l'initialisation de registres et de modules internes et/ou externes étant obtenues dans une mémoire externe, et lues. L'invention a pour objet la mise au point d'un procédé pour lequel tous les registres et modules peuvent être initialisés, et qui rend possible l'initialisation flexible de l'électronique externe, simplifie la réalisation de circuits intégrés à application spécifique (ASIC), et permet d'obtenir des types très différents de EEPROM. Grâce à l'invention, après mise en marche, ou après un autre événement qui déclenche un redémarrage, a lieu un transfert d'informations d'initialisation d'une mémoire non volatile externe ou interne à une mémoire interne, commandé par un programme d'une mémoire d'instructions, les informations d'initialisation comprenant des données d'initialisation et/ou au moins un programme d'initialisation, et l'initialisation des registres et des modules s'effectuant de façon commandée par un ou plusieurs éléments processeurs faisant partie du système ou d'autres composants intelligents qui sont eux commandés par le programme d'initialisation.
EP03793579A 2002-08-30 2003-05-28 Procede pour initialiser des systemes programmables Withdrawn EP1532526A2 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10240770 2002-08-30
DE10240770 2002-08-30
PCT/DE2003/001747 WO2004023299A2 (fr) 2002-08-30 2003-05-28 Procede pour initialiser des systemes programmables

Publications (1)

Publication Number Publication Date
EP1532526A2 true EP1532526A2 (fr) 2005-05-25

Family

ID=31969024

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03793579A Withdrawn EP1532526A2 (fr) 2002-08-30 2003-05-28 Procede pour initialiser des systemes programmables

Country Status (6)

Country Link
US (1) US20060155978A1 (fr)
EP (1) EP1532526A2 (fr)
JP (1) JP2005537575A (fr)
AU (1) AU2003249842A1 (fr)
DE (1) DE10393639D2 (fr)
WO (1) WO2004023299A2 (fr)

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Publication number Priority date Publication date Assignee Title
US7356681B2 (en) * 2004-03-05 2008-04-08 Finisar Corporation Transient transceiver clock configuration
US7480740B1 (en) * 2004-10-05 2009-01-20 Lsi Corporation Method and system for enforcing hardware/software compatibility constraints
US9182999B2 (en) * 2012-05-30 2015-11-10 Advanced Micro Devices, Inc. Reintialization of a processing system from volatile memory upon resuming from a low-power state
JP6021836B2 (ja) 2014-02-25 2016-11-09 Ｌｉｎｅ株式会社 通信サーバ
CN105487906A (zh) * 2015-12-07 2016-04-13 浪潮集团有限公司 一种利用外挂flash实现mcu核代码更新的方法及系统
CN111443954A (zh) * 2020-03-31 2020-07-24 广东美的制冷设备有限公司 设备的初始化方法、装置、电子设备和计算机存储介质

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US73307A (en) * 1868-01-14 sttjaut
US83427A (en) * 1868-10-27 Improvement in rotary steam-engines
US52068A (en) * 1866-01-16 Improved expanding tap
US52067A (en) * 1866-01-16 Insect-trap
US5101490A (en) * 1989-01-10 1992-03-31 Bull Hn Information Systems Inc. Peripheral device controller with an EEPROM with microinstructions for a RAM control store
CA2126950A1 (fr) * 1993-07-30 1995-01-31 Bryan M. Willman Amorcage d'un ordinateur au moyen du dernier ensemble de donnees de configuration exact connu
US5537558A (en) * 1994-10-05 1996-07-16 Halliburton Company Apparatus and method for communicating multiple devices through one PCMCIA interface
US6438687B2 (en) * 1997-10-30 2002-08-20 Micron Technology, Inc. Method and apparatus for improved storage of computer system configuration information
US6167472A (en) * 1998-05-29 2000-12-26 Motorola Inc. System for communicating with and initializing a computer peripheral utilizing a masked value generated by exclusive-or of data and corresponding mask
US6519716B1 (en) * 1999-09-22 2003-02-11 International Business Machines Corporation Electronic device initialization with dynamic selection of access time for non-volatile memory
JP2001195261A (ja) * 2000-01-13 2001-07-19 Nec Corp 外部メモリから内蔵メモリへのプログラム転送方法およびその転送方法を用いたマイクロコンピュータ
DE10050604A1 (de) * 2000-10-12 2002-04-25 Siemens Ag Verfahren zum Starten einer Datenverarbeitungsanlage sowie zugehörige Komponenten
US20020083427A1 (en) * 2000-12-26 2002-06-27 Chen-Pang Li Embedded system capable of rapidly updating software and method for rapidly updating software of embedded system

Non-Patent Citations (1)

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Title
See references of WO2004023299A2 *

Also Published As

Publication number Publication date
DE10393639D2 (de) 2005-07-14
WO2004023299A3 (fr) 2004-10-07
US20060155978A1 (en) 2006-07-13
JP2005537575A (ja) 2005-12-08
WO2004023299A2 (fr) 2004-03-18
AU2003249842A1 (en) 2004-03-29

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