EP1495366A1 - Procede de traitement de pellicules dielectriques poreuses servant a reduire les dommages lors du nettoyage - Google Patents

Procede de traitement de pellicules dielectriques poreuses servant a reduire les dommages lors du nettoyage

Info

Publication number
EP1495366A1
EP1495366A1 EP03746699A EP03746699A EP1495366A1 EP 1495366 A1 EP1495366 A1 EP 1495366A1 EP 03746699 A EP03746699 A EP 03746699A EP 03746699 A EP03746699 A EP 03746699A EP 1495366 A1 EP1495366 A1 EP 1495366A1
Authority
EP
European Patent Office
Prior art keywords
supercritical
dielectric material
low
dielectric
solvent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03746699A
Other languages
German (de)
English (en)
Inventor
Paul Schilling
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Supercritical Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Supercritical Systems Inc filed Critical Supercritical Systems Inc
Publication of EP1495366A1 publication Critical patent/EP1495366A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
    • B08B7/0021—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by liquid gases or supercritical fluids
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/28—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material
    • C03C17/30—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material with silicon-containing compounds
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C23/00—Other surface treatment of glass not in the form of fibres or filaments
    • C03C23/0075—Cleaning of glass
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/422—Stripping or agents therefor using liquids only
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/422—Stripping or agents therefor using liquids only
    • G03F7/423—Stripping or agents therefor using liquids only containing mineral acids or salts thereof, containing mineral oxidizing substances, e.g. peroxy compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • Patent Application claims priority under 35 U.S.C. 119 (e) of the co-pending U.S. Provisional Patent Application, Serial No. 60/372,822 filed April 12, 2002, and entitled “METHOD OF TREATMENT OF POROUS DIELECTRIC FILMS TO REDUCE DAMAGE DURING CLEANING".
  • U.S. Patent Application Serial No. 10/379,984, mailed on March 4, 2003, and entitled “METHOD OF PASSIVATING OF LOW DIELECTRIC MATERIALS IN WAFER PROCESSING” are also hereby incorporated by reference.
  • This invention relates to the field of cleaning of dielectric films. More particularly, this invention relates to systems, devices for, and methods of treating low-k dielectric material films to reduce damage during cleaning.
  • Low-k dielectric materials are currently being integrated as interlevel dielectric materials.
  • the three main categories of low-k dielectric materials include: inorganic (SiO 2 based material); hybrid (organic functionalized inorganic matrix), and organic materials. This shift to using low-k dielectric materials has required photoresist stripping to evolve to meet higher requirements for cleanliness and residue removal, without adding cost and affecting throughput.
  • By using the low-k dielectric materials for insulating the interconnects smaller geometry interconnect structures can be built resulting in faster integrated circuits.
  • Porous low-k dielectric materials are a particular class of these low-k dielectric materials.
  • silanol groups tend to form on surfaces within the lines and the vias.
  • the silanol groups also tend to form in the voids of the porous low-k dielectric materials adjacent to the lines and the vias.
  • cleaning of these materials presents a challenge in that traditional cleaning formulations are designed to remove etch residues through dissolution of the residue or slight etching of the dielectric to release the residue.
  • the increased surface area due to their porosity greatly increases their sensitivity to these cleaning formulations, reducing the selectivity of the formulation to the etch residue.
  • ashing has unacceptable shortcomings because the ashing plasma tends to affect the organic content of the hybrid materials, thereby increasing the dielectric constant.
  • dry is typically used for stripping and wet is usually used for cleaning.
  • Wet systems use acids, bases or solvents, requiring several processing steps for residue removal. Dry systems are the preferred choice when dealing with organic photoresist material. Even when dry stripping systems are utilized, post-strip wet processing is still required to remove inorganic residues that the dry systems leave behind.
  • a low-k dielectric material layer is generally patterned using a photoresist mask in one or more etching and ashing steps.
  • a cleaning process is performed following the etching of the lines and the vias.
  • a weak etchant is typically employed to remove a monolayer of the low-k dielectric material in order to release the etch residue, the photoresist, and the bulk photoresist. It has been found that this cleaning process results in an unacceptably high etch rate of the porous low-k dielectric materials. This is even true when the porous low-k dielectric materials are exposed to a weak etchant.
  • Low-k dielectric material is a film for which the manufacturing processes require unprecedented levels of cleanliness.
  • the low-k dielectric materials differ from typical features found in 0.25 ⁇ m architecture in that both vias and lines are etched into the dielectric layer, which can trap residues, hi addition, current photoresists create tougher residues.
  • the current invention provides a means to clean the vias and lines on the one hand, and to preserve a dielectric film, on the other.
  • the current invention addresses the greatest difficulty in cleaning exposed low-k materials: stripping. Stripping is a limitation due to the fact that a polymer is utilized for the low-k and an organic resist. Cleaning the resist or residues from low-k dielectric materials without affecting the low-k dielectric material is complicated. Usually, a hard mask is placed on the low-k dielectric material, to serve as an etch stop. The hard mask can also be used as a CMP stop. When etching, most of the bulk resist is removed. However, considerable residues and polymers are typically left on the sidewalk of the trench and vias. The current invention addresses the problems associated with removal of these residues and polymers but does not etch away the low-k dielectric material.
  • Standard 250 ° F oxygen-based plasmas do not work for low-k dielectric material cleaning. High-oxygen environments oxidize and degrade film integrity and low-k dielectric material properties.
  • the current invention provides chemical cleaning without additional physical cleaning to clean sidewalls and still be selective vis-a-vis the polymer. In addition, the current invention addresses current cleaning process shortcomings by utilizing lower temperatures during the cleaning process.
  • the preferred embodiment of the current invention is for use in conjunction with supercritical carbon dioxide (SCCO 2 ).
  • SCCO 2 supercritical carbon dioxide
  • a dry chemical ion-depleted downstream microwave plasma approach is utilized
  • a wet chemical process is utilized in conjunction with the current invention to achieve high selectivity and minimal low-k dielectric material damage.
  • the current invention clears the primary hurdle of ensuring that the stripper or residue remover does not attack or degrade the low-k dielectric material. Also, etching that results in a loss in thickness or widening of openings is minimized. Further, the k- value of the film is maintained or decreased through use of the present invention.
  • FIGS. 1A and IB illustrate simplified schematics of a low-k dielectric material prior to and after removal of post-etch residue using the supercritical solution comprising supercritical carbon dioxide and a silicon-based passivating agent (i.e. a passivation processing step), followed by a cleaning solution processing step, in accordance with the instant invention.
  • the supercritical solution comprising supercritical carbon dioxide and a silicon-based passivating agent (i.e. a passivation processing step), followed by a cleaning solution processing step, in accordance with the instant invention.
  • FIG. 2 illustrates a simplified schematic of a supercritical wafer processing apparatus, in accordance with the embodiments of the invention.
  • FIG. 3 illustrates a detailed schematic diagram of a supercritical processing apparatus, in accordance with the embodiments of the invention.
  • FIG. 4 illustrates a schematic block diagram outlining steps for treating a silicon oxide-based low-k dielectric material layer, in accordance with the embodiments of the present invention.
  • low-k dielectric materials Materials exhibiting low dielectric constants of between 3.5-2.5 are generally referred to as low-k dielectric materials. Porous materials with dielectric constant of 2.5 and below are generally referred to as ultra low-k (ULK) dielectric materials.
  • ULK dielectric materials refer to both low-k dielectric and ultra low-k dielectric materials.
  • Low-k dielectric materials are usually porous oxide-based materials and can include an organic or hydrocarbon component. Examples of low-k dielectric materials include, but are not limited to, carbon-doped oxide (COD), spin-on-glass (SOG) and fluorinated silicon glass (FSG) materials. These porous low-k dielectric material films typically contain carbon and hydrogen and are deposited by methods such as spin-on or CVD.
  • a patterned low-k dielectric material layer is formed by depositing a continuous layer of a low-k dielectric material, etching a pattern in the low-k dielectric material using photolithography and removing post- etch residue using a supercritical solution comprising supercritical carbon dioxide and a silicon-based passivating agent (i.e. a passivation processing step), followed by a cleaning solution processing step.
  • the current invention acts to reduce or eliminate etching by reacting the silanol functionalities with a supercritical silylating agent, thereby reducing the rate of etch of the low-k dielectric material film in the cleaning formulation.
  • the method of the present invention preferably passivates a layer of patterned low-k dielectric material layer by end- capping silanol groups on the surface and/or in the bulk of the low-k dielectric material to produce a patterned low-k dielectric material which is more hydrophobic, more resistant to contamination and/or less reactive.
  • a passivation processing step is carried out separately from a supercritical post-etch cleaning process or, alternatively, is carried out simultaneously with a supercritical post-etch cleaning process.
  • a cleaning solution processing step is carried out following a passivation processing step.
  • a supercritical silylating agent comprises supercritical carbon dioxide and an amount of a passivating agent that is preferably a silylating agent.
  • the silylating agent preferably comprises a silane structure (R 1 );(R 2 );(R 3 )SiNH(R 4 ) -
  • R l5 R 2 , R 3 could be the same or independently selected from the group H, alkyl, aryl, propyl, phenyl, and/or derivatives thereof as well as halogens (Cl, Br, F, I).
  • R 4 could be (SiR x ;R 2 ;R 3 ) in addition to being independently selected from the group H, alkyl, aryl, propyl, phenyl, and or derivatives therof.
  • the silylating agent comprises a tetravalent organosihcon compound, wherein the silicon atom is coordinated to 4 ligands in the positions 1, 2, 3 and 4 in a pyramidal configuration.
  • the silylating agent comprises a silazane structure, which can be described as an amine structure with two organosilyl groups coordinated to the nitrogen of the amine.
  • the silylating agent can be introduced into supercritical carbon dioxide (SCCO 2 ) by itself or with a carrier solvent, such as N, -dimethylacetamide (DMAC), gamma- butyrolacetone (BLO), dimethyl sulfoxide (DMSO), ethylene carbonate (EC) N-methylpyrrolidone (NMP), dimethylpiperidone, propylene carbonate, alcohol or combinations thereof, to generate the supercritical silylating agent.
  • SCCO 2 is used as a carrier fluid for the silylating agent.
  • SCCO 2 is used as a carrier fluid, the silylating agent can be carried easily and quickly throughout the film, insuring complete and rapid reaction with the entire film. It will be clear to one skilled in the art that a supercritical passivating solution with any number of silylating agents and combinations of silylating agents are within the scope of the present invention.
  • the process temperature is between 25 and 200 °C and the pressure is between 700 and 9000 psi. While supercritical CO 2 is preferred, under certain circumstances liquid CO 2 can be used.
  • the silylating agent comprises hexamethyldisilazane.
  • the silylating agent comprises an organochlorosilane.
  • the silylating agent comprises a hydrolyzed alkoxysilane.
  • the typical process time is between 15 seconds and 10 minutes.
  • FIG. 1A and IB show a simplified schematic of a low-k dielectric material prior to and after removal of post-etch residue using the supercritical solution comprising supercritical carbon dioxide and a silicon-based passivating agent (i.e. a passivation processing step), followed by a cleaning solution processing step.
  • the patterned low-k dielectric material 100 in FIG. 1A illustrates the patterned low-k dielectric material 100 prior to removal of post-etch residue
  • FIG. IB illustrates the low-k dielectric material 100 following removal of post-etch residue.
  • the resist 110 and the sidewall polymer residue 120 can be seen on the low-k dielectric material structure 130 in FIG. 1 A prior to the supercritical carbon dioxide cleaning and cleaning solution processing steps.
  • FIG. IB illustrates the same low-k dielectric material structure 130 after high-selectivity cleaning, showing no undercut and residue removal.
  • FIG. 2 shows a simplified schematic of a supercritical processing apparatus 200.
  • the apparatus 200 comprises a carbon dioxide source 221 that is connected to an inlet line 226 through a source valve 223 which can be opened and closed to start and stop the flow of carbon dioxide from the carbon dioxide source 221 to the inlet line 226.
  • the inlet line 226 is preferably equipped with one or more back-flow valves, pumps and heaters, schematically shown by the box 220, for generating and/or maintaining a stream of supercritical carbon dioxide.
  • the inlet line 226 also preferably has an inlet valve 225 that is configured to open and close to allow or prevent the stream of supercritical carbon dioxide from flowing into a processing chamber 201.
  • the processing camber 201 is preferably equipped with one or more pressure valves 209 for exhausting the processing chamber 201 and/or for regulating the pressure within the processing chamber 201. Also in accordance with the embodiments of the invention, the processing chamber 201, is coupled to a pump and/or a vacuum 211 for pressurizing and/or evacuating the processing chamber 201.
  • the chuck 233 and/or the processing chamber 201 has one or more heaters 231 for regulating the temperature of the wafer structure 213 and/or the temperature of a supercritical processing solution within the processing chamber 201.
  • the apparatus 200 also preferably has a circulation loop 203 that is coupled to the processing chamber 201.
  • the circulation loop 203 is preferably equipped with one or more valves 215 and 215' for regulating the flow of a supercritical processing solution through the circulation loop 203 and through the processing chamber 201.
  • the circulation loop 203 is also preferably equipped with any number back-flow valves, pumps and/or heaters, schematically represented by the box 205, for maintaining a supercritical processing solution and flowing the supercritical processing solution through the circulation loop 203 and through the processing chamber 201.
  • the circulation loop 203 has an injection port 207 for introducing chemistry, such as passivating agents and solvents, into the circulation loop 203 for generating supercritical processing solutions in situ.
  • FIG. 3 shows a supercritical processing apparatus 76 in more detail than Figure 2 described above.
  • the supercritical processing apparatus 76 is configured for generating supercritical cleaning, rinse and curing solutions, and for treating a wafer therewith.
  • the supercritical processing apparatus 76 includes a carbon dioxide supply vessel 332, a carbon dioxide pump 334, a processing chamber 336, a chemical supply vessel 338, a circulation pump 340, and an exhaust gas collection vessel 344.
  • the carbon dioxide supply vessel 332 is coupled to the processing chamber 336 via the carbon dioxide pump 334 and carbon dioxide piping 346.
  • the carbon dioxide piping 346 includes a carbon dioxide heater 348 located between the carbon dioxide pump 334 and the processing chamber 336.
  • the processing chamber 336 includes a processing chamber heater 350.
  • the circulation pump 340 is located on a circulation line 352, which couples to the processing chamber 336 at a circulation inlet
  • the chemical supply vessel 338 is coupled to the circulation line 352 via a chemical supply line 358, which includes a first injection pump 359.
  • a rinse agent supply vessel 360 is coupled to the circulation line 352 via a rinse supply line 362, which includes a second injection pump 363.
  • the exhaust gas collection vessel 344 is coupled to the processing chamber 336 via exhaust gas piping 364.
  • the carbon dioxide supply vessel 332, the carbon dioxide pump 334, and the carbon dioxide heater 348 form a carbon dioxide supply arrangement 349.
  • the chemical supply vessel 338, the first injection pump 359, the rinse agent supply vessel 360, and the second injection pump 363 form a chemical and rinse agent supply arrangement 365.
  • the supercritical processing apparatus 76 includes varving. control electronics, filters, and utility hookups which are typical of supercritical fluid processing systems.
  • a wafer (not shown) with a residue thereon is inserted into the wafer cavity 312 of the processing chamber 336 and the processing chamber 336 is sealed.
  • the processing chamber 336 is pressurized by the carbon dioxide pump 334 with the carbon dioxide from the carbon dioxide supply vessel 332 and the carbon dioxide is heated by the carbon dioxide heater 348 while the processing chamber 336 is heated by the processing chamber heater 350 to ensure that a temperature of the carbon dioxide in the processing chamber 336 is above a critical temperature.
  • the critical temperature for the carbon dioxide is 31 °C.
  • the temperature of the carbon dioxide in the processing chamber 336 is within a range of range of from 25 °C to about 200 °C, and preferably at or near to 70 °C, during a supercritical passivating step.
  • the first injection pump 359 pumps the processing chemistry, such as a silylating agent, from the chemical supply vessel 338 into the processing chamber 336 via the circulation line 352 while the carbon dioxide pump further pressurizes the supercritical carbon dioxide.
  • the pressure in the processing chamber 336 is preferably in the range of about 700 to 9,000 psi and most preferably at or near 3,000 psi.
  • the carbon dioxide pump 334 stops pressurizing the processing chamber 336
  • the first injection pump 359 stops pumping processing chemistry into the processing chamber 336
  • the circulation pump 340 begins circulating supercritical carbon dioxide and a cleaning solution.
  • the circulation pump 340 begins circulating the supercritical cleaning solution comprising the supercritical carbon dioxide and the processing chemistry.
  • the pressure within the processing chamber 336 at this point is about 3000 psi.
  • the wafer When a wafer (not shown) with a low-k dielectric material layer is being processed within the pressure chamber 336, the wafer is held using a mechanical chuck, a vacuum chuck or other suitable holding or securing means, accordance with the embodiments of the invention the wafer is stationary within the processing chamber 336 or, alternatively, is rotated, spun or otherwise agitated during the supercritical process step.
  • the processing chamber 336 is partially depressurized by exhausting some of the supercritical process solution to the exhaust gas collection vessel 344 in order to return conditions in the processing chamber 336 to near the initial supercritical conditions.
  • the processing chamber 336 is cycled through at least one such decompression and compression cycle before the supercritical processing solutions are completely exhausting the processing chamber 336 to the exhaust into the collection vessel 344.
  • a second supercritical process step is performed or the wafer is removed from the processing chamber 336, and the wafer processing continues in a second processing apparatus or module (not shown).
  • Figure 4 is a block diagram 400 outlining steps for treating a substrate structure comprising a patterned low-k dielectric material layer and post-etch or post-ash residue thereon using a supercritical cleaning and passivating solution, hi the step 402 the substrate structure comprising the post-etch residue is placed and sealed within a processing chamber. After the substrate structure is placed into and sealed within processing chamber in the step 402, in the step 404 the processing chamber is pressurized with supercritical CO 2 and processing chemistry is added to the supercritical CO 2 to generate a supercritical cleaning and passivating solution.
  • the cleaning and passivating chemistry comprises at least one organosihcon compound.
  • the substrate structure is maintained in the supercritical processing solution for a period of time sufficient to remove at least a portion of the residue from the substrate structure and passivate surfaces exposed after the residue is removed.
  • the supercritical cleaning and passivating solution is preferably circulated through the processing chamber and/or otherwise agitated to move the supercritical cleaning solution over surfaces of the substrate structure. This cleaning step can also be performed after passivation, before passivation or during passivation.
  • a supercritical cleaning solution processing step occurs in which a supercritical cleaning solution is preferably circulated through the processing chamber and/or otherwise agitated to move the supercritical solvent over surfaces of the substrate structure.
  • the processing chamber is partially exhausted in the step 410.
  • the cleaning process comprising steps 404, 406, and 408 are repeated any number of times, as indicated by the arrow connecting the steps 410 to 404, required to remove the residue from the substrate structure and passivate the surfaces exposed.
  • the processing comprising steps 404, 406, and 408, in accordance with the embodiments of the invention, use fresh supercritical carbon dioxide, fresh chemistry or both.
  • the concentration of the cleaning chemistry is modified by diluting the processing chamber with supercritical carbon dioxide, by adding additional charges of cleaning chemistry or a combination thereof.
  • the substrate structure is preferably treated to a supercritical rinse solution.
  • the supercritical rinse solution preferably comprises supercritical CO 2 and one or more organic solvents, but can be pure supercritical CO 2 .
  • the substrate structure is cleaned in the steps 404, 406,
  • the processing chamber is depressurized and the substrate structure is removed from the processing chamber.
  • the substrate structure is cycled through one or more additional cleaning/ rinse processes comprising the steps 404, 406, 408, 410, and 412 as indicated by the arrow connecting steps 412 and 404.
  • the substrate structure is treated to several rinse cycles prior to removing the substrate structure from the chamber in the step 414, as indicated by the arrow connecting the steps 412 and 410.
  • the substrate structure can be dried and/or pretreated prior to passivating the low-k dielectric material layer thereon by using a supercritical solution comprising supercritical carbon dioxide and one or more solvents such as methanol, ethanol, and/or a combination thereof.
  • a supercritical solution comprising supercritical carbon dioxide and one or more solvents such as methanol, ethanol, and/or a combination thereof.
  • pretreating the low-k dielectric material layer with supercritical solution comprising supercritical carbon dioxide with or without cosolvents appears to improve the coverage of the silyl-groups on surface of the low- k dielectric material layer.
  • a wafer comprising a post-etch residue and/or a patterned low-k dialectic material layer can be treated to any number cleaning and passivating steps and/or sequences.
  • the method of passivating low-k dielectric material has been primarily described herein with reference to a post-etch treatment and/or a post-etch cleaning treatment, the method of the present invention can be used to directly passivate low-k dielectric materials. Further, it will be appreciated that when treating a low-k dielectric material, in accordance with the method of the present invention, a supercritical rinse step is not always necessary and simply drying the low-k dielectric material prior treating the low-k dielectric material with a supercritical passivating solution can be appropriate for some applications.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Geochemistry & Mineralogy (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Cette invention porte sur un dispositif, un procédé et un système de traitement de pellicules de matériau diélectrique à faible constante k permettant de réduire les dommages lors des procédés de nettoyage du composant micro-électronique. Selon cette invention, les pellicules poreuses de matériau diélectrique à faible constante k sont nettoyées avec une sélectivité élevée et un minimum de dommage pour le matériau diélectrique au moyen d'un procédé consistant à soumettre les composants micro-électroniques à un traitement de passivation puis à un procédé de nettoyage par solution.
EP03746699A 2002-04-12 2003-04-11 Procede de traitement de pellicules dielectriques poreuses servant a reduire les dommages lors du nettoyage Withdrawn EP1495366A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US37282202P 2002-04-12 2002-04-12
US372822P 2002-04-12
PCT/US2003/011012 WO2003087936A1 (fr) 2002-04-12 2003-04-11 Procede de traitement de pellicules dielectriques poreuses servant a reduire les dommages lors du nettoyage

Publications (1)

Publication Number Publication Date
EP1495366A1 true EP1495366A1 (fr) 2005-01-12

Family

ID=29250913

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03746699A Withdrawn EP1495366A1 (fr) 2002-04-12 2003-04-11 Procede de traitement de pellicules dielectriques poreuses servant a reduire les dommages lors du nettoyage

Country Status (7)

Country Link
EP (1) EP1495366A1 (fr)
JP (1) JP4424998B2 (fr)
KR (1) KR100969027B1 (fr)
CN (2) CN100335969C (fr)
AU (1) AU2003226048A1 (fr)
TW (1) TWI272693B (fr)
WO (1) WO2003087936A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8026047B2 (en) 2005-01-27 2011-09-27 Nippon Telegraph And Telephone Corporation Resist pattern forming method, supercritical processing solution for lithography process, and antireflection film forming method

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4424998B2 (ja) * 2002-04-12 2010-03-03 東京エレクトロン株式会社 多孔質誘電体膜の洗浄中のダメージを低減する処理方法
US20050158664A1 (en) * 2004-01-20 2005-07-21 Joshua Tseng Method of integrating post-etching cleaning process with deposition for semiconductor device
JP4630077B2 (ja) 2005-01-27 2011-02-09 日本電信電話株式会社 レジストパターン形成方法
US7008853B1 (en) * 2005-02-25 2006-03-07 Infineon Technologies, Ag Method and system for fabricating free-standing nanostructures
JP2008538013A (ja) * 2005-04-15 2008-10-02 アドバンスド テクノロジー マテリアルズ，インコーポレイテッド 溶媒系中の自己組織化単分子膜を用いた高線量イオン注入フォトレジストの除去
JP5247999B2 (ja) * 2005-09-29 2013-07-24 東京エレクトロン株式会社 基板処理方法およびコンピュータ読取可能な記憶媒体
US7658802B2 (en) * 2005-11-22 2010-02-09 Applied Materials, Inc. Apparatus and a method for cleaning a dielectric film
US7807219B2 (en) * 2006-06-27 2010-10-05 Lam Research Corporation Repairing and restoring strength of etch-damaged low-k dielectric materials
JP5173396B2 (ja) * 2007-12-25 2013-04-03 大陽日酸株式会社 絶縁膜のダメージ回復処理方法
JP6151484B2 (ja) 2012-06-11 2017-06-21 東京応化工業株式会社 リソグラフィー用洗浄液及び配線形成方法
KR20200015279A (ko) 2018-08-03 2020-02-12 삼성전자주식회사 나노결정질 그래핀의 형성방법 및 이를 포함하는 소자

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185296A (en) * 1988-07-26 1993-02-09 Matsushita Electric Industrial Co., Ltd. Method for forming a dielectric thin film or its pattern of high accuracy on a substrate
GB2262465A (en) * 1991-12-16 1993-06-23 Secr Defence Casting of aluminium-lithium alloys
US5479727A (en) * 1994-10-25 1996-01-02 Air Products And Chemicals, Inc. Moisture removal and passivation of surfaces
US6500605B1 (en) * 1997-05-27 2002-12-31 Tokyo Electron Limited Removal of photoresist and residue from substrate using supercritical carbon dioxide process
WO2001082368A2 (fr) * 2000-04-25 2001-11-01 Tokyo Electron Limited Procede de depot de film metallique et outil combine de depot metallique comprenant un module de sechage/nettoyage supercritique
US6673521B2 (en) * 2000-12-12 2004-01-06 Lnternational Business Machines Corporation Supercritical fluid(SCF) silylation process
JP4424998B2 (ja) * 2002-04-12 2010-03-03 東京エレクトロン株式会社 多孔質誘電体膜の洗浄中のダメージを低減する処理方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO03087936A1 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8026047B2 (en) 2005-01-27 2011-09-27 Nippon Telegraph And Telephone Corporation Resist pattern forming method, supercritical processing solution for lithography process, and antireflection film forming method

Also Published As

Publication number Publication date
KR100969027B1 (ko) 2010-07-09
CN101005024A (zh) 2007-07-25
TW200308051A (en) 2003-12-16
WO2003087936A1 (fr) 2003-10-23
KR20040111507A (ko) 2004-12-31
TWI272693B (en) 2007-02-01
CN100335969C (zh) 2007-09-05
AU2003226048A1 (en) 2003-10-27
JP4424998B2 (ja) 2010-03-03
CN1646990A (zh) 2005-07-27
JP2005522737A (ja) 2005-07-28
CN101005024B (zh) 2011-06-08

Similar Documents

Publication Publication Date Title
US7169540B2 (en) Method of treatment of porous dielectric films to reduce damage during cleaning
US7270941B2 (en) Method of passivating of low dielectric materials in wafer processing
US7553769B2 (en) Method for treating a dielectric film
US7585777B1 (en) Photoresist strip method for low-k dielectrics
JP3771496B2 (ja) 超臨界二酸化炭素法を用いた基板からフォトレジストおよび残渣の除去
US8591661B2 (en) Low damage photoresist strip method for low-K dielectrics
US20040177867A1 (en) Tetra-organic ammonium fluoride and HF in supercritical fluid for photoresist and residue removal
KR20080109886A (ko) 손상된 유전체 재료를 제거하는 제거 방법
JP2008535249A (ja) 超臨界ｃｏ２を用いた誘電体層の処理法
JP4424998B2 (ja) 多孔質誘電体膜の洗浄中のダメージを低減する処理方法
KR20050001797A (ko) 미세 전자 소자 기판으로부터 포토레지스트 또는 유기물을세정하는 방법
US20070000519A1 (en) Removal of residues for low-k dielectric materials in wafer processing
TW500985B (en) Removal of photoresist and residue from substrate using supercritical carbon dioxide process
TW200305213A (en) Method of passivating of low dielectric materials in wafer processing
IJ et al. STRIP PROCESS OPTIMIZATION FOR POROUS ULK FILMS

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20041015

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL LT LV MK

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: TOKYO ELECTRON LIMITED

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20071103