TW200308051A - Method of treatment of porous dielectric films to reduce damage during cleaning - Google Patents

Method of treatment of porous dielectric films to reduce damage during cleaning Download PDF

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TW200308051A
TW200308051A TW092108563A TW92108563A TW200308051A TW 200308051 A TW200308051 A TW 200308051A TW 092108563 A TW092108563 A TW 092108563A TW 92108563 A TW92108563 A TW 92108563A TW 200308051 A TW200308051 A TW 200308051A
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supercritical
dielectric material
low
dielectric
patent application
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TW092108563A
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TWI272693B (en
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Paul E Schilling
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Tokyo Electron Ltd
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02343—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a liquid
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B08—CLEANING
    • B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
    • B08B7/00—Cleaning by methods not provided for in a single other subclass or a single group in this subclass
    • B08B7/0021—Cleaning by methods not provided for in a single other subclass or a single group in this subclass by liquid gases or supercritical fluids
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C17/00—Surface treatment of glass, not in the form of fibres or filaments, by coating
    • C03C17/28—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material
    • C03C17/30—Surface treatment of glass, not in the form of fibres or filaments, by coating with organic material with silicon-containing compounds
    • C—CHEMISTRY; METALLURGY
    • C03—GLASS; MINERAL OR SLAG WOOL
    • C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C23/00—Other surface treatment of glass not in the form of fibres or filaments
    • C03C23/0075—Cleaning of glass
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/422—Stripping or agents therefor using liquids only
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • G03F7/422—Stripping or agents therefor using liquids only
    • G03F7/423—Stripping or agents therefor using liquids only containing mineral acids or salts thereof, containing mineral oxidizing substances, e.g. peroxy compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A device, method, and system for treating low-k dielectric material films to reduce damage during microelectronic component cleaning processes is disclosed. The current invention cleans porous low-k dielectric material films in a highly selectivity with minimal dielectric material damage by first treating microelectronic components to a passivating process followed by a cleaning solution process.

Description

(1) 200308051 玖、發明說明 本專利申請案係在2003年3月4日郵寄之同在申請 中之美國專利申請案序號第10/3 79,984號、標題爲“晶圓 處理中之低電介質材料之鈍化方法”之部份接續申請案。 此申請案主張在2002年4月12曰提出之同在申請中之美 國臨時專利申請案序號第60/372,822號、且標題爲“處理 多孔電介質膜以減少淸潔期間之損壞的方法”之 35 U.S.C. 119(e)下之優先權。2002年4月12日提出、且標 題爲“處理多孔電介質膜以減少淸潔期間之損壞的方法，，之 臨時專利申請案序號第60/3 7 2,822號，及在2003年3月 4曰郵寄、且標題爲“晶圓處理中之低電介質材料之鈍化 方法”之美國專利申請案序號第1 0/3 79,9 84號亦據此以引 用的方式倂入本文中。 【發明所屬之技術領域】 本發明有關電介質膜之淸潔領域。更特別是本發明有 關處理低k値電介質膜以減少淸潔期間之損壞的系統、裝 置、及方法。 【先前技術】 半導體技術中之近來進步涉及用低！^値電介質材料取 低k値電介質材料目(1) 200308051 发明 Description of the invention This patent application was mailed on March 4, 2003, and is a US Patent Application No. 10/3 79,984, which is also in the application, and entitled "Low Dielectric Materials in Wafer Processing" "Passivation method" part of the application. This application claims 35 of the U.S. Provisional Patent Application No. 60 / 372,822, which was filed on April 12, 2002, and is entitled "Method for Processing Porous Dielectric Membrane to Reduce Damage During Cleaning" 35 Priority under USC 119 (e). Proposed on April 12, 2002 and titled "Method for Processing Porous Dielectric Membrane to Reduce Damage During Cleaning," Provisional Patent Application No. 60/3 7 2,822, and mailed on March 4, 2003 US Patent Application Serial No. 10/3 79,9 84 entitled "Passivation Method for Low Dielectric Materials in Wafer Processing" is also incorporated herein by reference. [Technology to which the Invention belongs Field] The present invention relates to the field of cleaning of dielectric films. More particularly, the present invention relates to systems, devices, and methods for processing low-k dielectric films to reduce damage during cleaning. [Previous Technology] Recent advances in semiconductor technology relate to Use low! ^ 値 dielectric material for low k 値 dielectric material

代絕緣互連部份所用之電介質材料 前係整合成層P 要分類包含： (2) (2)200308051 之無機基質）、及有機材料。此轉變至使用低k値電介質 材料要求光阻鈾刻劑之剝除進展至滿足用於淸潔及殘渣移 除之較局要求，而不會增加成本及影響生產量。 藉著使用絕緣該連線用之低k値電介質材料，可建立 較小之幾何形狀連線結構，導致更快之積體電路。多孔低 k値電介質材料係這些低k値電介質材料之一特別等級。 當在該多孔低k値電介質材料中蝕刻直線及通孔時，矽醇 基官能團傾向於形成在該直線及通孔內之表面上。該矽醇 基官能團亦傾向於形成在該多孔低k値電介質材料毗連該 直線及通孔之空隙。 於低k値電介質無機及混合材料之案例中，這些材料 之淸潔呈現出一項挑戰，其中傳統之淸潔公式係設計成可 經由該殘澄之溶化移除齡刻殘澄或經由電介質之輕微|虫刻 以釋放殘渣。但，以低k値電介質材料，由於其多孔性所 該所增加之表面積大幅增加其對這些淸潔公式之敏感性， 而減少對該鈾刻殘渣之公式之選擇性。諸如灰化之傳統等 離子體淸洗方法亦具有不能接受之缺點，因爲該灰化之等 離子體傾向於影響該混合材料之有機含量，藉此增加該電 介常數。 目前使用二基本系統：濕式及乾式。乾式系統係典型 用於剝除，且濕式系統係通常用於淸潔。濕式系統使用酸 類、鹼類或溶劑，需要數種殘渣移除用之處理步驟。當處 理有機之光阻蝕刻劑材料時，乾式系統係較佳之選擇。即 使當利用乾式剝除系統時，在剝除後之濕式處理係仍然需 -6- (3) (3)200308051 要’以移除該乾式系統所遺留之無機殘渣。 於半導體製造中，一低k値電介質材料層大致上係使 用一光阻飩刻劑遮罩於一或多個蝕刻及灰化步驟中圖樣化 。在蝕刻之後或由於其物理本質，這些薄膜傾向於在其表 面上具有大量矽醇基官能性，且由於其多孔本質，於淸潔 期間對一淸潔公式呈現大表面積之材料。這呈現該具有很 多淸潔公式之低k値電介質材料薄膜之實質蝕刻問題，通 常至破壞該低k値電介質材料薄膜之程度。 爲了移除這些矽醇基官能團、該直線及通孔中之蝕刻 及光阻蝕刻劑殘渣、及來自該低k値電介質材料之一暴露 表面之本體光阻蝕刻劑，在該直線及通孔之蝕刻之後施行 一淸潔製程。於此淸潔製程中，一弱蝕刻劑典型係用於移 除該低k値電介質材料之單層，以便釋放該蝕刻殘渣、該 光阻蝕刻劑、及該本體光阻蝕刻劑。吾人已發現此淸潔製 程導致該多孔低k値電介質材料之一不能接受之高蝕刻速 率。當該多孔低k値電介質材料係暴露至一弱蝕刻劑時， 這是更加真實的。於存在有該矽醇基官能團處，吾人已發 現藉著該弱蝕刻劑移除顯著地超過該單層之低k値電介質 材料。 目前之高劑量植入物淸潔具有多項問題。當利用時， 該抗蝕劑濃密地植入，氫氣係由該抗蝕劑頂部三分之一處 逐出，且產生一極端之碳化層。該碳化層係難以移除及不 會迅速地蝕刻。再者，具有易揮發成分之本體抗飩劑仍然 存在下邊。 -7- (4) (4)200308051 縱使利用正常之剝除，在此有一壓力增強，而當在較 慢之速率下淸潔時導致爆裂及起泡。這不只汙染該處理室 ，亦使這些碳化厚塊與該晶圓表面之暴露區域黏合。此外 ，標準之高溫氧基等離子體不能爲低k値電介質材料之淸 潔工作。這些高溫及高氧氣環境使薄膜完整性及低k値電 介質材料之性質氧化及降級。 吾人所需者是一種在蝕刻之後及在淸潔之前處理多孔 低k値電介質材料之方法，而可減少該多孔低k値電介質 材料中之矽醇基官能團之存在。其挑戰係確保該淸潔方法 係足夠積極以充分淸潔該表面，而不會蝕刻或改變該低k 値材料。 【發明內容】 今曰具有更細結構及更高縱橫比之微電子裝置需要新 的低k値材料。有需要光阻蝕刻劑剝除技術以滿足臨界縱 橫比及縮減尺寸所帶來之挑戰。低k値電介質材料係一種 需要空前淸潔程度之製程之薄膜。該低k値電介質材料不 同於在通孔及直線兩者皆蝕刻進入該電介質層而能夠捕獲 殘渣之〇·25微米結構中所發現之典型特色。此外，目前 之光阻蝕刻劑造成較堅硬之殘渣。本發明提供一種一方面 淸潔該通孔及直線、且另一方面保存一電介質薄膜之機犠 〇 本發明強調於淸潔已暴露之低k値材料中之最大困難 點：剝除。由於聚合物係用於該低k値有機抗蝕劑之事實 -8 - (5) (5)200308051 ，剝除係一項限制。淸潔來自低k値電介質材料之抗鈾劑 或殘渣而不會影響該低k値電介質材料係複雜的。通常， 一硬質遮罩係放在該低k値電介質材料上，以具有一 f虫刻 停止層之作用。該硬質遮罩亦可用作一 CMP停止層。當 倉虫刻時，大部份本體鈾刻劑係移除。然而，大量殘渣及聚 合物典型係留在該溝槽及通孔之側壁上。本發明強調有關 這些殘渣及聚合物之移除問題，但不蝕刻該低k値電介質 材料。 標準華氏250度氧基等離子體不會工作用於低k値電 介質材料之淸潔。高氧環境將使薄膜完整性及低k値電介 質材料之性質氧化及降級。本發明提供化學淸潔，而無額 外之物理性淸潔，以淸潔各側壁，及仍然可關於聚合物作 選擇。此外，本發明藉著於該淸潔製程期間利用較低之溫 度強調目前淸潔處理之缺點。 本發明之較佳具體實施例係用於會同超臨界二氧化碳 (scco2)—起使用。於本發明之另一具體實施例中，利用 一乾式化學離子·損耗之下游微波等離子體方法。在本發 明之又另一具體實施例中，一濕式化學製程係會同本發明 一起使用，以達成高選擇性及最小之低k値電介質材料損 壞。 本發明淸除確保該剝除器及殘渣移除器不會攻擊或降 級該低k値電介質材料之主要障礙。亦使導致厚度損失或 加寬開口之蝕刻減至最小。再者，經由使用本發明維持或 減少該薄膜之k値。 (6) (6)200308051 【實施方式】 呈現3.5-2.5低介電常數之材料大致上係稱爲低k値 電介質材料。具有2 · 5及以下介電常數之多孔材料大致上 係稱爲超低k値（ULK)電介質材料。爲此申請案之故，低 k値電介質材料意指低k値電介質及超低k値電介質材料 兩者。低k値電介質材料通常係多孔氧化物基材料，及可 包含一有機或碳化氫成份。低k値電介質材料之範例包括 、但不限於摻雜碳之氧化物（COD)、旋轉塗佈玻璃（s〇 G) 、及氟化矽玻璃（FSG)材料。這些多孔低k値電介質材料 膜典型包含碳及氫，且藉著諸如旋轉塗佈或CVD方法澱 積。以產生一可承受來自淸潔公式之損害及典型具有一 SiOx基或SiOx-CxHy基之無機基質薄膜之方式處理這些 薄膜。 按照本發明之方法，一已圖案化之低k値電介質材料 層係藉著澱積一低k値電介質材料之連續層、於該低k値 電介質材料中使用微影術鈾刻一佈線圖案、及使用一包括 超臨界二氧化碳及矽基鈍化劑（亦即鈍化處理步驟）之超臨 界溶液移除蝕刻後殘渣，隨後藉著淸潔處理步驟所形成。 本發明用於藉著該矽烷醇官能團與一超臨界甲矽烷基 化劑之反應減少或消除蝕刻，藉此減少該淸潔公式中低k 値電介質材料膜之蝕刻速率。本發明之方法最好藉著封端 在該低k値電介質材料之表面上及/或本體中之矽烷醇官 能團使一已圖案化之低k値電介質材料層鈍化，以產生一 -10- (7) (7)200308051 更疏水 '更耐汙染及/或較不會起反應之已圖案化之低k 値電介質材料。在該鈍化處理之後，本發明之方法最好用 淸潔溶液以最小之蝕刻淸潔該薄膜。按照本發明之具體實 施例’由一超臨界蝕刻後淸潔處理分開地進行一鈍化處理 步驟’或另一選擇係與一超臨界蝕刻後淸潔處理同時進行 。再者’按照本發明之具體實施例，在一鈍化處理步驟之 後進行一淸潔溶液處理步驟。按照本發明之具體實施例， 一超臨界甲矽烷基化劑包含超臨界二氧化碳及最好係甲矽 院基化劑之某一數量之鈍化劑。該甲矽烷基化劑最好包含 一矽甲烷結構（RdURJUROSiNI^Rd，在此Rl5R2，R3應係 相同或獨立地選自氫、烷基、芳香族羥基、丙基、苯基及 /或其衍生物之基團以及鹵素（氯、溴、氟、碘）。除了獨 立地選自氫、烷基、芳香族羥基、丙基、苯基及/或其衍 生物之基團外，R4可爲（SiR1;R2;R3)。於另一具體實施例 中，該甲矽烷基化劑包含一四價有機矽化合物，其中該矽 原子係於一金字塔狀架構中之位置1，2,3及4組合成4個 配合基。於又另一具體實施例中，該甲矽烷基化劑包含一 矽氨烷結構，其能敘述爲一具有組合成該碳氫基氨之氮之 二有機甲矽烷基團之碳氫基氨結構。 該甲矽烷基化劑能本身或以一載體溶劑導入超臨界二 氧化碳（SCC02)，諸如N，-二甲基乙醯胺（DMAC)、7-丁內 酯（BL0)、二甲亞碾（DMS0)、碳酸乙烯酯（EC)、甲基吡咯 烷酮（NMP)、二甲基吡啶酮、碳酸丙烯酯、酒精或其組合 物，以產生該超臨界甲矽烷基化劑。SCC02最好係用作— (8) (8)200308051 用於該甲矽烷基化劑之載體流體。藉著使用scco2當作 該載體流體，該甲砂丨兀基化劑可輕易及迅速地載送遍及該 薄膜，確保與該整個薄膜完全及快速反應。 熟諳此技藝者將淸楚的是一種具有任意數量之甲矽烷 基化劑及各甲矽烷基化劑之組合之超臨界鈍化溶液係落在 本發明之範圍內。 該熱力學條件係可變的：該製程溫度係於攝氏25及 200度之間，且該壓力係於每平方英吋700及9000磅之 間。雖然超臨界C Ο 2係較佳，在某些情況下能使用液體 co2。該甲矽烷基化劑最好包含六甲基二矽氮烷。另一選 擇係該甲矽烷基化劑包含有機氯矽甲烷。又另一選擇係該 甲矽烷基化劑包含一水解矽烷類。該典型製程時間係於 1 5秒及1 〇分鐘之間。 圖1A及1B顯示一在使用該超臨界溶液、隨後藉著 一淸潔溶液處理步驟移除蝕刻後殘渣之前後之低k値電介 質材料之簡化槪要圖，該溶液包括超臨界二氧化碳及矽基 鈍化劑（亦即鈍化處理步驟）。圖1A中之已圖案化低k値 電介質材料1〇〇說明移除蝕刻後殘渣之前之已圖案化低k 値電介質材料100，且圖1B說明移除蝕刻後殘渣之後之 低k値電介質材料1〇〇。特別地是於該超臨界二氧化碳淸 潔及淸潔溶液處理步驟之前，能在圖1A中之低k値電介 W材料結構130上看見該抗蝕劑110及該側壁聚合物殘渣 1 20 °圖1B說明在高度選擇性淸潔之後之相同低k値電介 質材料結構1 3 〇，其顯示無任何側凹及殘渣移除。 200308051 Ο) 圖2顯不一超臨界處理設備200之簡化槪要圖。該設 備200包含經過一氣源閥223連接至入口管線226之二氧 化碳氣源221，該氣源閥可打開及關閉以開始及停止二氧 化碳由二氧化碳氣源221流至該入口管線226。該入口管 線.226最好配有一或多個回流閥、泵浦及加熱器，其由該 箱子220所圖示地顯示，用於產生及/或維持一超臨界二 氧化碳之流動。該入口管線226最好亦具有一入口閥225 ，其係架構成可打開及關閉，以允許或防止超臨界二氧化 碳流入一處理室2 0 1之流動。 又參考圖2，該處理室2〇1最好係設有一或多個壓力 閥209，用於排出該處理室201之氣體及/或用於調節該 處理室20 1內之壓力。亦按照本發明之具體實施例，該處 理室201係耦合至一用於加壓及/或排空該處理室201之 泵浦及/或真空裝置211。 再次參考圖2，在該設備200之處理室201內最好有 一用於固持及/或支撐一晶圓結構2 13之卡盤23 3。按照 本發明之另一具體實施例，該卡盤233及/或處理室201 具有一或多個用於調節該處理室20 1內晶圓結構2 1 3之溫 度及/或一超臨界處理溶液之溫度之加熱器23 1。 該設備200最好亦具有一耦合至該處理室201之循環 迴路203。該循環迴路203最好係配備有一或多個用於調 節超臨界處理溶液之流經該循環迴路203及流經該處理室 201之閥門215及215’。該循環迴路203最好亦配備有任 意數目之回流閥、泵浦及加熱器，其由該箱子205所圖示 (10) (10)200308051 地顯示，用於維持一超臨界處理溶液及使該超臨界處理溶 液流經該循環迴路203及經過該處理室201。按照本發明 之一較佳具體實施例，該循環迴路203具有一用於將諸如 鈍化劑及溶劑等化學成分導入該循環迴路203之噴射通口 207，用於在原處產生超臨界處理溶液。 圖3比上述圖2更詳細地顯示一超臨界處理設備76 。該超臨界處理設備76係架構成用於產生超臨界淸潔、 洗滌及固化溶液，及用於隨其處理一晶圓。該超臨界處理 設備76包含一二氧化碳供給容器332、二氧化碳泵浦334 、處理室 33 6、化學品供給容器3 3 8、循環泵浦340、及 一廢氣收集容器344。該二氧化碳供給容器332係經由該 二氧化碳泵浦334及二氧化碳管道346耦合至該處理室 336。該二氧化碳管道 346包含一位於該二氧化碳栗浦 334及該處理室336間之二氧化碳加熱器348。該處理室 336包含一處理室加熱器350。該循環泵浦340係位在一 循環管線3 5 2上，該管線在一循環入口 3 5 4及在一循環出 口 3 5 6耦合至該處理室3 3 6。該化學品供給容器3 3 8係經 由一包含第一噴射泵35 9之化學供給管線35 8耦合至該循 環管線3 5 2。一洗滌劑供給容器3 6 0係經由一包含第二噴 射泵3 6 3之洗滌供給管線3 6 2耦合至該循環管線3 5 2。該 廢氣收集容器344係經由廢氣管道364耦合至該處理室 336 ° 該二氧化碳供給容器332、該二氧化碳泵浦334、及 二氧化碳加熱器348形成一二氧化碳供給配置349。該化 (11) (11)200308051 學品供給容器338、該第一噴射泵35 9、該洗滌劑供給容 器3 60、及該第二噴射泵3 6 3形成一化學及洗滌劑供給配 置 3 65。 對熟練該技藝者將明顯易見的是該超臨界處理設備 76包含典型用於超臨界流體處理系統之裝設閥門、控制 電子工學、過濾器、實用之連結器。 仍參考圖3 ，一在其上具有殘渣之晶圓（未示出）於操 作中係插入該處理室33 6之晶圓孔腔312，且密封該處理 室336。藉著具有來自該二氧化碳供給容器332之二氧化 碳之二氧化碳泵浦334加壓該處理室33 6，且藉著該二氧 化碳加熱器34*8加熱該二氧化碳，而藉著該處理室加熱器 350加熱該處理室336，以確保該處理室336中之二氧化 碳溫度高於一臨界溫度。該二氧化碳之臨界溫度係攝氏 31度。於一超臨界鈍化步驟期間，該處理室336中之二 氧化碳溫度最好是在由攝氏25度至約攝氏200度之範圍 內，且最好是在或接近攝氏70度。 當達到最初之超臨界狀態時，該第一噴射泵浦35 9由 該化學品供給容器338泵吸諸如甲矽烷基化劑之化學成分 經由該循環管線352進入該處理室336，而該二氧化碳泵 浦進一步加壓該超臨界二氧化碳。在開始將處理化學成分 加至該處理室3 3 6時，該處理室3 3 6中之壓力較好係於大 約每平方英吋700至9，000磅之範圍中，且最好是在或接 近每平方英吋3000磅。一旦想要之化學成分數量已泵吸 進入該處理室33 6，且達到想要之超臨界狀態，該二氧化 (12) (12)200308051 碳泵浦334停止加壓該處理室33 6，該第一噴射泵浦359 停止泵吸處理化學成分進入該處理室336，及該循環泵浦 3 40開始循環超臨界二氧化碳及一淸潔溶液。最後，該循 環泵浦340開始循環包含該超臨界二氧化碳及該處理化學 成分之超臨界淸潔溶液。在此點，該處理室3 3 6內之壓力 係大約每平方英吋3000磅。藉著循環該超臨界淸潔溶液 及該超臨界處理溶液，在該晶圓之表面迅速地補充該超臨 界溶劑及溶液，藉此增強該晶圓上一低k値電介質材料層 表面之鈍化及淸潔速率。 當一具有低k値電介質材料層之晶圓（未示出）晶圓係 正在該壓力室336內處理時，使用一機械式卡盤、真空卡 盤或其他合適之固持或固定機構固定該晶圓。按照本發明 之具體實施例，該晶圓係於超臨界處理步驟期間在該處理 室3 3 6內固定不動，或另一選擇係旋轉、迴轉或以別的方 式搖動。 在該超臨界處理溶液係循環經過循環管線3 5 2及該處 理室336之後，該處理室336係藉著排出一些超臨界處理 溶液至該廢氣收集容器344而局部減壓，以便使該處理室 3 3 6中之狀態回復至接近最初之超臨界狀態。在該超臨界 處理溶液係完全排出該處理室336至該廢氣進入收集容器 3 44之前，該處理室33 6最好循環經過至少一此減壓及壓 縮循環。在使該壓力室33 6排出之後，施行第二超臨界處 理或由該處理室33 6移除該晶圓，且於第二處理設備或組 件（未示出）中繼續該晶圓處理。 (13) (13)200308051 圖4係一簡述使用超臨界淸潔及鈍化溶液處理基板結 構之步驟方塊圖4 〇 〇，該基板結構包含一已圖案化之低k 値電介質材料層及在其上面之蝕刻後或灰化後殘渣。於該 步驟4〇2中，包含該蝕刻後殘渣之基板結構係放置及密封 在一處理室內。在該基板結構係於該步驟4 0 2中放入及密 封在處理室內之後，該處理室係於該步驟4〇4中以超臨界 C〇2加壓’且處理化學成分係加至該超臨界c〇2以產生一 超臨界淸潔及鈍化溶液。該淸潔及鈍化化學成分最好包含 至少一有機矽化合物。 於該步驟404中產生該超臨界淸潔及鈍化溶液之後， 該基板結構在移除該殘渣之後於該步驟406中維持在該超 臨界處理溶液內達一段足以由已暴露之基板結構及鈍化表 面移除至少一部份殘渣之時期。於該步驟4 0 6期間，該超 臨界淸潔及鈍化溶液最好係循環經過該處理室及/或以別 的方式攪動，以在該基板結構之表面上方移動該超臨界淸 潔溶液。亦可在鈍化之後、在鈍化之前或於鈍化期間施行 該淸潔步驟。 仍參考圖4，在該步驟406中由該基板結構移除至少 一部份殘渣之後，於該步驟408中發生一超臨界淸潔溶液 處理步驟，其中一超臨界淸潔溶液最好係循環經過該處理 室及/或以別的方式攪動，以在該基板結構之表面上方移 動該超臨界溶劑。在該超臨界淸潔溶液處理步驟408之後 ，該處理室係在該步驟 410中局部排出。包含步驟 404,406及408之淸潔處理係重複任意次數，如藉著連接 (14) (14)200308051 該步驟4 1 0至404之箭頭所示，如由基板結構移除殘渣及 鈍化已暴露之表面所需者。按照本發明之具體實施例，包 含步驟4〇4,406及408之處理使用新鮮之超臨界二氧化碳 、新鮮之化學成分或兩者。另一選擇係藉著用超臨界二氧 化碳稀釋該處理室、藉著加入淸潔化學成分之額外電荷或 其組合以修改該淸潔化學成分之濃度。 仍參考圖4，在完成該處理步驟之後，於該步驟412 中，該基板結構最好係以一超臨界洗滌溶液處理。該超臨 界洗滌溶液最好包含超臨界C02及一或多個有機溶劑，但 可爲純超臨界C02。 仍參考圖4，在該基板結構於該步驟404,406,408及 4 1 〇中淸潔及於該步驟4 1 2中洗滌之後，該處理室係於該 步驟4 1 4中減壓及該基板結構係由該處理室移去。另一選 擇爲該基板結構係循環經過包含步驟404,406,408,410及 4 1 2之一或多個額外之淸潔/洗滌處理，如由連接步驟 412及404之箭頭所示。另一選擇、或除了使該基板結構 循環經過一或多個額外之淸潔/洗滌循環外，於步驟4 1 4 中由該室移除該基板結構之前，以數個洗滌循環處理該基 板結構，如由連接步驟4 1 2及4 1 0之箭頭所示。 如先前所述，於鈍化其上面之低k値電介質材料層之 前可藉著使用一超臨界溶液乾燥及/或預處理該基板結構 ，該溶液包括超臨界二氧化碳及一或多種溶劑，諸如甲醇 、乙醇、及/或其組合物。亦如先前所論及’以包括有或 無共溶劑之超臨界二氧化碳之超臨界溶液預處理該低k値 -18- (15) (15)200308051 電介質材料層明顯改善該低k値電介質材料層表面上之甲 矽烷基團之作用範圍。熟諳此技藝者亦將淸楚的是可用任 意數目之淸潔及鈍化步驟及/或順序處理一包括蝕刻後殘 渣及/或已圖案化之低k値電介質材料層之晶圓。. 熟諳此技藝者應了解雖然在此已主要參考鈾刻後處理 及/或蝕刻後淸潔處理敘述鈍化低k値電介質材料之方法 ’本發明之方法可用於直接鈍化低k値電介質材料。再者 ，按照本發明之方法，應了解當處理一低k値電介質材料 時，未必需要一超臨界洗滌步驟，且以一超臨界鈍化溶液 處理該低k値電介質材料之前僅只乾燥該低k値電介質材 料可適合某些應用。 【圖式簡單說明】 圖1A及1B按照本發明說明一在使用該超臨界溶液 、隨後藉著一淸潔溶液處理步驟移除蝕刻後殘渣之前後之 低k値電介質材料之簡化槪要圖，該溶液包括超臨界二氧 化碳及矽基鈍化劑（亦即鈍化處理步驟）。 圖2按照本發明之具體實施例說明一超臨界晶圓處理 設備之簡化槪要圖。 圖3 fe：照本發明之具體貫施例說明一超臨界晶圓處理 設備之詳細槪要圖。 圖4按照本發明之具體實施例說明一槪要方塊圖，其 簡述用以處理氧化矽基低k値電介質材料層之步驟。 -19- (16) 200308051 主要元件對照表 7 6超臨界處理設備 I 〇 〇電介質材料 II 〇抗蝕劑 120聚合物殘渣 1 3 0電介質材料結構 200超臨界處理設備 2 0 1 處理室The dielectric materials used in the generation of the insulation interconnection part are integrated into a layer P to be classified into: (2) (2) the inorganic matrix of 200308051), and organic materials. This shift to the use of low-k thorium dielectric materials requires the removal of photoresist uranium etchants to meet the more stringent requirements for cleaning and residue removal without increasing costs and impacting production. By using a low-k 値 dielectric material that insulates the connection, smaller geometric connection structures can be created, resulting in faster integrated circuits. Porous low-k 値 dielectric materials are a special class of these low-k 値 dielectric materials. When a straight line and a via hole are etched in the porous low-k 値 dielectric material, silanol functional groups tend to form on the surface inside the straight line and the via hole. The silanol functional group also tends to form in the voids of the porous low-k 値 dielectric material adjoining the straight line and the through hole. In the case of low-k dielectric inorganic and mixed materials, the cleanliness of these materials presents a challenge. The traditional cleanliness formula is designed to remove age-stable residues through the dissolution of the residues or through the dielectric. Minor | Insect carved to release residue. However, with a low-k thorium dielectric material, the increased surface area due to its porosity greatly increases its sensitivity to these scouring formulas and reduces the selectivity of the formula for uranium-etched residues. Traditional plasma washing methods such as ashing also have unacceptable disadvantages because the ashing plasma tends to affect the organic content of the mixed material, thereby increasing the dielectric constant. Two basic systems are currently used: wet and dry. Dry systems are typically used for stripping, and wet systems are often used for cleaning. Wet systems use acids, bases, or solvents and require several processing steps for residue removal. When processing organic photoresist materials, dry systems are the better choice. Even when using a dry stripping system, the wet processing system after stripping still requires -6- (3) (3) 200308051 'to remove the inorganic residue left by the dry system. In semiconductor manufacturing, a low-k 値 dielectric material layer is patterned in one or more etching and ashing steps using a photoresist mask. After etching or due to their physical nature, these films tend to have a large amount of silanol functionalities on their surface, and due to their porous nature, materials that exhibit a large surface area to a cleaning formula during cleaning. This presents the problem of substantial etching of the low-k 値 dielectric material film with many cleaning formulas, usually to the extent that the low-k 値 dielectric material film is destroyed. In order to remove these silanol functional groups, residues of the etching and photoresist etchant in the line and the through hole, and the bulk photoresist etchant from one of the exposed surfaces of the low-k 値 dielectric material, After the etching, a cleaning process is performed. In this cleaning process, a weak etchant is typically used to remove a single layer of the low-k 値 dielectric material in order to release the etching residue, the photoresist etchant, and the bulk photoresist. I have discovered that this cleaning process has resulted in an unacceptably high etch rate for one of the porous low-k dielectric materials. This is more true when the porous low-k 値 dielectric material is exposed to a weak etchant. Where the silanol functional group is present, we have found that the low-k 蚀刻 dielectric material that significantly exceeds the single layer is removed by the weak etchant. The current high-dose implants have many problems. When used, the resist is densely implanted, hydrogen is expelled from the top third of the resist, and an extreme carbonized layer is produced. The carbonized layer is difficult to remove and does not etch quickly. Furthermore, bulk anti-tidal agents with volatile components still exist. -7- (4) (4) 200308051 Even if the normal stripping is used, there is a pressure increase here, which causes bursting and blistering when cleaning at a slower rate. This not only pollutes the processing chamber, but also makes the carbonized chunks adhere to the exposed areas of the wafer surface. In addition, standard high-temperature oxygen plasmas cannot be used for cleaning of low-k dielectric materials. These high temperature and high oxygen environments oxidize and degrade film integrity and the properties of low-k 低 dielectric materials. What I need is a method for processing porous low-k 値 dielectric materials after etching and before cleaning, which can reduce the presence of silanol functional groups in the porous low-k 値 dielectric materials. The challenge is to ensure that the cleaning method is sufficiently aggressive to adequately clean the surface without etching or altering the low-k material. SUMMARY OF THE INVENTION Microelectronic devices with finer structures and higher aspect ratios today require new low-k 新 materials. There is a need for photoresist stripping techniques to meet the challenges posed by critical aspect ratios and reduced size. Low k 値 dielectric materials are films that require an unprecedented level of cleanliness. The low-k 値 dielectric material is different from the typical features found in a 0.25 micron structure that can etch residues into both the through hole and the straight line into the dielectric layer. In addition, current photoresist etchant causes harder residue. The present invention provides a mechanism for cleaning the through-holes and straight lines on the one hand, and storing a dielectric film on the other hand. The present invention emphasizes the most difficult point in the low-k 値 material that Jie Jie has exposed: peeling. Due to the fact that polymers are used in this low-k 値 organic resist, stripping is a limitation. Jie Jie's anti-uranium agent or residues from low-k Thorium dielectric materials without affecting the low-K Thorium dielectric material are complex. Generally, a hard mask is placed on the low-k 値 dielectric material to function as an etch stop layer. The hard mask can also be used as a CMP stop layer. When the worm was engraved, most of the bulk uranium etchants were removed. However, large amounts of residues and polymers typically remain on the sidewalls of the trenches and vias. The present invention emphasizes the problems associated with the removal of these residues and polymers, but does not etch the low-k 値 dielectric material. Standard 250 ° F oxygen-based plasmas will not work for cleaning of low-k dielectric materials. The high oxygen environment will oxidize and degrade the film integrity and the properties of low-k 値 dielectric materials. The present invention provides chemical cleaning without additional physical cleaning, cleaning each side wall, and still allows for polymer selection. In addition, the present invention emphasizes the disadvantages of current cleaning processes by using lower temperatures during the cleaning process. A preferred embodiment of the present invention is used in conjunction with supercritical carbon dioxide (scco2). In another embodiment of the present invention, a dry chemical ion · loss downstream microwave plasma method is used. In yet another embodiment of the present invention, a wet chemical process is used in conjunction with the present invention to achieve high selectivity and minimal damage to low-k dielectric materials. The present invention eliminates a major obstacle to ensuring that the stripper and residue remover do not attack or degrade the low-k 値 dielectric material. It also minimizes etching that results in loss of thickness or widened openings. Furthermore, the k 値 of the film is maintained or reduced by using the present invention. (6) (6) 200308051 [Embodiment] A material exhibiting a low dielectric constant of 3.5-2.5 is generally referred to as a low-k 値 dielectric material. Porous materials with a dielectric constant of 2.5 or less are generally referred to as ultra-low k 値 (ULK) dielectric materials. For the purpose of this application, low-k 値 dielectric material means both low-k 値 dielectric and ultra-low-k 値 dielectric material. Low-k 値 dielectric materials are generally porous oxide-based materials and may contain an organic or hydrocarbon component. Examples of low-k 値 dielectric materials include, but are not limited to, carbon-doped oxide (COD), spin-on-glass (SOG), and fluorinated silica glass (FSG) materials. These porous low-k 材料 dielectric material films typically contain carbon and hydrogen and are deposited by methods such as spin coating or CVD. These films are treated in a manner that produces damage from the cleaning formula and typically has an inorganic matrix film having a SiOx or SiOx-CxHy group. According to the method of the present invention, a patterned low-k 値 dielectric material layer is formed by depositing a continuous layer of low-k 値 dielectric material, using the lithography lithography to etch a wiring pattern in the low-k 値 dielectric material, And using a supercritical solution including supercritical carbon dioxide and a silicon-based passivating agent (ie, a passivation process step) to remove the etched residue, and subsequently formed by a cleaning process step. The invention is used to reduce or eliminate etching by the reaction of the silanol functional group with a supercritical silylating agent, thereby reducing the etching rate of the low-k 値 dielectric material film in the cleaning formula. The method of the present invention preferably passivates a patterned low-k 値 dielectric material layer by capping a silanol functional group on the surface and / or in the body of the low-k 値 dielectric material to produce a -10- ( 7) (7) 200308051 More patterned low-k 値 dielectric material that is more hydrophobic and more resistant to contamination and / or less reactive. After the passivation treatment, the method of the present invention preferably cleans the film with a cleaning solution with minimal etching. According to a specific embodiment of the present invention, 'passivation treatment step is separately performed from a supercritical etching cleaning process' or another option is performed simultaneously with a supercritical etching cleaning process. Furthermore, according to a specific embodiment of the present invention, a cleaning solution treatment step is performed after a passivation treatment step. According to a specific embodiment of the present invention, a supercritical silylating agent comprises supercritical carbon dioxide and a certain amount of a passivating agent, preferably a silylating agent. The silylating agent preferably includes a silyl methane structure (RdURJUROSiNI ^ Rd, where R15R2, R3 should be the same or independently selected from hydrogen, alkyl, aromatic hydroxyl, propyl, phenyl, and / or derivatives thereof). And halogen (chlorine, bromine, fluorine, iodine). In addition to groups independently selected from hydrogen, alkyl, aromatic hydroxyl, propyl, phenyl, and / or derivatives thereof, R4 may be ( SiR1; R2; R3). In another embodiment, the silylating agent comprises a tetravalent organosilicon compound, wherein the silicon atom is a combination of positions 1, 2, 3, and 4 in a pyramid structure. Into four complexing groups. In yet another specific embodiment, the silylating agent includes a silazane structure, which can be described as a two organosilyl group with nitrogen combined to form the hydrocarbon ammonia. The hydrocarbyl ammonia structure. The silylating agent can introduce supercritical carbon dioxide (SCC02), such as N, -dimethylacetamide (DMAC), 7-butyrolactone (BL0), by itself or in a carrier solvent. , DMS0, DMC0, ethylene carbonate (EC), methylpyrrolidone (NMP), dimethylpyridone, propyl carbonate Alkenyl, alcohol, or a combination thereof to produce the supercritical silylating agent. SCC02 is best used as— (8) (8) 200308051 as a carrier fluid for the silylating agent. By using scco2 As the carrier fluid, the formazan carboxylizing agent can be easily and quickly carried throughout the film, ensuring complete and rapid reaction with the entire film. Those skilled in the art will know that there is any kind of formazan The supercritical passivation solution of the combination of the silylating agent and each silylating agent falls within the scope of the present invention. The thermodynamic conditions are variable: the process temperature is between 25 and 200 degrees Celsius, and the Pressures are between 700 and 9,000 pounds per square inch. Although supercritical CO 2 is preferred, liquid co2 can be used in some cases. The silylating agent preferably contains hexamethyldisilazane The other option is that the silylating agent comprises organochlorosilyl chloride. The other option is that the silylating agent comprises a hydrolyzed silane. The typical process time is between 15 seconds and 10 minutes. Figures 1A and 1B show that when using the supercritical solution, A simplified schematic diagram of the low-k dielectric material before and after the etching residue is removed by a cleaning solution treatment step, the solution includes supercritical carbon dioxide and a silicon-based passivation agent (that is, a passivation treatment step). Figure 1A The patterned low-k dielectric material 100 illustrates the patterned low-k dielectric material 100 before the etched residue is removed, and FIG. 1B illustrates the low-k dielectric material 100 after the etched residue is removed. In particular, before the supercritical carbon dioxide cleaning and cleaning solution treatment steps, the resist 110 and the sidewall polymer residue 120 can be seen on the low-k dielectric material W structure 130 in FIG. 1A. 1B illustrates the same low-k 値 dielectric material structure 1 3 0 after highly selective cleaning, which shows no undercuts and residue removal. 200308051 〇) Figure 2 shows a simplified schematic diagram of a supercritical processing equipment 200. The device 200 includes a carbon dioxide gas source 221 connected to an inlet line 226 through a gas source valve 223. The gas source valve can be opened and closed to start and stop the flow of carbon dioxide from the carbon dioxide gas source 221 to the inlet line 226. The inlet line .226 is preferably equipped with one or more return valves, pumps and heaters, which are shown diagrammatically by the box 220, for generating and / or maintaining a flow of supercritical carbon dioxide. The inlet line 226 preferably also has an inlet valve 225 whose frame structure can be opened and closed to allow or prevent the flow of supercritical carbon dioxide into a processing chamber 201. Referring again to FIG. 2, the processing chamber 201 is preferably provided with one or more pressure valves 209 for exhausting the gas from the processing chamber 201 and / or for regulating the pressure in the processing chamber 201. Also according to a specific embodiment of the invention, the processing chamber 201 is coupled to a pump and / or vacuum device 211 for pressurizing and / or evacuating the processing chamber 201. Referring again to FIG. 2, a processing chamber 201 of the apparatus 200 preferably has a chuck 23 3 for holding and / or supporting a wafer structure 2 13. According to another embodiment of the present invention, the chuck 233 and / or the processing chamber 201 has one or more temperature for adjusting the wafer structure 2 1 3 in the processing chamber 20 1 and / or a supercritical processing solution. The temperature of the heater 23 1. The apparatus 200 also preferably has a circulation circuit 203 coupled to the processing chamber 201. The circulation circuit 203 is preferably equipped with one or more valves 215 and 215 'for regulating the flow of the supercritical processing solution through the circulation circuit 203 and the processing chamber 201. The circulation circuit 203 is also preferably equipped with any number of return valves, pumps, and heaters, which are shown in the box (205) (10) (10) 200308051 for maintaining a supercritical processing solution and making the The supercritical processing solution flows through the circulation circuit 203 and through the processing chamber 201. According to a preferred embodiment of the present invention, the circulation loop 203 has a spray port 207 for introducing chemical components such as a passivating agent and a solvent into the circulation loop 203 for generating a supercritical treatment solution in situ. Figure 3 shows a supercritical processing device 76 in more detail than Figure 2 above. The supercritical processing equipment 76 is configured to generate a supercritical cleaning, washing, and curing solution, and to process a wafer therewith. The supercritical processing equipment 76 includes a carbon dioxide supply container 332, a carbon dioxide pump 334, a processing chamber 33 6, a chemical supply container 3 38, a circulation pump 340, and an exhaust gas collection container 344. The carbon dioxide supply container 332 is coupled to the processing chamber 336 via the carbon dioxide pump 334 and a carbon dioxide pipe 346. The carbon dioxide pipe 346 includes a carbon dioxide heater 348 located between the carbon dioxide Yuura 334 and the processing chamber 336. The processing chamber 336 includes a processing chamber heater 350. The circulation pump 340 is located on a circulation line 3 52, which is coupled to the processing chamber 3 3 6 with a circulation inlet 3 5 4 and a circulation outlet 3 5 6. The chemical supply container 3 3 8 is coupled to the circulation line 3 5 2 via a chemical supply line 35 8 including a first jet pump 35 9. A detergent supply container 36 is coupled to the circulation line 3 52 via a washing supply line 3 6 2 including a second spray pump 3 6 3. The exhaust gas collection container 344 is coupled to the processing chamber 336 through an exhaust gas pipe 364. The carbon dioxide supply container 332, the carbon dioxide pump 334, and the carbon dioxide heater 348 form a carbon dioxide supply configuration 349. The chemical (11) (11) 200308051 school supply container 338, the first spray pump 35 9, the detergent supply container 3 60, and the second spray pump 3 6 3 form a chemical and detergent supply configuration 3 65 . It will be apparent to those skilled in the art that the supercritical processing equipment 76 contains valve, control electronics, filters, and practical connectors typically used in supercritical fluid processing systems. Still referring to FIG. 3, a wafer (not shown) having residue thereon is inserted into the wafer cavity 312 of the processing chamber 336 during operation, and the processing chamber 336 is sealed. The processing chamber 336 is pressurized by a carbon dioxide pump 334 having carbon dioxide from the carbon dioxide supply container 332, and the carbon dioxide is heated by the carbon dioxide heater 34 * 8, and the processing is heated by the processing chamber heater 350 Chamber 336 to ensure that the carbon dioxide temperature in the processing chamber 336 is above a critical temperature. The critical temperature of this carbon dioxide is 31 degrees Celsius. During a supercritical passivation step, the carbon dioxide temperature in the processing chamber 336 is preferably in a range from 25 ° C to about 200 ° C, and is preferably at or near 70 ° C. When the initial supercritical state is reached, the first jet pump 359 pumps chemical components such as a silylating agent from the chemical supply container 338 into the processing chamber 336 via the circulation line 352, and the carbon dioxide pump Pu further pressurizes the supercritical carbon dioxide. When processing chemical components are initially added to the processing chamber 3 3 6, the pressure in the processing chamber 3 3 6 is preferably in the range of about 700 to 9,000 pounds per square inch, and is preferably at or Nearly 3,000 pounds per square inch. Once the desired amount of chemical composition has been pumped into the processing chamber 33 6 and reaches the desired supercritical state, the dioxide (12) (12) 200308051 carbon pump 334 stops pressurizing the processing chamber 33 6. The The first jet pump 359 stops pumping processing chemical components into the processing chamber 336, and the circulation pump 3 40 begins to circulate supercritical carbon dioxide and a cleaning solution. Finally, the cyclic pump 340 begins to circulate a supercritical cleaning solution containing the supercritical carbon dioxide and the processing chemicals. At this point, the pressure in the processing chamber 3 3 6 is about 3000 pounds per square inch. By circulating the supercritical cleaning solution and the supercritical processing solution, the supercritical solvent and solution are quickly replenished on the surface of the wafer, thereby enhancing the passivation and surface of a low-k 値 dielectric material layer on the wafer. Purge rate. When a wafer (not shown) with a low-k 値 dielectric material layer is being processed in the pressure chamber 336, a mechanical chuck, vacuum chuck, or other suitable holding or fixing mechanism is used to fix the crystal. circle. According to a specific embodiment of the present invention, the wafer is fixed in the processing chamber 3 3 6 during the supercritical processing step, or another option is to rotate, revolve or otherwise shake. After the supercritical processing solution is circulated through the circulation line 3 5 2 and the processing chamber 336, the processing chamber 336 is partially decompressed by discharging some supercritical processing solution to the exhaust gas collection container 344 to make the processing chamber The state in 3 3 6 returns to near the initial supercritical state. Before the supercritical processing solution is completely discharged from the processing chamber 336 until the exhaust gas enters the collection container 3 44, the processing chamber 33 6 is preferably circulated through at least one of the decompression and compression cycles. After the pressure chamber 336 is discharged, a second supercritical process is performed or the wafer is removed by the processing chamber 336, and the wafer processing is continued in a second processing equipment or component (not shown). (13) (13) 200308051 Figure 4 is a block diagram of the process of using a supercritical cleaning and passivation solution to treat a substrate structure. The substrate structure includes a patterned layer of low-k dielectric material and Residue after etching or ashing above. In the step 402, the substrate structure including the etched residue is placed and sealed in a processing chamber. After the substrate structure is placed and sealed in the processing chamber in step 402, the processing chamber is pressurized with supercritical CO2 in step 404 and the processing chemical composition is added to the Critical co2 to produce a supercritical cleaning and passivation solution. The cleaning and passivation chemical composition preferably contains at least one organosilicon compound. After the supercritical cleaning and passivation solution is generated in step 404, the substrate structure is maintained in the supercritical processing solution in step 406 for a period sufficient to cover the exposed substrate structure and passivation surface after removing the residue Period when at least a part of the residue is removed. During the step 406, the supercritical cleaning and passivation solution is preferably circulated through the processing chamber and / or otherwise agitated to move the supercritical cleaning solution over the surface of the substrate structure. This cleaning step may also be performed after passivation, before passivation, or during passivation. Still referring to FIG. 4, after removing at least a part of the residue from the substrate structure in step 406, a supercritical cleaning solution treatment step occurs in step 408, and a supercritical cleaning solution is preferably circulated through The processing chamber and / or is otherwise agitated to move the supercritical solvent above the surface of the substrate structure. After the supercritical cleaning solution processing step 408, the processing chamber is partially discharged in step 410. The cleaning process including steps 404, 406, and 408 is repeated any number of times, as shown by the arrow of step 4 1 0 to 404 by connecting (14) (14) 200308051, such as removing residue from the substrate structure and passivating the exposed surface. Those who need it. According to a specific embodiment of the present invention, the treatment including steps 40, 406, and 408 uses fresh supercritical carbon dioxide, fresh chemical ingredients, or both. Another option is to modify the concentration of the cleaning chemical composition by diluting the processing chamber with supercritical carbon dioxide, by adding an additional charge to the cleaning chemical composition, or a combination thereof. Still referring to FIG. 4, after the processing step is completed, in step 412, the substrate structure is preferably treated with a supercritical cleaning solution. The supercritical washing solution preferably contains supercritical CO2 and one or more organic solvents, but may be pure supercritical CO2. Still referring to FIG. 4, after the substrate structure is cleaned in steps 404, 406, 408, and 4 1 0 and washed in step 4 12, the processing chamber is decompressed in step 4 1 4 and the substrate structure is formed by The processing chamber was removed. Alternatively, the substrate structure is cycled through one or more additional cleaning / washing processes including steps 404, 406, 408, 410, and 4 1 2 as shown by the arrows connecting steps 412 and 404. Alternatively, or in addition to cycling the substrate structure through one or more additional cleaning / washing cycles, before removing the substrate structure from the chamber in step 4 1 4, process the substrate structure in several washing cycles. As shown by the arrows connecting steps 4 12 and 4 10. As previously mentioned, the substrate structure may be dried and / or pretreated by using a supercritical solution before passivating the low-k 値 dielectric material layer thereon, the solution including supercritical carbon dioxide and one or more solvents such as methanol, Ethanol, and / or a composition thereof. Also as previously discussed 'pre-treating the low-k 値 -18- (15) (15) 200308051 dielectric material layer with a supercritical solution of supercritical carbon dioxide with or without co-solvent significantly improves the surface of the low-k 値 dielectric material layer The scope of the above silyl group. Those skilled in the art will also recognize that a wafer can be processed with any number of cleaning and passivation steps and / or sequences including post-etch residues and / or patterned low-k dielectric material layers. Those skilled in the art should understand that although the method of passivating low-k 値 dielectric materials has been described mainly with reference to uranium post-etching and / or post-etching cleaning processes ′ the method of the present invention can be used to directly passivate low-k 値 dielectric materials. Furthermore, according to the method of the present invention, it should be understood that when processing a low-k 値 dielectric material, a supercritical washing step is not necessarily required, and only the low-k 値 dielectric material is dried before treating the low-k 値 dielectric material with a supercritical passivation solution. Dielectric materials may be suitable for certain applications. [Schematic description] Figures 1A and 1B illustrate a simplified schematic diagram of low-k dielectric materials before and after the use of the supercritical solution and subsequent removal of the etching residue by a cleaning solution treatment step according to the present invention. The solution includes supercritical carbon dioxide and a silicon-based passivator (ie, a passivation process step). FIG. 2 is a simplified schematic diagram illustrating a supercritical wafer processing apparatus according to an embodiment of the present invention. FIG. 3 fe: Detailed schematic diagram illustrating a supercritical wafer processing apparatus according to a specific embodiment of the present invention. Fig. 4 illustrates a block diagram according to a specific embodiment of the present invention, which briefly describes the steps for processing a silicon oxide-based low-k dielectric material layer. -19- (16) 200308051 Comparison table of main components 7 6 Supercritical processing equipment I 〇 〇 Dielectric material II 〇 Resist 120 Polymer residue 1 3 0 Dielectric material structure 200 Supercritical processing equipment 2 0 1 Processing chamber

203循環迴路 205箱子 2 0 7 噴射通口 209 壓力閥 211真空裝置 2 1 3晶圓結構 2 1 5 閥門 2 1 5 ’閥門203 circulation circuit 205 box 2 0 7 injection port 209 pressure valve 211 vacuum device 2 1 3 wafer structure 2 1 5 valve 2 1 5 ’valve

220箱子 221二氧化碳氣源 2 23氣源閥 225 入口閥 226入口管線 231加熱器 233卡盤 3 1 2晶圓孔腔 -20- (17) 200308051 332 334 336 338 340 344 346 348 349 350 352 354 356 358 359 360 362 363 364 365 二氧化碳供給容器 二氧化碳泵浦 處理室 化學品供給容器 循環泵浦 廢氣收集容器 二氧化碳管道 二氧化碳泵浦 二氧化碳供給配置 處理室加熱器 循環管線 循環入口 循環出口 化學供給管線 噴射泵 洗滌劑供給容器 洗滌供給管線 噴射泵 廢氣管道 洗滌劑供給配置 400 方塊圖220 box 221 carbon dioxide gas source 2 23 gas source valve 225 inlet valve 226 inlet line 231 heater 233 chuck 3 1 2 wafer cavity -20- (17) 200308051 332 334 336 338 340 344 346 348 349 350 352 354 356 358 359 360 362 363 364 365 carbon dioxide supply container carbon dioxide pump processing chamber chemical supply container circulation pump exhaust gas collection container carbon dioxide pipeline carbon dioxide pump carbon dioxide supply configuration processing chamber heater circulation line circulation inlet circulation outlet chemical supply line jet pump detergent Supply container washing supply line jet pump exhaust pipe detergent supply configuration 400 block diagram

Claims (1)

(1) (1)200308051 拾、申請專利範圍 1 · 一種處理低k値電介質材料表面之方法，其包含 a ·用超臨界甲矽烷基化劑來處理該低k値電介質村_ 表面，以形成一鈍化之低k値電介質材料表面； b ·在用超臨界甲矽烷基化劑處理該低k値電介質材米斗 表面之後，移除該超臨界甲矽烷基化劑； c·用超臨界溶劑來處理該經鈍化之低k値電介質材_ 表面；及 % d ·在用超臨界溶劑處理該經鈍化之低k値電介質材％ 表面之後，移除該超臨界溶劑，其中，該經鈍化之低k fg 電介質材料表面係至少用該超臨界甲矽烷基化劑及該超臨 ^ 界溶劑來予以局部鈍化。 2 ·如申請專利範圍第1項之方法，其中，該超臨界 甲矽烷基化劑包括超臨界二氧化碳及某一數量之包含有機 基團之甲矽烷基化劑。 3 .如申請專利範圍第2項之方法，其中，該有機基 ® 團包含5個碳原子或更少。 4 .如申請專利範圍第1項之方法，其中，該超臨界 溶劑包含超臨界二氧化碳及酸類與氟化物之混合物。 5 .如申請專利範圍第4項之方法，其中，該酸類包 含有機酸類。 6 .如申請專利範圍第4項之方法，其中，該酸類包 含無機酸類。 -22- (2) (2)200308051 7 .如申請專利範圍第1項之方法’其中’該超臨界 甲矽烷基化劑係具有結構之石夕甲院 〇 8 ·如申請專利範圍第1項之方法，其中，該超臨界 甲矽烷基化劑另包含一載體溶劑。 9 .如申請專利範圍第5項之方法，其中，該載體溶 劑係選自由N，N -二甲基乙醯胺（DMAC)、r-丁內酯（BL0) 、二甲亞楓（DM SO)、碳酸乙烯酯（EC)、N-甲基吡咯烷酮 (NMP)、二甲基Dtt啶酮、碳酸丙烯酯及酒精所組成之族群 〇 1 0 ·如申請專利範圍第1項之方法，其中，該低k値 電介質材料之表面係維持在攝氏2 5至2 0 0度範圍之間。 1 1 ·如申請專利範圍第1項之方法，其中，用超臨界 甲砂院基化劑來處理該低k値電介質材料表面包含使該超 臨界甲矽烷基化劑循環於該低k値電介質材料表面上方。 1 2 ·如申請專利範圍第1項之方法，其中，用超臨界 裕劑來處理該低k値電介質材料表面包含使該超臨界溶劑 循環於該低k値電介質材料表面上方。 1 3 .如申請專利範圍帛丄項之方自，其+，該超臨界 甲砂院基化劑係維持在每平方英至9，_榜之壓力 範圍中。 1 4 .如申請專利範圍第1 ^ 圍弟1項之方法，另包含於用超臨 界溶液來處理該低k値電介暂^ 丨匕电力W材料表面之前乾燥該低k値 電介質材料表面。 - 23- (3) (3)200308051 1 5 ·如申請專利範圍第].〇項之方法，其中，乾燥該低 k値電介質材料之表面包括用含有超臨界二氧化碳之超臨 界乾燥溶液來處理該低k値電介質材料表面。 1 6.如申請專利範圍第1項之方法，其中，該低k値 電介質材料之表面包括氧化矽。 1 7.如申請專利範圍第1項之方法，其中，該低k値 電介質材料之表面包括一選自由摻雜碳之氧化物（COD)、 旋轉塗佈玻璃（SOG)、及氟化矽玻璃（FSG)所組成族群之材 料。 18.—種處理電介質表面之方法，其包含： a. 用第一超臨界淸潔溶液由該電介質表面來去除蝕刻 後殘渣； b. 用甲矽烷基化劑來處理該電介質表面以形成鈍化之 電介質表面，其中，該甲矽烷基化劑係在第二超臨界淸潔 溶液中；及 c. 用一溶劑來處理該鈍化之電介質表面，其中，該溶 劑係在第三超臨界淸潔溶液中。 1 9 .如申請專利範圍第1 8項之方法，其中，該殘渣包 含一聚合物。 2 0 .如申請專利範圍第1 9項之方法，其中，該聚合物 係一光阻蝕刻劑聚合物。 2 1 ·如申請專利範圍第2 0項之方法，其中，該光阻鈾 刻劑聚合物包含一抗反射染料。 22.如申請專利範圍第1 8項之方法，其中，該電介質 -24- (4) (4)200308051 表面包含氧化砂。 23 .如申請專利範圍第1 8項之方法，其中，該電介質 表面包含低k値電介質材料。 24.如申請專利範圍第18項之方法，其中，該電介質 表面包括一選自由摻雜碳之氧北物（COD)、旋轉塗佈玻璃 (SOG)、及氟化矽玻璃（FSG)所組成族群之材料。 25 .如申請專利範圍第1 8項之方法，其中，該蝕刻後 殘渣包含一抗反射塗層。 2 6 ·如申請專利範圍第1 8項之方法，其中，該甲矽烷 基化劑包含一有機矽化合物。 2 7 .如申請專利範圍第1 8項之方法，其中，該溶劑包 含超臨界二氧化碳及酸類與氟化物之混合物。 2 8.如申請專利範圍第25項之方法，其中，該有機矽 化合物係具有結構（1^);(1^2);(1^3)5丨]^11(114)之矽甲烷。 29.—種形成經圖案化之低k値電介質材料層之方法 ，該方法包括： a .沈積一低k値電介質材料之連續層； b .在低k値電介質材料之連續層上方形成一光阻蝕刻 劑遮罩； c. 經由該光阻蝕刻劑遮罩以使該低k値電介質材料之 連續層圖案化，藉以形成一蝕刻後殘渣； d. 使用包括超臨界二氧化碳及鈍化劑之超臨界溶液來 去除一部份蝕刻後殘渣；及 e. 使用一包括酸及氟化物溶液之超臨界溶劑來去除殘 -25- (5) (5)200308051 留之蝕刻後殘渣。 3 〇.如申請專利範圍第28項之方法，其中，該超臨界 處理溶液包含超臨界二氧化碳。 3 1 ·如申請專利範圍第2 8項之方法，其中，該超臨界 溶劑另包含超臨界二氧化碳。 3 2 ·如申請專利範圍第2 4項之方法，其中，該鈍化劑 係砂基的。 3 3 ·如申請專利範圍第3 1項之方法，其中，該矽基鈍 化劑包含一有機矽化合物。 3 4 · —種形成具有縮減k値之電介質材料層之方法， 該方法包括： a.使該層電介質材料圖案化以形成具有第一 k値之經 圖案化的電介質材料層； b .用一鈍化劑來鈍化該經圖案化之電介質材料層，以 形成具有第二k値之經圖案化的縮減低k値電介質材料層 •，及 c ·用一超臨界淸潔溶劑來處理該經圖案化之縮減低k 値電介質材料層。 35·如申請專利範圍第33項之方法，其中，該第一 k 値係大於3.0。 3 6·如申請專利範圍第33項之方法，其中，該第二k 値係少於3.0。 3 7·如申請專利範圍第33項之方法，其中，該第一 k 値及該第二k値相差達1.0或更多。 -26- (6) (6)200308051 3 8 .如申請專利範圍第3 3項之方法，其中，該電介質 材料包含一氧化矽成份及碳化氫成份。 3 9 .如申請專利範圍第3 3項之方法，其中，該鈍化劑 係一包含有機基團之甲矽烷基化劑。 4 0.如申請專利範圍第33項之方法，其中，該超臨界 淸潔溶劑係一酸與氟化物溶液。 4 1.如申請專利範圍第33項之方法，其中，該超臨界 淸潔溶劑係一 0.1-15.0 v/v %。(1) (1) 200308051, patent application scope 1 · A method for treating the surface of a low-k 値 dielectric material, which comprises a · treating the low-k 値 dielectric village surface with a supercritical silylating agent to form A passivated low-k 値 dielectric material surface; b. After the surface of the low-k 値 dielectric material is treated with a supercritical silylating agent, the supercritical silylating agent is removed; c. A supercritical solvent is used To treat the passivated low-k 値 dielectric material surface; and% d. After treating the passivated low-k 値 dielectric material% surface with a supercritical solvent, remove the supercritical solvent, wherein the passivated The surface of the low-k fg dielectric material is at least partially passivated with the supercritical silylating agent and the supercritical solvent. 2. The method of claim 1 in the scope of patent application, wherein the supercritical silylating agent includes supercritical carbon dioxide and a certain amount of silylating agent containing an organic group. 3. The method according to item 2 of the patent application, wherein the organic group ® contains 5 carbon atoms or less. 4. The method of claim 1, wherein the supercritical solvent comprises supercritical carbon dioxide and a mixture of acids and fluorides. 5. The method according to item 4 of the patent application, wherein the acid package contains organic acids. 6. The method of claim 4 in the scope of patent application, wherein the acids include inorganic acids. -22- (2) (2) 200308051 7. If the method of applying for the scope of the first item of the patent is 'wherein', the supercritical silylating agent is a structure of Shi Xijia Academy 08. · If the scope of the first of the patent is applied The method, wherein the supercritical silylating agent further comprises a carrier solvent. 9. The method according to item 5 of the scope of patent application, wherein the carrier solvent is selected from the group consisting of N, N-dimethylacetamide (DMAC), r-butyrolactone (BL0), and dimethylsulfoxide (DM SO ), A group consisting of ethylene carbonate (EC), N-methylpyrrolidone (NMP), dimethyl Dttimidinone, propylene carbonate, and alcohol. 0 1 0 As in the method of claim 1 in the scope of patent application, The surface of the low k 値 dielectric material is maintained in the range of 25 to 200 degrees Celsius. 1 1. The method of claim 1, wherein treating the surface of the low-k 値 dielectric material with a supercritical methacrylate compound includes recycling the supercritical silylating agent to the low-k 値 dielectric. Above the material surface. 1 2. The method of claim 1, wherein treating the surface of the low-k 値 dielectric material with a supercritical margin includes circulating the supercritical solvent over the surface of the low-k 値 dielectric material. 1 3. If the party applying for the scope of the patent claims the item, its +, the supercritical formazan institute base agent is maintained in the pressure range from 9 to 9 per square. 14. The method of item 1 ^ Sie 1 of the scope of patent application, further comprising drying the surface of the low-k 値 dielectric material before treating the surface of the low-k 値 dielectric material with a supercritical solution. -23- (3) (3) 200308051 1 5 · The method according to the scope of patent application]. 0, wherein drying the surface of the low-k 値 dielectric material includes treating the surface with a supercritical dry solution containing supercritical carbon dioxide Low k 値 dielectric material surface. 16. The method according to item 1 of the patent application, wherein the surface of the low-k 値 dielectric material includes silicon oxide. 1 7. The method according to item 1 of the patent application scope, wherein the surface of the low-k 値 dielectric material comprises a member selected from the group consisting of carbon-doped oxide (COD), spin-on-glass (SOG), and fluorinated silicon glass (FSG) the material of the group. 18. A method of treating a dielectric surface, comprising: a. Removing a post-etch residue from the dielectric surface with a first supercritical cleaning solution; b. Treating the dielectric surface with a silylating agent to form a passivated A dielectric surface, wherein the silylating agent is in a second supercritical cleaning solution; and c. Treating the passivated dielectric surface with a solvent, wherein the solvent is in a third supercritical cleaning solution . 19. The method of claim 18 in the scope of patent application, wherein the residue comprises a polymer. 20. The method according to item 19 of the application, wherein the polymer is a photoresist polymer. 2 1. The method of claim 20, wherein the photoresist uranium polymer contains an anti-reflective dye. 22. The method of claim 18, wherein the surface of the dielectric -24- (4) (4) 200308051 includes oxidized sand. 23. The method of claim 18, wherein the dielectric surface comprises a low-k 値 dielectric material. 24. The method of claim 18, wherein the dielectric surface comprises a member selected from the group consisting of carbon-doped oxygen compounds (COD), spin-on-glass (SOG), and fluorinated silicon glass (FSG). Ethnic material. 25. The method of claim 18, wherein the etched residue comprises an anti-reflective coating. 26. The method of claim 18, wherein the silylating agent comprises an organosilicon compound. 27. The method of claim 18, wherein the solvent contains supercritical carbon dioxide and a mixture of acids and fluorides. 2 8. The method of claim 25 in the scope of patent application, wherein the organosilicon compound is a silicic acid methane having the structure (1 ^); (1 ^ 2); (1 ^ 3) 5 丨] ^ 11 (114). 29. A method of forming a patterned low-k 値 dielectric material layer, the method comprising: a. Depositing a continuous layer of low-k 値 dielectric material; b. Forming a light over the continuous layer of low-k 値 dielectric material Etchant mask; c. Patterning a continuous layer of the low-k 値 dielectric material through the photoresist mask to form an etched residue; d. Use supercritical including supercritical carbon dioxide and passivating agent Solution to remove a portion of the post-etching residue; and e. Using a supercritical solvent including an acid and fluoride solution to remove the remaining -25- (5) (5) 200308051 remaining post-etching residue. 30. The method of claim 28, wherein the supercritical treatment solution comprises supercritical carbon dioxide. 31. The method of claim 28, wherein the supercritical solvent further comprises supercritical carbon dioxide. 3 2 · The method according to item 24 of the patent application scope, wherein the passivation agent is sand-based. 33. The method of claim 31, wherein the silicon-based passivating agent comprises an organic silicon compound. 3 4 · A method of forming a dielectric material layer having a reduced k 値, the method comprising: a. Patterning the layer of dielectric material to form a patterned dielectric material layer having a first k 値; b. Using a A passivating agent to passivate the patterned dielectric material layer to form a patterned reduced k 値 dielectric material layer having a second k 値, and c. Treat the patterned with a supercritical cleaning solvent The reduction reduces the k 値 dielectric material layer. 35. The method of claim 33, wherein the first k 値 is greater than 3.0. 36. The method of claim 33, wherein the second k is less than 3.0. 37. The method of claim 33, wherein the difference between the first k 値 and the second k 达 is 1.0 or more. -26- (6) (6) 200308051 3 8. The method according to item 33 of the scope of patent application, wherein the dielectric material includes a silicon oxide component and a hydrocarbon component. 39. The method of claim 33, wherein the passivation agent is a silylating agent containing an organic group. 40. The method of claim 33, wherein the supercritical cleaning solvent is a solution of an acid and a fluoride. 4 1. The method according to item 33 of the patent application scope, wherein the supercritical cleaning solvent is 0.1-15.0 v / v%. -27--27-
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