EP1364391A1 - Verfahren zur entfernung einer maskenschicht von einem halbleitersubstrat - Google Patents
Verfahren zur entfernung einer maskenschicht von einem halbleitersubstratInfo
- Publication number
- EP1364391A1 EP1364391A1 EP02714071A EP02714071A EP1364391A1 EP 1364391 A1 EP1364391 A1 EP 1364391A1 EP 02714071 A EP02714071 A EP 02714071A EP 02714071 A EP02714071 A EP 02714071A EP 1364391 A1 EP1364391 A1 EP 1364391A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- trench
- nitride
- titanium
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
- H10P95/06—Planarisation of inorganic insulating materials
- H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/092—Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P52/40—Chemomechanical polishing [CMP]
- H10P52/402—Chemomechanical polishing [CMP] of semiconductor materials
Definitions
- FIG. 2 shows the layer stack from FIG. 1, a hard mask having been structured
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
Claims
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10109328A DE10109328A1 (de) | 2001-02-27 | 2001-02-27 | Verfahren zur Entfernung einer Maskenschicht von einem Halbleitersubstrat |
| DE10109328 | 2001-02-27 | ||
| PCT/DE2002/000706 WO2002069378A1 (de) | 2001-02-27 | 2002-02-26 | Verfahren zur entfernung einer maskenschicht von einem halbleitersubstrat |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1364391A1 true EP1364391A1 (de) | 2003-11-26 |
Family
ID=7675600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP02714071A Withdrawn EP1364391A1 (de) | 2001-02-27 | 2002-02-26 | Verfahren zur entfernung einer maskenschicht von einem halbleitersubstrat |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7129173B2 (de) |
| EP (1) | EP1364391A1 (de) |
| JP (1) | JP3955529B2 (de) |
| KR (1) | KR100565107B1 (de) |
| DE (1) | DE10109328A1 (de) |
| TW (1) | TW526542B (de) |
| WO (1) | WO2002069378A1 (de) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10118422B4 (de) * | 2001-04-12 | 2007-07-12 | Infineon Technologies Ag | Verfahren zur Herstellung einer strukturierten metallhaltigen Schicht auf einem Halbleiterwafer |
| DE102004040798A1 (de) * | 2004-08-23 | 2006-03-09 | Infineon Technologies Ag | Herstellungsverfahren für eine Hartmaske auf einer Halbleiterstruktur |
| US20090098734A1 (en) * | 2007-10-16 | 2009-04-16 | United Microelectronics Corp. | Method of forming shallow trench isolation structure and method of polishing semiconductor structure |
| US20090303779A1 (en) * | 2008-06-05 | 2009-12-10 | Young-Shying Chen | Spin Torque Transfer MTJ Devices with High Thermal Stability and Low Write Currents |
| US20150147839A1 (en) * | 2013-11-26 | 2015-05-28 | Infineon Technologies Dresden Gmbh | Method for manufacturing a semiconductor device |
| CN109216541B (zh) * | 2017-06-30 | 2022-05-17 | 中电海康集团有限公司 | Mram与其的制作方法 |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0786393A (ja) | 1993-09-17 | 1995-03-31 | Toshiba Corp | 半導体素子の素子分離方法 |
| US5489548A (en) * | 1994-08-01 | 1996-02-06 | Texas Instruments Incorporated | Method of forming high-dielectric-constant material electrodes comprising sidewall spacers |
| KR100336598B1 (ko) * | 1996-02-07 | 2002-05-16 | 이사오 우치가사키 | 산화 세륨 연마제 제조용 산화 세륨 입자 |
| US5858870A (en) * | 1996-12-16 | 1999-01-12 | Chartered Semiconductor Manufacturing, Ltd. | Methods for gap fill and planarization of intermetal dielectrics |
| DE19733391C2 (de) * | 1997-08-01 | 2001-08-16 | Siemens Ag | Strukturierungsverfahren |
| TW392324B (en) * | 1998-01-23 | 2000-06-01 | United Microelectronics Corp | Dual damascene process |
| US5922515A (en) * | 1998-02-27 | 1999-07-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Approaches to integrate the deep contact module |
| US6099699A (en) * | 1998-04-22 | 2000-08-08 | Matsushita-Kotobuki Electronics Industries, Ltd. | Thin encapsulation process for making thin film read/write heads |
| TW389988B (en) * | 1998-05-22 | 2000-05-11 | United Microelectronics Corp | Method for forming metal interconnect in dielectric layer with low dielectric constant |
| US6225237B1 (en) * | 1998-09-01 | 2001-05-01 | Micron Technology, Inc. | Method for forming metal-containing films using metal complexes with chelating O- and/or N-donor ligands |
| JP2000133633A (ja) * | 1998-09-09 | 2000-05-12 | Texas Instr Inc <Ti> | ハ―ドマスクおよびプラズマ活性化エッチャントを使用した材料のエッチング方法 |
| US6165695A (en) * | 1998-12-01 | 2000-12-26 | Advanced Micro Devices, Inc. | Thin resist with amorphous silicon hard mask for via etch application |
| JP3259704B2 (ja) * | 1998-12-30 | 2002-02-25 | 日本電気株式会社 | 半導体装置の製造方法 |
| US6261923B1 (en) * | 1999-01-04 | 2001-07-17 | Vanguard International Semiconductor Corporation | Method to solve the dishing issue in CMP planarization by using a nitride hard mask for local inverse etchback and CMP |
| DE19926501A1 (de) * | 1999-06-10 | 2000-12-21 | Siemens Ag | Verfahren zur Herstellung eines Halbleiterspeicherbauelements |
| DE19929307C1 (de) * | 1999-06-25 | 2000-11-09 | Siemens Ag | Verfahren zur Herstellung einer strukturierten Schicht und dadurch hergestellte Elektrode |
| US6544885B1 (en) * | 2000-05-08 | 2003-04-08 | Advanced Micro Devices, Inc. | Polished hard mask process for conductor layer patterning |
| US6348395B1 (en) * | 2000-06-07 | 2002-02-19 | International Business Machines Corporation | Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow |
-
2001
- 2001-02-27 DE DE10109328A patent/DE10109328A1/de not_active Ceased
-
2002
- 2002-02-26 EP EP02714071A patent/EP1364391A1/de not_active Withdrawn
- 2002-02-26 WO PCT/DE2002/000706 patent/WO2002069378A1/de not_active Ceased
- 2002-02-26 KR KR1020037010963A patent/KR100565107B1/ko not_active Expired - Fee Related
- 2002-02-26 JP JP2002568406A patent/JP3955529B2/ja not_active Expired - Fee Related
- 2002-02-26 TW TW091103408A patent/TW526542B/zh not_active IP Right Cessation
-
2003
- 2003-08-27 US US10/649,411 patent/US7129173B2/en not_active Expired - Fee Related
Non-Patent Citations (1)
| Title |
|---|
| See references of WO02069378A1 * |
Also Published As
| Publication number | Publication date |
|---|---|
| DE10109328A1 (de) | 2002-09-12 |
| KR20030076694A (ko) | 2003-09-26 |
| WO2002069378A1 (de) | 2002-09-06 |
| KR100565107B1 (ko) | 2006-03-30 |
| JP2004519107A (ja) | 2004-06-24 |
| US20040048479A1 (en) | 2004-03-11 |
| JP3955529B2 (ja) | 2007-08-08 |
| TW526542B (en) | 2003-04-01 |
| US7129173B2 (en) | 2006-10-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| 17P | Request for examination filed |
Effective date: 20030826 |
|
| AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR |
|
| RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: SAENGER, ANNETTE Inventor name: ENGELHARDT, MANFRED Inventor name: THIEME, PETER Inventor name: DRUMMER, HEIKE Inventor name: KREUPL, FRANZ Inventor name: SELL, BERNHARD |
|
| 17Q | First examination report despatched |
Effective date: 20090115 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20090526 |