EP1292982A2 - Gate-oxidation für vertikales grabenbauteil - Google Patents

Gate-oxidation für vertikales grabenbauteil

Info

Publication number
EP1292982A2
EP1292982A2 EP01948584A EP01948584A EP1292982A2 EP 1292982 A2 EP1292982 A2 EP 1292982A2 EP 01948584 A EP01948584 A EP 01948584A EP 01948584 A EP01948584 A EP 01948584A EP 1292982 A2 EP1292982 A2 EP 1292982A2
Authority
EP
European Patent Office
Prior art keywords
trench
crystal plane
substrate
sidewalls
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01948584A
Other languages
English (en)
French (fr)
Inventor
Alexander Michaelis
Helmut Horst Tews
Stephan Kudelka
Ulrike Gruening
Jochen Beintner
Uwe Schroeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies North America Corp
Original Assignee
Infineon Technologies North America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies North America Corp filed Critical Infineon Technologies North America Corp
Publication of EP1292982A2 publication Critical patent/EP1292982A2/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01336—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid
    • H10D64/01346—Making the insulator on single crystalline silicon, e.g. chemical oxidation using a liquid in a gaseous ambient using an oxygen or a water vapour, e.g. oxidation through a layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0383—Making the capacitor or connections thereto the capacitor being in a trench in the substrate wherein the transistor is vertical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/025—Manufacture or treatment of FETs having insulated gates [IGFET] of vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/63—Vertical IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H10B12/053—Making the transistor the transistor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

Definitions

  • One way of increasing the data storage capacity of semiconductor memories is to reduce the amount of integrated circuit horizontal planar area consumed by each memory cell. For horizontally oriented devices, this may be done by decreasing the size of the access FET or the storage capacitor, or both. This approach has limits, however, due to minimum producible structure size in a given fabrication technology, and the problems associated with devices with small dimensions, such as hot carriers, punch through, and excess leakage.
  • An advantage of a preferred embodiment of the present invention is that a DRAM, memory cell may be formed with a trench capacitor and a vertical transistor, thus using devices of manageable size yet occupying minimal horizontal planar area.
  • Another advantage of a preferred embodiment of the present invention is that the resulting structure is relatively insensitive to active area/deep trench misalignment, providing for a more robust process than those used in the prior art.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
EP01948584A 2000-06-21 2001-06-21 Gate-oxidation für vertikales grabenbauteil Withdrawn EP1292982A2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US59878800A 2000-06-21 2000-06-21
US598788 2000-06-21
PCT/US2001/019882 WO2001099162A2 (en) 2000-06-21 2001-06-21 Gate oxidation for vertical trench device

Publications (1)

Publication Number Publication Date
EP1292982A2 true EP1292982A2 (de) 2003-03-19

Family

ID=24396921

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01948584A Withdrawn EP1292982A2 (de) 2000-06-21 2001-06-21 Gate-oxidation für vertikales grabenbauteil

Country Status (3)

Country Link
EP (1) EP1292982A2 (de)
TW (1) TW526584B (de)
WO (1) WO2001099162A2 (de)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61194867A (ja) * 1985-02-25 1986-08-29 Hitachi Micro Comput Eng Ltd 半導体集積回路装置
JPS63197365A (ja) * 1987-02-12 1988-08-16 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH01189172A (ja) * 1988-01-25 1989-07-28 Sharp Corp 半導体装置
JPH05109984A (ja) * 1991-05-27 1993-04-30 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH0878533A (ja) * 1994-08-31 1996-03-22 Nec Corp 半導体装置及びその製造方法
US5861104A (en) * 1996-03-28 1999-01-19 Advanced Micro Devices Trench isolation with rounded top and bottom corners and edges
US6320215B1 (en) * 1999-07-22 2001-11-20 International Business Machines Corporation Crystal-axis-aligned vertical side wall device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO0199162A3 *

Also Published As

Publication number Publication date
WO2001099162A2 (en) 2001-12-27
WO2001099162A3 (en) 2002-07-18
TW526584B (en) 2003-04-01

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Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

RIN1 Information on inventor provided before grant (corrected)

Inventor name: GRUENING, ULRIKE

Inventor name: TEWS, HELMUT, HORST

Inventor name: BEINTNER, JOCHEN

Inventor name: MICHAELIS, ALEXANDER

Inventor name: KUDELKA, STEPHAN

Inventor name: SCHROEDER, UWE

RIN1 Information on inventor provided before grant (corrected)

Inventor name: BEINTNER, JOCHEN

Inventor name: MICHAELIS, ALEXANDER

Inventor name: GRUENING, ULRIKE

Inventor name: SCHROEDER, UWE

Inventor name: KUDELKA, STEPHAN

Inventor name: TEWS, HELMUT, HORST

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