Classifications

• • H01L27/14609—
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/70—SSIS architectures; Circuits associated therewith
  • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
  • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
  • H04N25/771—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion

Definitions

• the invention relates to an image sensor device consisting of a semiconducting carrier (substrate), in particular in CMOS technology, on which an arrangement of image elements is formed, each image element (pixel) being a photosensitive detector means, means for photoelectrically converting a detected photo signal into an electrical one Signal and electrical storage means for storing the electrical signal are assigned, and wherein a memory control device is provided for pixel-related storage and controlled reading of the electrical signals.
• a device of the type mentioned is known from WO 98/19455, ie PCT / EP97 / 05978. It is an optical image sensor, for example for use in a camera, in which each pixel in each image sequence cycle can record the complete color information in accordance with the lighting incident on it and provide it in electronic form. Each pixel of the matrix-organized sensor structure has several information stores in order to be able to temporarily store the different color information at the same time. In addition, the sensor contains controllable detector elements, which can be changed in their spectral sensitivity.
• CCD image sensor devices in the form of CCD image sensors are known from the prior art, for example from “CCD-CMOS Image Sensor for Ultra-High Speed Image Capturing", from 1999 IEEE Workshop on Charge-Coupled Devices and Advanced Image Sensors, June 10 -12, 1999, Karuizawa, Nagano, Japan, pp. 99-102.
• photoelectric sensor devices which are designed in the form of three chips, an image sensor, a memory and the associated memory control device (controller). This solution therefore has three separate chips.
• Another variant of a sensor device for a digital camera provides for the memory arrangement with the corresponding memory controller to be arranged on the same chip outside the sensor area.
• the known devices require that the readings of the measured values recorded by the sensor and converted into electrical signals take place immediately after each recorded image - usually using known compression methods, such as JPEG - and a storage in an external storage device. Only after performing these steps is the sensor ready for the subsequent exposure.
• a conventional sensor thus has the disadvantage that ultra-fast image sequences are not possible due to the transmission times required by the readout process. If the memory and the image sensor are implemented within one chip, the memory takes up a considerable part of the total chip area.
• the object of the invention is to further develop an image sensor device of the type mentioned at the outset in such a way that on the one hand the use of the area of the chip becomes more effective and on the other hand it can be used in high-speed cameras.
• the memory control device is designed in such a way that photoelectrically converted signals recorded one after the other in the individual picture element can be stored in different storage means and can be read out from them at a predeterminable time.
• the invention is characterized in that the image sensor device in the manner of an "electronic film" enables the recording of several images in succession without the image information having to be read out in between. Rather, the multiple storage means assigned to each picture element (pixel), controlled by the storage control device, are used to store them one after the other following images in the respective storage medium. After the end of the recording of all the pictures in the "film", the corresponding storage values can then be read out and reproduced promptly, regardless of the recording process.
• the storage period is only limited by the physical volatility of the information. Otherwise the readout time can be freely selected by the user. For example, 36 black / white images or 24 color images can be stored - depending on the black / white or color detector used. This also enables the recording of ultra-fast image sequences with high-speed cameras.
• Another advantage of the solution according to the invention can be seen in the fact that the sensor surface is used more effectively, since no additional or separate space on the image sensor surface has to be made available for the memory. Rather, the arrangement of the storage means is integrated pixel by pixel in the detector, since the individual memory cells are arranged directly below or next to the detector or within it. As a result of the arrangement according to the invention, the detector and the memory matrix are now “pixel-by-pixel”.
• Photodetectors made of crystalline silicon or amorphous silicon can be used as detector means, but also those made of III-V alloys, II-VI alloys or organic or any other detector device for converting light into an electrical signal.
• the sensors used can be sensitive to visible light, UV light, IR light, X-rays or any other radiation that can be converted into an electrical signal.
• the storage means can store the electrical signals either in analog or digital representation, but also in a mixed form, such as multi-level digital technology, in which several digital bits are represented in an amplitude-discretized analog signal.
• each pixel contains a device for analog-to-digital conversion, such as a single slope, dual slope, cyclic pipeline or sigma-delta A / D converter.
• the storage means can be arranged laterally next to one another or integrated vertically one above the other or use both types of integration simultaneously.
• Vertical integration is also known as 3D integration and represents the use of the third spatial dimension to increase the number and density of electrical elements that can be achieved on a given surface.
• the storage means can be designed as capacities or as EPROM, EEPROM or DRAM cells, regardless of whether analog or digital signals are to be stored. Digital signals can also be stored in SRAM cells. Magnetic, optical, organic, biological or any other type of memory cell can also be used. If electrical capacitors are used, trench, trench or planar capacitors are known, advantageous designs.
• 1 shows a first embodiment of an image sensor device according to the invention
• 2 shows a second exemplary embodiment of an image sensor device according to the invention
• FIG. 3 shows a third exemplary embodiment of an image sensor device according to the invention
• Fig. 4 is a circuit diagram for explaining the operation of an image sensor device according to the invention.
• Fig. 1 shows an image sensor device as it is the subject of the first embodiment of the invention.
• the arrangement consists of a substrate 1 serving as a carrier, which is formed using conventional CMOS technology.
• An electronic circuit device 2 is integrated in the surface of the substrate 1 and is used to control the electronic memory arrangement described below.
• a storage level 5 is deposited on the surface of the substrate 1, on the surface of which there is in turn a detector layer 4.
• the underside of the detector layer 4 is connected to the electronic control device 2 via a via 6.
• a plurality of separate electrical storage means 3 are arranged within the storage level 5 and are likewise connected to the control device 2 via further plated-through holes 10.
• the multiple storage means C1, C2, CN are e.g. designed as plate capacitors.
• the image to be recorded falls from above onto the detector layer 4 and the image information corresponding to the pixel under consideration is photoelectrically converted and m is read into the first memory C1 as electrical information.
• the reading-in process is controlled by the pixel electronics 2 acting as a memory control device.
• the memory control device 2 operates in such a way that the image information then incident on the pixel - converted into an electrical signal - is read into the second memory means C2, etc., etc. until all the storage means C1 to CN are filled, the number of which corresponds to the maximum image recording quantity.
• the individual memory values C1, C2, CN are read out of the memory cells into an additional memory (not shown), from which the further processing of the image information, in particular the assembly of the overall image, takes place.
• the particular advantage is therefore that the image information is stored in a pixel-uniform manner, from which the individual images can then be reconstructed later. Due to the elimination of the respective readout processes directly after the individual recording, high-speed recordings that were previously impossible have been possible.
• the second exemplary embodiment of the invention shown in FIG. 2 differs from the representation according to FIG. 1 in that the detector 4 is located as a layer system directly above the substrate 1 and is connected via the via layer 6 to the pixel electronics 2 operating as a memory control unit.
• the plurality of memory elements 3, which in turn are assigned to the individual pixel delimited by the vertical lines, are arranged in the same horizontal plane as the pixel control device 2.
• the third exemplary embodiment shown in FIG. 3 is characterized in that the CMOS substrate 1 has both the memory control electronics 2 and the plurality of memory elements 3 and finally also the detector device 4 in a common horizontal plane.
• the detector device 4 is designed as a photodiode. With this arrangement, a via, as shown in FIGS. 1 and 2, can be omitted.
• the detector layer 4 can alternatively be designed both as a simple photodiode and as a photodiode with a color mosaic filter or as a multispectral diode, as is shown in more detail in the prior art of WO 98/19455.
• FIG. 4 shows an electronic circuit as it is exemplary for the control of the image sensor device shown in one of the exemplary embodiments 1 to 3.
• the photocurrent supplied by the detector is via the inverters M4, M5 / capacitor Ci Combination converted into a voltage proportional to the photocurrent (see WO 98/19455, ie PCT / EP97 / 05978).
• the inverter ensures a constant potential at the detector cathode K.
• the integration time After activating int and deactivating the reset signal, the integration time begins and the image information is saved as a voltage value in one of the memory elements selected by PicO..Pic3 and connected to CpO..Cp3.
• the image acquisition is ended by deactivating int. After a short reset phase, another image can be taken by selecting a different memory without first reading it out. After all the memories have been occupied (in the example, the four memory elements corresponding to the connections CpO..Cp3), by activating the read_int signal via the driver stage MIO, the stored images can be successively read out by activating the corresponding control signals PicO .. Pic3.

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• Engineering & Computer Science (AREA)
• Multimedia (AREA)
• Signal Processing (AREA)
• Solid State Image Pick-Up Elements (AREA)
• Transforming Light Signals Into Electric Signals (AREA)
• Facsimile Heads (AREA)

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• 2000
  • 2000-03-01 WO PCT/EP2000/001705 patent/WO2000052759A1/de not_active Application Discontinuation
  • 2000-03-01 CN CN00805351A patent/CN1344427A/zh active Pending
  • 2000-03-01 EP EP00909273A patent/EP1166359A1/de not_active Withdrawn
  • 2000-03-01 JP JP2000603094A patent/JP2002538707A/ja active Pending
  • 2000-03-03 TW TW089103774A patent/TW488156B/zh active
• 2002
  • 2002-10-10 HK HK02107397.2A patent/HK1046190A1/zh unknown

Non-Patent Citations (1)

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