EP1102326A2 - Capteur d'image à l'état solide et système d'imagerie comportant un tel dispositif - Google Patents

Capteur d'image à l'état solide et système d'imagerie comportant un tel dispositif Download PDF

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Publication number
EP1102326A2
EP1102326A2 EP00310339A EP00310339A EP1102326A2 EP 1102326 A2 EP1102326 A2 EP 1102326A2 EP 00310339 A EP00310339 A EP 00310339A EP 00310339 A EP00310339 A EP 00310339A EP 1102326 A2 EP1102326 A2 EP 1102326A2
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EP
European Patent Office
Prior art keywords
charge transfer
solid
state imaging
horizontal
imaging device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP00310339A
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German (de)
English (en)
Other versions
EP1102326B1 (fr
EP1102326A3 (fr
Inventor
Yasuhiro Morinaka
Hiroyoshi Komobuchi
Takumi Yamaguchi
Sei Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
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Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of EP1102326A2 publication Critical patent/EP1102326A2/fr
Publication of EP1102326A3 publication Critical patent/EP1102326A3/fr
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Publication of EP1102326B1 publication Critical patent/EP1102326B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof

Definitions

  • the present invention relates to solid-state imaging devices and to imaging systems using the same. More particularly, the present invention provides a device structure that is suitable for solid-state imaging devices capable of high-speed read-out.
  • JP H03-224371A proposes a structure in which the read-out amplifiers are arranged in mirror symmetry (line symmetry).
  • signals are output from the pixels arranged in rows and columns in the pixel portions 31 and 32, after having passed through the horizontal charge transfer path 33 and the read-out amplifiers 34 and 35, which are arranged on both ends of the horizontal charge transfer path.
  • a solid-state imaging device in accordance with the present invention includes a photoelectric conversion region.
  • the photoelectric conversion region has a plurality of photoelectric conversion portions arranged in rows and columns extending in a vertical direction and a horizontal direction, and a plurality of vertical charge transfer paths extending substantially in parallel to the columns of the photoelectric conversion portions.
  • This solid-state imaging device also has a horizontal charge transfer path for receiving signals from the plurality of vertical charge transfer paths.
  • the plurality of vertical charge transfer paths is arranged at a horizontal pitch A within the photoelectric conversion region, and at a pitch B that is smaller than the pitch A in a portion where the signals are input into the horizontal charge transfer path.
  • Fig. 1 shows a configuration of the solid-state imaging device in accordance with the present invention.
  • Fig. 2 shows a magnification of the region P in Fig. 1.
  • Fig. 3 shows another configuration of a solid-state imaging device in accordance with the present invention.
  • Fig. 4 shows a magnification of the region Q in Fig. 2.
  • Figs. 5A and 5B are plan views illustrating the width of the vertical charge transfer paths.
  • Fig. 6 is a block diagram showing a configuration of the imaging system in accordance with the present invention.
  • Fig. 7 is a perspective view of a vertical charge transfer path of the solid-state imaging device of the present invention and the structure arranged on top of it.
  • Figs. 8A and 8B are plan views showing examples of the vicinity of the bent portion in the vertical charge transfer paths of the solid-state imaging device of the present invention.
  • Fig. 9 is a plan view showing another example of the vicinity of the bent portion in the vertical charge transfer paths of the solid-state imaging device of the present invention.
  • Fig. 10 shows the configuration of a conventional solid-state imaging device.
  • Figs. 11A and 11B illustrate the differences in the amplifier shape caused by misalignments and skewed ion implantation angles.
  • Fig. 11A shows a pair of transistors, whose relative position is one of parallel displacement
  • Fig. 11B shows a pair of transistors, whose relative position is one of mirror symmetry (line symmetry).
  • Figs. 11A and 11B illustrate the differences between these arrangements.
  • the pitch B of the vertical charge transfer paths in the portion where a signal is input into the horizontal charge transfer path is smaller than the pitch A of the vertical charge transfer paths in the photoelectric conversion region (A > B). Consequently, when the number of vertical charge transfer path lines is N, a space S having the width (N - 1) ⁇ (A - B) is created. This space S can be utilized as the region in which the read-out amplifiers are placed.
  • this space S when the photoelectric conversion region is partitioned into a plurality of sections, and a read-out amplifier is provided for each section, it is possible to arrange this plurality of read-out amplifiers while preserving a positional relation of parallel displacement of the read-out amplifiers with respect to one another.
  • Such a positional arrangement, in which the read-out amplifiers can be shifted by parallel displacement upon one another, is shown in Fig. 11A for example.
  • the sections of the photoelectric conversion region corresponding to one read-out amp (that is, the photoelectric conversion blocks) all have the same shape, and can be arranged so that the horizontal read-out direction is the same for all corresponding pixels. Therefore, it is possible to obtain a solid-state imaging device, in which the troublesome data rearranging, which is necessary when the pixels are arranged in mirror symmetry, is obviated.
  • a read-out amplifier and a horizontal charge transfer path for receiving signals from the charge transfer paths are provided for each section into which the photoelectric conversion region is partitioned along the vertical direction (in other words, for each photoelectric conversion block).
  • the read-out amplifier and the horizontal charge transfer path for receiving signals from the vertical charge transfer paths are provided at a horizontal spacing that is not larger than the width of the section into which the photoelectric conversion region is partitioned, utilizing the aforementioned space S.
  • the vertical charge transfer paths are arranged at the horizontal pitch A also at the border between photoelectric conversion blocks, because this can cancel image distortions, for example.
  • the horizontal width of the vertical charge transfer paths is substantially constant from a portion at the photoelectric conversion region to a portion at the horizontal charge transfer portion, but it is also possible that the horizontal width of the vertical charge transfer paths increases gradually or step-like from a portion at the photoelectric conversion region to a portion at the horizontal charge transfer portion.
  • bent portions portions where the vertical charge transfer portions form an angle
  • transfer losses in the bent portions there is the possibility of transfer losses in the bent portions, and these transfer losses can be suppressed with various methods.
  • a plurality of transfer electrodes such that bent portions of the vertical charge transfer paths are generally arranged below positions between the transfer electrodes, rather than below the transfer electrodes. If, however, the bent portions are positioned below predetermined transfer electrodes, then it is preferable that a transfer path length on which a transfer driving pulse is applied with said predetermined transfer electrodes is shorter than a transfer path length on which the transfer driving pulse is applied with transfer electrodes that are adjacent to said predetermined transfer electrodes.
  • the largest bending angle in the bent portions is not more than 45°. If a group of vertical charge transfer paths is squeezed together from both sides toward the center while gradually reducing the pitch of the plurality of vertical charge transfer paths, then the bending angle becomes largest at the outermost vertical charge transfer paths. In photoelectric conversion blocks with this typical embodiment, it is preferable that the bending angle at the outermost vertical charge transfer paths is not more than 45°.
  • Fig. 1 shows the configuration of a CCD-type solid-state imaging device in accordance with a first embodiment of the present invention.
  • photodiodes (photoelectric conversion portions) 1 are formed in photoelectric conversion blocks 11, 12, ... ,13, in the form of rows and columns (i.e. a matrix or two-dimensional array). Between the columns of photodiodes, vertical charge transfer paths (VCCD) 2 extend along the columns.
  • VCCD vertical charge transfer paths
  • V-H conversion portions vertical/horizontal conversion portions 14, 15, ..., 16 are formed between the photoelectric conversion blocks 11, 12, ... 13 and the horizontal charge transfer paths (HCCD) 17, 18, ... ,19.
  • the horizontal charge transfer paths are connected to read-out amplifiers 31a, 31b, ..., 31c.
  • the read-out amplifiers are placed in spaces that result from the tapering of the vertical CCDs, so that it is possible to place them directly adjacent to the last stage of the horizontal transfer paths.
  • the parasitic capacitance of the FDAs floating diffusion amplifies
  • the signal charge produced in the photoelectric conversion blocks is transferred to these read-out amplifiers.
  • the vertical charge transfer paths 2 of this solid-state imaging device are arranged preserving the same spacing with respect to the horizontal direction. Also at the border (joint) portions 3 between the blocks, the horizontal spacing between the vertical charge transfer paths is held constant. Consequently, in this solid-state imaging device, the horizontal spacing between the vertical charge transfer paths is the same throughout the entire photoelectric conversion region. On the other hand, the spacing of the horizontal charge transfer paths in the V-H conversion portions 14, 15, ..., 16 is not constant.
  • Fig. 2 shows a magnification of the vicinity of the region P in Fig. 1.
  • the vertical charge transfer paths 2 are lined up with a pitch A.
  • the vertical charge transfer paths 2 are lined up with a pitch B (A > B).
  • the pitch B should be, for example, 40 to 80% narrower than the pitch A.
  • Applying a driving pulse to the transfer electrodes 41 to 54 transfers the signal charges in the vertical charge transfer paths sequentially downward in the drawing.
  • the transfer electrodes are made, for example, of polycrystalline silicon films.
  • the bending degree ⁇ is not higher than 45°.
  • the wiring should be such that independent pulses can be applied to the portion where the transfer paths are bent, so that transfer losses do not occur at this portion. It is preferable that the electrode structure in the arrangement in Fig. 2 includes such wiring that pulses that are independent from the other electrodes can be applied to at least the electrodes 43 and 44.
  • empty regions 31d are created by utilizing the trapezoid V-H conversion portions, in which the vertical charge transfer paths are increasingly constricted toward the horizontal charge transfer paths arranged below them in the drawing, and the amplifiers can be arranged in these empty regions.
  • the charge transfer direction is the same for all horizontal charge transfer paths.
  • this solid-state imaging device when one region with which signals are picked up, for example the region made up of the photoelectric conversion region 11, the V-H conversion portion 14, the horizontal charge transfer path 17 and the read-out amplifier 31a is regarded as one solid-state imaging block, then the entire device is made up of solid-state imaging blocks arranged adjacently in the horizontal direction.
  • These solid-state imaging blocks have the same shape and preserve a positional relation of parallel displacement with respect to one another. Except for the wiring pattern to the pads on the chip, which connect the solid-state imaging blocks to the outside, these solid-state imaging blocks can be provided with basically the same shape. Consequently, this arrangement is very advantageous in that it preserves the uniformity of the image.
  • the solid-state imaging device obtained in this manner is not very susceptible to the influence of mask misalignments and skewed ion implantation angles during the semiconductor manufacturing process, and the signal processing for reading out signals with a plurality of amplifiers and displaying them as one image is simple.
  • all elements are arranged in a streamlined manner, but it is possible to widen the region where the amplifiers can be placed even further by extending the amplifiers into the regions 31e used for forming the transfer electrodes 41 to 54. These regions 31e can be utilized with the following embodiment.
  • Fig. 3 shows the configuration of a CCD-type solid-state imaging device in accordance with a second embodiment of the present invention.
  • the photodiodes 1 and the vertical charge transfer paths 2 are arranged in photoelectric conversion blocks 21, 22, ... ,23, and horizontal charge transfer paths 27, 28, ..., 29 and read-out amplifiers 32a, 32b, ..., 32c are provided for each of these photoelectric conversion blocks 21, 22, ... ,23.
  • V-H conversion portions 24, 25, ..., 26 are formed between the photoelectric conversion blocks and the horizontal transfer electrodes.
  • conducting lines 20 are formed along the vertical charge transfer paths 2. These conducting lines 20 feed a driving pulse to the lower transfer electrodes (not shown in the drawing), through contact holes that are formed as appropriate. The contact holes are formed at predetermined spacings corresponding to the driving pattern that is used.
  • the conducting lines 20 are arranged along the vertical charge transfer paths 2. Therefore, it is not necessary to link the transfer electrodes 41 to 54 to one another horizontally, and the transfer electrodes 45 to 54 in the V-H conversion portion of the different solid-state imaging blocks can be formed separately. Consequently, using this embodiment, the regions 32e, which were dead space in the first embodiment, can be utilized together with the regions 32d for the read-out amplifiers.
  • the charge transfer paths in the V-H conversion portion should be set to the same width.
  • Fig. 5B shows an example, in which the width of the transfer paths is widened gradually, but it is also possible to widen the transfer paths in a step-wise fashion.
  • V is about 1.0 to 1.5 times as large as U.
  • Fig. 6 shows an example of an imaging system using this solid-state imaging device.
  • Signals that have been read in in parallel are transmitted from a plurality of read-in amplifiers over the transmission paths 61, 62, ..., 63, and are subjected to CDS (correlated double sampling), gain control, and ADC (analog/digital conversion). Then, correction of the joint portion between different read-out amplifiers is performed, as well as the serial conversion and color processing of the parallel data that have been read out in parallel, and the data are displayed on a monitor or stored in a memory, after passing through a memory controller. Thus, a uniform image without borders is obtained.
  • CDS correlated double sampling
  • gain control gain control
  • ADC analog/digital conversion
  • Fig. 7 is a cross-sectional perspective view of the vertical charge transfer path 70 of the above-described solid-state imaging device and the vertical transfer electrodes 71, 72 and 73 arranged on top of it.
  • the transfer electrodes 72 and 73 When viewed from above, between the transfer electrodes 72 and 73, there is a bending point F with a bending angle ⁇ in the vertical charge transfer path 70 with the width W (see Fig. 8A). When the transfer path bends like this at a position between electrodes, transfer losses can be avoided.
  • the bending point F of the transfer path 70 is arranged below the transfer electrode 72 (see Fig. 8B), transfer losses tend to occur below this transfer electrode 72.
  • the transfer electrodes 71 to 73 are made of a two-layer polysilicon film, but it is also possible to provide the electrodes with a layering structure of three or more layers. Furthermore, the layering order of the transfer electrodes is not limited to the example shown in Fig. 7, and it is also possible to form the transfer electrode 72 on the adjacent transfer electrodes 71 and 73.
  • a solid-state imaging device in which signal charges can be read out at high speeds by parallel read-out, and in which variations among the amplifier input/output characteristics due to mask misalignments or dependencies on the implantation angle of doping impurities during the semiconductor manufacturing process can be suppressed.
  • the solid-state imaging blocks which include the read-out amplifiers, are of the same shape and can be arranged in parallel to one another, so that when displaying one image, it is possible to omit the rearranging of the data, which is necessary when reading out with mirror symmetry, therefore making the signal processing easier.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
EP00310339A 1999-11-22 2000-11-21 Capteur d'image à l'état solide et système d'imagerie comportant un tel dispositif Expired - Lifetime EP1102326B1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP33122199 1999-11-22
JP33122199 1999-11-22
JP2000289213 2000-09-22
JP2000289213 2000-09-22

Publications (3)

Publication Number Publication Date
EP1102326A2 true EP1102326A2 (fr) 2001-05-23
EP1102326A3 EP1102326A3 (fr) 2004-04-07
EP1102326B1 EP1102326B1 (fr) 2007-02-28

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EP00310339A Expired - Lifetime EP1102326B1 (fr) 1999-11-22 2000-11-21 Capteur d'image à l'état solide et système d'imagerie comportant un tel dispositif

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US (1) US6985182B1 (fr)
EP (1) EP1102326B1 (fr)
KR (1) KR100586363B1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012477A1 (fr) 2001-08-01 2003-02-13 Hamamatsu Photonics K.K. Imageur a rayons x

Families Citing this family (11)

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Publication number Priority date Publication date Assignee Title
WO2002073538A1 (fr) * 2001-03-13 2002-09-19 Ecchandes Inc. Dispositif visuel, compteur asservi et capteur d'images
US7050099B2 (en) * 2001-04-19 2006-05-23 Matsushita Electric Industrial Co., Ltd. Solid-state image pickup apparatus
WO2002104003A1 (fr) * 2001-06-14 2002-12-27 Dalsa Corporation Imageur a couplage de charge
WO2003107661A1 (fr) * 2002-06-12 2003-12-24 ソニー株式会社 Dispositif d'imagerie a etat solide, procede de commande du dispositif d'imagerie a etat solide, procede d'imagerie et imageur
JP4486874B2 (ja) * 2004-12-08 2010-06-23 シャープ株式会社 多分割読出ｃｃｄの補正近似直線群情報生成方法及び多分割読出ｃｃｄの補正処理装置製造方法
JP2009027528A (ja) * 2007-07-20 2009-02-05 Fujifilm Corp 固体撮像素子及びその駆動方法
JPWO2011086622A1 (ja) * 2010-01-12 2013-05-16 パナソニック株式会社 固体撮像装置、その駆動方法及びカメラ
US8878255B2 (en) * 2013-01-07 2014-11-04 Semiconductor Components Industries, Llc Image sensors with multiple output structures
US8878256B2 (en) * 2013-01-07 2014-11-04 Semiconductor Components Industries, Llc Image sensors with multiple output structures
JP6144426B2 (ja) * 2014-07-15 2017-06-07 ブリルニクス インク 固体撮像装置、固体撮像装置の製造方法、および電子機器
JP6925206B2 (ja) 2017-09-04 2021-08-25 浜松ホトニクス株式会社 固体撮像装置

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EP0866502A2 (fr) * 1997-03-21 1998-09-23 Dalsa Inc. Architecture de capteur d'images à CCD connecté à plusieurs registres de lecture

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003012477A1 (fr) 2001-08-01 2003-02-13 Hamamatsu Photonics K.K. Imageur a rayons x
EP1422536A1 (fr) * 2001-08-01 2004-05-26 Hamamatsu Photonics K.K. Imageur a rayons x
EP1422536A4 (fr) * 2001-08-01 2006-03-08 Hamamatsu Photonics Kk Imageur a rayons x
US7138637B2 (en) 2001-08-01 2006-11-21 Hamamatsu Photonics K.K. X-ray imager

Also Published As

Publication number Publication date
KR100586363B1 (ko) 2006-06-08
EP1102326B1 (fr) 2007-02-28
EP1102326A3 (fr) 2004-04-07
KR20010060365A (ko) 2001-07-06
US6985182B1 (en) 2006-01-10

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