EP1083435A3 - Integrated circuit test apparatus - Google Patents

Integrated circuit test apparatus Download PDF

Info

Publication number
EP1083435A3
EP1083435A3 EP00118007A EP00118007A EP1083435A3 EP 1083435 A3 EP1083435 A3 EP 1083435A3 EP 00118007 A EP00118007 A EP 00118007A EP 00118007 A EP00118007 A EP 00118007A EP 1083435 A3 EP1083435 A3 EP 1083435A3
Authority
EP
European Patent Office
Prior art keywords
integrated circuit
fixed
test apparatus
circuit test
logic signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00118007A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1083435A2 (en
Inventor
Katsuya C/O Fujitsu Limited Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of EP1083435A2 publication Critical patent/EP1083435A2/en
Publication of EP1083435A3 publication Critical patent/EP1083435A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318505—Test of Modular systems, e.g. Wafers, MCM's
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/31813—Test pattern generators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
EP00118007A 1999-09-10 2000-08-22 Integrated circuit test apparatus Withdrawn EP1083435A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25757199A JP4388641B2 (ja) 1999-09-10 1999-09-10 集積回路の試験装置
JP25757199 1999-09-10

Publications (2)

Publication Number Publication Date
EP1083435A2 EP1083435A2 (en) 2001-03-14
EP1083435A3 true EP1083435A3 (en) 2003-06-25

Family

ID=17308132

Family Applications (1)

Application Number Title Priority Date Filing Date
EP00118007A Withdrawn EP1083435A3 (en) 1999-09-10 2000-08-22 Integrated circuit test apparatus

Country Status (3)

Country Link
US (2) US6785857B1 (ja)
EP (1) EP1083435A3 (ja)
JP (1) JP4388641B2 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050032613A (ko) * 2002-08-30 2005-04-07 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 집적 회로
US8894614B2 (en) 2004-04-21 2014-11-25 Acclarent, Inc. Devices, systems and methods useable for treating frontal sinusitis
US20060063973A1 (en) 2004-04-21 2006-03-23 Acclarent, Inc. Methods and apparatus for treating disorders of the ear, nose and throat
TW201329469A (zh) * 2012-01-06 2013-07-16 Novatek Microelectronics Corp 測試介面電路
CN103207365A (zh) * 2012-01-16 2013-07-17 联咏科技股份有限公司 测试接口电路
TW201345151A (zh) * 2012-04-25 2013-11-01 Novatek Microelectronics Corp 橋接積體電路

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4357703A (en) * 1980-10-09 1982-11-02 Control Data Corporation Test system for LSI circuits resident on LSI chips
US4635261A (en) * 1985-06-26 1987-01-06 Motorola, Inc. On chip test system for configurable gate arrays
JPH09166646A (ja) * 1995-12-15 1997-06-24 Nec Corp 半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5329533A (en) * 1991-12-26 1994-07-12 At&T Bell Laboratories Partial-scan built-in self-test technique
US6097206A (en) * 1996-10-15 2000-08-01 Advantest Corporation Memory tester and method of switching the tester to RAM test mode and ROM test mode
US6097205A (en) * 1997-02-14 2000-08-01 Semitest, Inc. Method and apparatus for characterizing a specimen of semiconductor material
JPH10283777A (ja) * 1997-04-04 1998-10-23 Mitsubishi Electric Corp Ｓｄｒａｍコアと論理回路を単一チップ上に混載した半導体集積回路装置およびｓｄｒａｍコアのテスト方法
JP3185717B2 (ja) * 1997-07-03 2001-07-11 日本電気株式会社 マクロセルおよび信号セレクタおよびこれらマクロセルと信号セレクタを含んだ半導体集積回路
JP4601737B2 (ja) * 1998-10-28 2010-12-22 株式会社東芝 メモリ混載ロジックｌｓｉ
JP2000346905A (ja) * 1999-06-04 2000-12-15 Nec Corp 半導体装置およびそのテスト方法
JP3971078B2 (ja) * 2000-02-25 2007-09-05 富士通株式会社 半導体装置、半導体記憶装置及び半導体記憶装置の制御方法
JP2002056696A (ja) * 2000-08-10 2002-02-22 Mitsubishi Electric Corp 半導体記憶装置
JP2002108693A (ja) * 2000-10-03 2002-04-12 Fujitsu Ltd データ読み出し方法、メモリコントローラ及び半導体集積回路装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4357703A (en) * 1980-10-09 1982-11-02 Control Data Corporation Test system for LSI circuits resident on LSI chips
US4635261A (en) * 1985-06-26 1987-01-06 Motorola, Inc. On chip test system for configurable gate arrays
JPH09166646A (ja) * 1995-12-15 1997-06-24 Nec Corp 半導体装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 10 31 October 1997 (1997-10-31) *

Also Published As

Publication number Publication date
EP1083435A2 (en) 2001-03-14
JP4388641B2 (ja) 2009-12-24
JP2001085620A (ja) 2001-03-30
US6785857B1 (en) 2004-08-31
US7178077B2 (en) 2007-02-13
US20050022082A1 (en) 2005-01-27

Similar Documents

Publication Publication Date Title
EP0741391A3 (en) Sample-and-hold circuit device
WO2003041122A3 (en) Preconditioning integrated circuit for integrated circuit testing
EP0388790A3 (en) Method and apparatus for testing high pin count integrated circuits
GB2195185B (en) Testing circuits comprising integrated circuits provided on a carrier
EP0571179A3 (en) Method and apparatus for the testing of connections of an electronic apparatus
EP0817441A3 (en) Integrated circuit chip with adaptive input-output port
EP1233277A3 (en) Memory designs for IC terminals
EP0735685A3 (fr) Circuit programmable de réduction de consommation dans un dispositif logique programmable
TW200729636A (en) Testing device, pin electronics card, electrical machine and switch
SE9903509D0 (sv) Antennenhet
AU5790590A (en) Printed circuit board test system and application thereof to testing printed circuit boards forming digital signal multiplex-demultiplex equipment
EP0987632A4 (en) INTERFACE SCAN ELEMENT AND COMMUNICATION DEVICE USING THIS
EP1083435A3 (en) Integrated circuit test apparatus
MY135602A (en) Instrument initiated communication for automatic test equipment
EP1179740A3 (en) Boundary scan chain routing
WO1999056396A3 (en) Testable ic having analog and digital circuits
EP1048957A3 (en) Integrated circuit device having process parameter measuring circuit
EP1074991A3 (en) Semiconductor memory device
US6088448A (en) Telecommunication equipment comprising a magnetic device for recognizing peripherals
EP1083682A3 (en) Built-in self test (BIST) approach for regenerative data transmission system
WO2003034083A3 (en) Automatic scan-based testing of complex integrated circuits
EP1041726A3 (en) A receiving apparatus of spectrum spread communication system
CA2310876A1 (en) Method and circuit for summing utility metering signals
JPS56124065A (en) Position detection method for mobile object
EP0898282A3 (en) Semiconductor integrated circuit and method for designing the same

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Extension state: AL LT LV MK RO SI

RIC1 Information provided on ipc code assigned before grant

Ipc: 7G 01R 31/3181 B

Ipc: 7G 01R 31/317 A

17P Request for examination filed

Effective date: 20031218

17Q First examination report despatched

Effective date: 20040129

AKX Designation fees paid

Designated state(s): DE FR

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20050531