EP1010204A1 - Structure semi-conductrice comportant une zone en carbure de silicium alpha et utilisation de cette structure semi-conductrice - Google Patents
Structure semi-conductrice comportant une zone en carbure de silicium alpha et utilisation de cette structure semi-conductriceInfo
- Publication number
- EP1010204A1 EP1010204A1 EP98928113A EP98928113A EP1010204A1 EP 1010204 A1 EP1010204 A1 EP 1010204A1 EP 98928113 A EP98928113 A EP 98928113A EP 98928113 A EP98928113 A EP 98928113A EP 1010204 A1 EP1010204 A1 EP 1010204A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- silicon carbide
- semiconductor structure
- semiconductor
- polytype
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 53
- 229910021431 alpha silicon carbide Inorganic materials 0.000 title claims abstract description 17
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 58
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 52
- 239000000463 material Substances 0.000 claims description 12
- 238000010276 construction Methods 0.000 claims 1
- 239000002800 charge carrier Substances 0.000 abstract description 5
- 239000011248 coating agent Substances 0.000 abstract 1
- 238000000576 coating method Methods 0.000 abstract 1
- 238000010292 electrical insulation Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 18
- 239000000758 substrate Substances 0.000 description 9
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 235000012431 wafers Nutrition 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
Definitions
- the invention relates to a semiconductor structure which contains an interface between a region made of a predetermined ⁇ -silicon carbide polytype and an electrically insulating region, the electrical conductivity in the silicon carbide region being induced at the interface by
- Such semiconductor structures are e.g. from "IEEE Electronic Electronics Letters", Vol. 1 8, No. 3, March 1991, pages 93 to 95. Furthermore, the invention relates to the use of the aforementioned semiconductor structure.
- Silicon carbide in monocrystalline form is a semiconductor material with excellent physical properties, which make this semiconductor material appear interesting, particularly for power electronics, especially in power electronics applications due to its low breakthrough field strength and good thermal conductivity. Since the commercial availability of single-crystal substrate wafers, especially those made from 6H and 4H silicon carbide polytypes, has increased, power semiconductor components based on silicon carbide, such as e.g. Silicon carbide Schottky diodes, increasing attention. However, the previously known unipolar silicon carbide power MOSFETs still have problems with regard to important properties, such as the forward resistance.
- a unipolar MOSFET is presented, for example, which was produced on the basis of a 6H-silicon-carbide wafer by double ion implantation (so-called D-MOSFET).
- D-MOSFET double ion implantation
- the current is controlled in a semiconductor region made of silicon carbide with a lateral current flow, the so-called channel zone, which is located in the silicon carbide region at an interface between the silicon carbide semiconductor region and an electrically insulating region (for example S ⁇ 0 2 ).
- the current is passed vertically through the component in a second silicon carbide semiconductor region, the so-called drift zone.
- the 4H-silicon carbide polytype with a volume conductivity Tuning mobility of the free charge carriers of about 800 cm 2 V -1 s ⁇ clearly has an advantage over 6H-Silicum carbide, which only has a mobility of about 100 cnXXs -1 .
- the influence of the polytype selection on the second influencing variable which is decisive for the forward resistance is not taken into account here, namely the conductivity m of the channel zone, which, apart from geometrical variables, is essentially determined by the properties of the boundary layer between the silicon carbide semiconductor region and the electrically insulating region.
- the invention is based on the object of designing the semiconductor structure with the features mentioned at the outset in such a way that improved properties, in particular an improved forward resistance, result compared to the prior art.
- the invention is based on the knowledge that the distribution of the electrically effective defects (traps) at the interface between a semiconductor region and an electrically insulating region determines the conductivity of the semiconductor at the interface and thus essentially the forward resistance of the complete semiconductor structure.
- Studies on silicon carbide have shown that, regardless of the polytype, an energetic band of high defect density forms, which is at a fixed energetic distance from the valence band. This band has an energetically comparatively sharply defined lower edge, which is approximately 2.9 eV above the valence band edge.
- the selection of the polytype according to the invention ensures that the defect band is energetically within the conduction band and thus has a significantly lower influence on the conductivity than is the case with the polytypes with a higher bandgap commonly used.
- the ⁇ -silicon carbide polytype is selected in accordance with the invention, advantageous semiconductor structures are obtained with the features mentioned in the preamble, which have improved properties compared to the prior art.
- the on-resistance can be advantageous, e.g. can be reduced by a factor of 20.
- the ⁇ -silicon carbide semiconductor region has a band gap which is at least 5 meV smaller than the 6H-silicon carbide polytype.
- the rhomboed ⁇ ⁇ -silicon carbide polytypes are particularly advantageous, in particular the 15R type or the 21R type.
- 15R-silicon carbide has a band gap of 2.79 eV at room temperature, which is therefore below the comparison value of 6H-S1I1-cium carbide (2.91 eV) according to the invention.
- the 4H or 6H silicon carbide polytypes excluded according to the invention are not suitable polytypes due to their high bandgap of 3.15 eV (4H silicon carbide) and 2.91 eV (6H silicon carbide), although they have so far been used in the area of silicon carbide performance electronics have been used almost exclusively for reasons of commercial availability.
- Another advantageous embodiment takes advantage of the fact that in order to achieve the advantageous conductivity at the interface, only a narrow semiconductor region in the immediate vicinity of the electrically insulating region has to be formed from the claimed ⁇ -silicon carbide polytype.
- Semiconductor regions which are adjacent to this narrow region can thus consist either of the same or at least partially of a different silicon carbide polytype or also of a different semiconductor material than silicon carbide or of a complex structure with at least one semiconductor material other than silicon carbide .
- the semiconductor structure according to the invention can be designed as a MOSFET structure, in particular as a D-MOSFET structure or as a U-MOSFET structure, or as an IGBT structure. Such Structures are often used in power electronics.
- the semiconductor structure according to the invention is used to construct a semiconductor component or a complex semiconductor circuit.
- D-MOSFET components such as the semiconductor structure indicated in the figure and designated HS, are important unipolar power components.
- the current is controlled by means of a lateral current flow I L and on the other hand in the drift zone composed of a silicon carbide semiconductor layer 3 and a silicon carbide substrate 2 it is guided through the component by means of a vertical current flow I.
- vertical current flow is understood to mean a current flow in a direction that is perpendicular to an interface 20 of the silicon carbide semiconductor layer 3.
- lateral is understood to mean a direction that runs parallel to a direction within this interface 20.
- One of the determining variables for the forward resistance of the D-MOSFET component is the conductivity in the area of the lateral current conduction I L , the so-called channel. In the switched-on state, these channels are formed as regions of larger base regions 11 adjacent to interfaces 20 due to induced charges.
- the decisive interfaces 20 are shown in the figure by a stronger line. highlighted.
- the semiconductor structure is located precisely in these areas of the D-MOSFET component. At least this region of the base region 11 near the interface, which adjoins the electrically insulating region formed by a first oxide layer 13a, consists of an ⁇ -silicon carbide polytype with a smaller band gap than that of 6H silicon carbide. For example, a 15R silicon carbide poly type is suitable.
- the electrically insulating region arranged above the base region 11 can, as in the exemplary embodiment shown in the figure, be constructed from only a single layer. According to other advantageous embodiments, however, several layers, preferably also made of different materials, can be provided for this area.
- the first oxide layer 13a shown in the figure, the so-called gate oxide can advantageously consist of SiO 2 material, in particular thermal SiO 2 material. In other embodiments, however, this layer can also consist of a non-oxide, electrically insulating material, in particular of SiN 4 .
- Source regions are denoted by 10, base regions by 11, base contact regions by 12, a first oxide layer by 13a, a second oxide layer by 13b, a gate electrode by 14, a source electrode by 15 and a drain electrode by 16.
- the second oxide layer 13b (insulating oxide) serves for insulation between the gate electrode 14 and the source electrode 15 and consists of an SiO 2 deposited by means of an LPCVD process (Low Pressure Chemical Vapor Deposition).
- Each base region 11 is implanted as a 15R silicon carbide semiconductor region in a silicon carbide layer 3 grown epitaxially on a silicon carbide substrate 2 and is doped in the opposite way to the silicon carbide layer 3.
- the pn junctions 17 each formed between the base regions 11 and the silicon carbide layer 3 essentially absorb the reverse voltage when the D-MOSFET component is blocked.
- At least one source region 10 is implanted in each base region 11, which is doped opposite to the base region 11 and therefore forms a pn junction 18 with the associated base region 11.
- Each source region 10 is electrically short-circuited with the associated base region 11 via the source electrode.
- the base regions 11 are preferably doped with boron and consequently p-type.
- they can be more heavily doped and thus p + -le ⁇ tend.
- the source regions 10 and the silicon carbide layer 3 are preferably doped with nitrogen and thus n-type.
- the drain electrode 16 is arranged on the side of the silicon carbide substrate 2 facing away from the silicon carbide layer 3.
- the silicon carbide substrate 2 can also be provided with an implanted, highly doped dramatic region.
- the D-MOSFET thus has a vertical structure.
- the silicon carbide substrate 2 m in the illustrated embodiment is of the same conductivity type as the grown silicon carbide layer 3, then there is a MOSFET structure.
- the silicon carbide substrate 2 is of the opposite conductivity type as the silicon carbide layer 3, an additional pn junction between the source electrode 15 and the drain electrode 16 is connected between the layer 3 and the substrate 2 e. Then there is an IGBT structure.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
La structure semi-conductrice (HS) selon l'invention contient au moins une zone en carbure de silicium alpha (3, 10, 11) et une zone d'isolation électrique (13a), constituée par exemple d'une couche d'oxyde, entre lesquelles se trouvent une interface (20). Grâce au choix d'un polytype de carbure de silicium alpha, dont la bande interdite est plus petite que celle du polytype du carbure de silicium 6H, pour au moins une zone proche de l'interface, on obtient une mobilité élevée des porteurs de charges dans cette zone.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19736211 | 1997-08-20 | ||
DE19736211 | 1997-08-20 | ||
PCT/DE1998/000931 WO1999009598A1 (fr) | 1997-08-20 | 1998-04-01 | Structure semi-conductrice comportant une zone en carbure de silicium alpha et utilisation de cette structure semi-conductrice |
Publications (1)
Publication Number | Publication Date |
---|---|
EP1010204A1 true EP1010204A1 (fr) | 2000-06-21 |
Family
ID=7839610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP98928113A Withdrawn EP1010204A1 (fr) | 1997-08-20 | 1998-04-01 | Structure semi-conductrice comportant une zone en carbure de silicium alpha et utilisation de cette structure semi-conductrice |
Country Status (4)
Country | Link |
---|---|
US (1) | US6316791B1 (fr) |
EP (1) | EP1010204A1 (fr) |
CN (1) | CN1267397A (fr) |
WO (1) | WO1999009598A1 (fr) |
Families Citing this family (42)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6972436B2 (en) * | 1998-08-28 | 2005-12-06 | Cree, Inc. | High voltage, high temperature capacitor and interconnection structures |
US6767843B2 (en) * | 2000-10-03 | 2004-07-27 | Cree, Inc. | Method of N2O growth of an oxide layer on a silicon carbide layer |
CA2421003C (fr) * | 2000-10-03 | 2012-06-26 | Cree, Inc. | Procede de production d'une couche d'oxyde sur une couche de carbure de silicium au moyen de n2o |
US7067176B2 (en) | 2000-10-03 | 2006-06-27 | Cree, Inc. | Method of fabricating an oxide layer on a silicon carbide layer utilizing an anneal in a hydrogen environment |
US6956238B2 (en) * | 2000-10-03 | 2005-10-18 | Cree, Inc. | Silicon carbide power metal-oxide semiconductor field effect transistors having a shorting channel and methods of fabricating silicon carbide metal-oxide semiconductor field effect transistors having a shorting channel |
US6528373B2 (en) * | 2001-02-12 | 2003-03-04 | Cree, Inc. | Layered dielectric on silicon carbide semiconductor structures |
US7022378B2 (en) * | 2002-08-30 | 2006-04-04 | Cree, Inc. | Nitrogen passivation of interface states in SiO2/SiC structures |
US7221010B2 (en) * | 2002-12-20 | 2007-05-22 | Cree, Inc. | Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors |
US7074643B2 (en) * | 2003-04-24 | 2006-07-11 | Cree, Inc. | Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same |
US6979863B2 (en) * | 2003-04-24 | 2005-12-27 | Cree, Inc. | Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same |
US7118970B2 (en) * | 2004-06-22 | 2006-10-10 | Cree, Inc. | Methods of fabricating silicon carbide devices with hybrid well regions |
US7615801B2 (en) * | 2005-05-18 | 2009-11-10 | Cree, Inc. | High voltage silicon carbide devices having bi-directional blocking capabilities |
US20060261346A1 (en) * | 2005-05-18 | 2006-11-23 | Sei-Hyung Ryu | High voltage silicon carbide devices having bi-directional blocking capabilities and methods of fabricating the same |
US7414268B2 (en) | 2005-05-18 | 2008-08-19 | Cree, Inc. | High voltage silicon carbide MOS-bipolar devices having bi-directional blocking capabilities |
US7391057B2 (en) * | 2005-05-18 | 2008-06-24 | Cree, Inc. | High voltage silicon carbide devices having bi-directional blocking capabilities |
US7528040B2 (en) | 2005-05-24 | 2009-05-05 | Cree, Inc. | Methods of fabricating silicon carbide devices having smooth channels |
US7727904B2 (en) * | 2005-09-16 | 2010-06-01 | Cree, Inc. | Methods of forming SiC MOSFETs with high inversion layer mobility |
US7728402B2 (en) | 2006-08-01 | 2010-06-01 | Cree, Inc. | Semiconductor devices including schottky diodes with controlled breakdown |
US8432012B2 (en) | 2006-08-01 | 2013-04-30 | Cree, Inc. | Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same |
EP2631951B1 (fr) | 2006-08-17 | 2017-10-11 | Cree, Inc. | Transistors bipolaires haute puissance à grille isolée |
US8835987B2 (en) | 2007-02-27 | 2014-09-16 | Cree, Inc. | Insulated gate bipolar transistors including current suppressing layers |
US8232558B2 (en) | 2008-05-21 | 2012-07-31 | Cree, Inc. | Junction barrier Schottky diodes with current surge capability |
US8288220B2 (en) | 2009-03-27 | 2012-10-16 | Cree, Inc. | Methods of forming semiconductor devices including epitaxial layers and related structures |
US8294507B2 (en) | 2009-05-08 | 2012-10-23 | Cree, Inc. | Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits |
US8193848B2 (en) | 2009-06-02 | 2012-06-05 | Cree, Inc. | Power switching devices having controllable surge current capabilities |
US8629509B2 (en) | 2009-06-02 | 2014-01-14 | Cree, Inc. | High voltage insulated gate bipolar transistors with minority carrier diverter |
US8541787B2 (en) | 2009-07-15 | 2013-09-24 | Cree, Inc. | High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability |
US8354690B2 (en) | 2009-08-31 | 2013-01-15 | Cree, Inc. | Solid-state pinch off thyristor circuits |
US9117739B2 (en) | 2010-03-08 | 2015-08-25 | Cree, Inc. | Semiconductor devices with heterojunction barrier regions and methods of fabricating same |
US8415671B2 (en) | 2010-04-16 | 2013-04-09 | Cree, Inc. | Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices |
US8823089B2 (en) * | 2011-04-15 | 2014-09-02 | Infineon Technologies Ag | SiC semiconductor power device |
US9029945B2 (en) | 2011-05-06 | 2015-05-12 | Cree, Inc. | Field effect transistor devices with low source resistance |
US9142662B2 (en) | 2011-05-06 | 2015-09-22 | Cree, Inc. | Field effect transistor devices with low source resistance |
US9984894B2 (en) | 2011-08-03 | 2018-05-29 | Cree, Inc. | Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions |
US8618582B2 (en) | 2011-09-11 | 2013-12-31 | Cree, Inc. | Edge termination structure employing recesses for edge termination elements |
US8664665B2 (en) | 2011-09-11 | 2014-03-04 | Cree, Inc. | Schottky diode employing recesses for elements of junction barrier array |
US9373617B2 (en) | 2011-09-11 | 2016-06-21 | Cree, Inc. | High current, low switching loss SiC power module |
US8680587B2 (en) | 2011-09-11 | 2014-03-25 | Cree, Inc. | Schottky diode |
US9640617B2 (en) | 2011-09-11 | 2017-05-02 | Cree, Inc. | High performance power module |
JP2014531752A (ja) | 2011-09-11 | 2014-11-27 | クリー インコーポレイテッドCree Inc. | 改善したレイアウトを有するトランジスタを備える高電流密度電力モジュール |
JP6219044B2 (ja) | 2013-03-22 | 2017-10-25 | 株式会社東芝 | 半導体装置およびその製造方法 |
JP6230323B2 (ja) * | 2013-08-01 | 2017-11-15 | 株式会社東芝 | 半導体装置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63262871A (ja) * | 1987-04-21 | 1988-10-31 | Sharp Corp | 炭化珪素mos構造及びその製造方法 |
US5459107A (en) * | 1992-06-05 | 1995-10-17 | Cree Research, Inc. | Method of obtaining high quality silicon dioxide passivation on silicon carbide and resulting passivated structures |
US5506421A (en) * | 1992-11-24 | 1996-04-09 | Cree Research, Inc. | Power MOSFET in silicon carbide |
SE9404452D0 (sv) * | 1994-12-22 | 1994-12-22 | Abb Research Ltd | Semiconductor device having an insulated gate |
US5510281A (en) * | 1995-03-20 | 1996-04-23 | General Electric Company | Method of fabricating a self-aligned DMOS transistor device using SiC and spacers |
SE9700215L (sv) * | 1997-01-27 | 1998-02-18 | Abb Research Ltd | Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken |
-
1998
- 1998-04-01 EP EP98928113A patent/EP1010204A1/fr not_active Withdrawn
- 1998-04-01 WO PCT/DE1998/000931 patent/WO1999009598A1/fr not_active Application Discontinuation
- 1998-04-01 CN CN98808324A patent/CN1267397A/zh active Pending
-
2000
- 2000-02-22 US US09/523,158 patent/US6316791B1/en not_active Expired - Fee Related
Non-Patent Citations (1)
Title |
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See references of WO9909598A1 * |
Also Published As
Publication number | Publication date |
---|---|
CN1267397A (zh) | 2000-09-20 |
US6316791B1 (en) | 2001-11-13 |
WO1999009598A1 (fr) | 1999-02-25 |
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