EP0811250A1 - Dispositif semi-conducteur a surface semi-conductrice rugueuse - Google Patents

Dispositif semi-conducteur a surface semi-conductrice rugueuse

Info

Publication number
EP0811250A1
EP0811250A1 EP96901222A EP96901222A EP0811250A1 EP 0811250 A1 EP0811250 A1 EP 0811250A1 EP 96901222 A EP96901222 A EP 96901222A EP 96901222 A EP96901222 A EP 96901222A EP 0811250 A1 EP0811250 A1 EP 0811250A1
Authority
EP
European Patent Office
Prior art keywords
semiconductor
semiconductor device
contact metallization
roughened
producing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96901222A
Other languages
German (de)
English (en)
Inventor
Helmut Fischer
Gisela Lang
Reinhard Sedlmeier
Ernst Nirschl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0811250A1 publication Critical patent/EP0811250A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10156—Shape being other than a cuboid at the periphery
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/10155—Shape being other than a cuboid
    • H01L2924/10157—Shape being other than a cuboid at the active surface

Definitions

  • the invention relates to a semiconductor device with a roughened semiconductor surface.
  • Such a semiconductor device is described for example in the patent specification DD 251 905 A3.
  • a light-emitting semiconductor device with a III-V compound semiconductor body is disclosed therein. Its surface is roughened.
  • contact metallizations consisting of a gold beryllium and a gold layer are applied to partial areas of the III-V compound semiconductor surface.
  • the roughening reduces the total reflection of the light radiation generated in the semiconductor device on the surface. As a result, the radiation intensity and thus also the external quantum efficiency of the light-emitting semiconductor device is increased.
  • contact metallizations made from gold beryllium and gold present great difficulties in the production of these semiconductor devices.
  • This invention is therefore based on the object of developing a semiconductor device with a roughened semiconductor surface which has a contact metallization, the contrast ratio of which to the semiconductor material ensures reliable automatic optical detection with conventional camera systems used in chip production, and its connection to the bonding wire has high mechanical strength.
  • a semiconductor device in which a semiconductor body has at least one bondable contact metallization, in which at least a part of the surface of the semiconductor body which is not covered by the contact metallization is roughened and in which the contact metallization is a base metal material on ice.
  • a contact metallization made of a base metal material such as aluminum or an aluminum-based alloy generally has a better contrast ratio to the semiconductor material than the known metallization made of gold. It thus ensures reliable automatic optical detection with conventionally used optical detection systems.
  • the mechanical strength of the The connection between aluminum bond pads and gold bond wires is significantly higher than that of a gold-gold connection.
  • the use of base metallic materials such as aluminum also has the advantage that no special cycles outside of the conventionally used production lines are necessary to manufacture the contact metallizations.
  • the figure shows a semiconductor device according to the invention.
  • a cross section through a light-emitting diode is shown.
  • a p-type GaAs substrate (1) On a p-type GaAs substrate (1) a p-type Al x Ga ⁇ _ x As layer (2) is applied, on which in turn an n-type Al x Ga ⁇ _ x As layer (3) is applied.
  • the underside of the p-type substrate (1) is covered over the entire area with a contact metallization (4) made of a non-precious metallic material.
  • a second contact metalization (5) made of a base metal material is applied, but only a small part of the surface of the n-type A ⁇ Ga ⁇ s layer (3) covered.
  • the contact metallizations (4, 5) consist, for example, of aluminum or an aluminum-based alloy.
  • the free surfaces of the GaAs substrate (1) and the Al x Ga ⁇ _ x As layers (2,3) have a roughening (6).
  • Such a method for producing a semiconductor device with roughened GaAs and Al x Ga ⁇ _ x As surfaces with an Al content of x ⁇ 0.40 and contact metallizations with aluminum surfaces has, for example, the following successive steps: a) producing the semiconductor body ; b) applying the contact metallizations made of aluminum; c) pre-cleaning the semiconductor surface to produce a hydrophilic semiconductor surface, for example by rinsing with water, possibly with detergent additive; d) roughening with an etching mixture of water peroxide (> 30%) and hydrofluoric acid (> 40%) (1000: 6) over a period of 1 to 2.5 minutes. ; e) Etching with a dilute mineral acid, such as sulfuric acid (15%), at 35 ° C for a period of 1 to 2 minutes.
  • a dilute mineral acid such as sulfuric acid (15%)
  • a method for producing a semiconductor device with roughened GaAs and Al x Ga ⁇ _ x As surfaces with an Al content of 0 ⁇ x ⁇ 1 and contact metallizations with aluminum surfaces has, for example, the following successive steps: a) producing the Semiconductor body; b) applying the contact metallization from aluminum, - c) pre-cleaning the semiconductor surface to produce a hydrophilic semiconductor surface, for example by rinsing with water, possibly with detergent additive; d) roughening with nitric acid (65%) at temperatures between 0 ° C and 30 ° C. Depending on the aluminum content x, the temperature and the etching time have to be adapted for the roughening.
  • the known wafer production processes are used to produce the semiconductor device described above. This means that no additional cost-increasing effort is required to manufacture the semiconductor device with a roughened surface.
  • the surface roughening is the last step at the end of the wafer manufacturing process after being separated into chips on a carrier film. If, for example, only the upper side or the upper side and partial areas of the lateral surface of the semiconductor body shown in the figure are to be roughened, the roughening is carried out before the separation in chips or after sawing the dividing lines between the chips.
  • the structures that have already been completed remain unaffected, so that no special processes are necessary for the coating, passivation and contacting of the chips.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
  • Led Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

Un dispositif semi-conducteur comprend un corps semi-conducteur dont au moins une partie de la surface non métallisée est rendue rugueuse. La couche métallisée de contact est constituée d'un matériau métallique non précieux, par exemple l'aluminium. Afin de rendre rugueuse la surface semi-conductrice, on met en ÷uvre un procédé qui n'attaque pas la surface de la couche métallisée de contact.
EP96901222A 1995-02-23 1996-01-31 Dispositif semi-conducteur a surface semi-conductrice rugueuse Withdrawn EP0811250A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19506323 1995-02-23
DE19506323A DE19506323A1 (de) 1995-02-23 1995-02-23 Halbleitervorrichtung mit aufgerauhter Halbleiteroberfläche
PCT/DE1996/000137 WO1996026550A1 (fr) 1995-02-23 1996-01-31 Dispositif semi-conducteur a surface semi-conductrice rugueuse

Publications (1)

Publication Number Publication Date
EP0811250A1 true EP0811250A1 (fr) 1997-12-10

Family

ID=7754848

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96901222A Withdrawn EP0811250A1 (fr) 1995-02-23 1996-01-31 Dispositif semi-conducteur a surface semi-conductrice rugueuse

Country Status (7)

Country Link
US (2) US6140248A (fr)
EP (1) EP0811250A1 (fr)
JP (1) JP3657270B2 (fr)
KR (1) KR19980702427A (fr)
DE (1) DE19506323A1 (fr)
TW (1) TW299456B (fr)
WO (1) WO1996026550A1 (fr)

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DE19506323A1 (de) * 1995-02-23 1996-08-29 Siemens Ag Halbleitervorrichtung mit aufgerauhter Halbleiteroberfläche
DE19509262C2 (de) * 1995-03-15 2001-11-29 Siemens Ag Halbleiterbauelement mit Kunststoffumhüllung und Verfahren zu dessen Herstellung
US6133589A (en) * 1999-06-08 2000-10-17 Lumileds Lighting, U.S., Llc AlGaInN-based LED having thick epitaxial layer for improved light extraction
JP3586594B2 (ja) * 1999-08-25 2004-11-10 シャープ株式会社 半導体発光素子およびその製造方法
DE19953839A1 (de) * 1999-11-09 2001-05-10 Paul Drude Inst Fuer Festkoerp Hocheffiziente UV-Emitter auf Nitridhalbleiterbasis
DE10051465A1 (de) 2000-10-17 2002-05-02 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Halbleiterbauelements auf GaN-Basis
TWI292227B (en) * 2000-05-26 2008-01-01 Osram Opto Semiconductors Gmbh Light-emitting-dioed-chip with a light-emitting-epitaxy-layer-series based on gan
WO2002041364A2 (fr) * 2000-11-16 2002-05-23 Emcore Corporation Boitiers a diode electroluminescente, a extraction de lumiere amelioree
KR20030052060A (ko) * 2001-12-20 2003-06-26 엘지전자 주식회사 발광 소자 및 그의 제조방법
TW576864B (en) * 2001-12-28 2004-02-21 Toshiba Corp Method for manufacturing a light-emitting device
JP3776824B2 (ja) * 2002-04-05 2006-05-17 株式会社東芝 半導体発光素子およびその製造方法
DE10234977A1 (de) 2002-07-31 2004-02-12 Osram Opto Semiconductors Gmbh Strahlungsemittierendes Dünnschicht-Halbleiterbauelement auf GaN-Basis
US6847057B1 (en) * 2003-08-01 2005-01-25 Lumileds Lighting U.S., Llc Semiconductor light emitting devices
WO2005041313A1 (fr) 2003-09-26 2005-05-06 Osram Opto Semiconductors Gmbh Puce semi-conductrice en couche mince emettant un rayonnement
US8748923B2 (en) 2005-03-14 2014-06-10 Philips Lumileds Lighting Company Llc Wavelength-converted semiconductor light emitting device
US7341878B2 (en) 2005-03-14 2008-03-11 Philips Lumileds Lighting Company, Llc Wavelength-converted semiconductor light emitting device
KR100735496B1 (ko) * 2006-05-10 2007-07-04 삼성전기주식회사 수직구조 질화갈륨계 ｌｅｄ 소자의 제조방법
US7670894B2 (en) * 2008-04-30 2010-03-02 Intel Corporation Selective high-k dielectric film deposition for semiconductor device
CN101630706B (zh) * 2008-07-16 2011-02-16 玉晶光电股份有限公司 正向出光型发光二极管结构
CN102130223B (zh) * 2010-12-06 2012-07-25 山东华光光电子有限公司 一种GaN基LED外延片表面粗化方法
TW201242122A (en) * 2011-04-15 2012-10-16 Chi Mei Lighting Tech Corp Light-emitting diode device
RU2569638C2 (ru) * 2011-08-05 2015-11-27 Востек, Инк. Светоизлучающий диод с наноструктурированным слоем и способы изготовления и применения
JP6250429B2 (ja) * 2014-02-13 2017-12-20 エスアイアイ・セミコンダクタ株式会社 半導体装置およびその製造方法
CN116799120A (zh) * 2023-08-28 2023-09-22 江西兆驰半导体有限公司 一种led芯片制备方法及led芯片

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Also Published As

Publication number Publication date
US6309953B1 (en) 2001-10-30
US6140248A (en) 2000-10-31
JP3657270B2 (ja) 2005-06-08
TW299456B (fr) 1997-03-01
KR19980702427A (ko) 1998-07-15
WO1996026550A1 (fr) 1996-08-29
JPH11500581A (ja) 1999-01-12
DE19506323A1 (de) 1996-08-29

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