EP0678839B1 - Circuit électrique pour le codage et le transmission de données de mesure - Google Patents

Circuit électrique pour le codage et le transmission de données de mesure Download PDF

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Publication number
EP0678839B1
EP0678839B1 EP95101404A EP95101404A EP0678839B1 EP 0678839 B1 EP0678839 B1 EP 0678839B1 EP 95101404 A EP95101404 A EP 95101404A EP 95101404 A EP95101404 A EP 95101404A EP 0678839 B1 EP0678839 B1 EP 0678839B1
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EP
European Patent Office
Prior art keywords
multiplex
local
electrical circuit
circuit arrangement
transmitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP95101404A
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German (de)
English (en)
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EP0678839A1 (fr
Inventor
Jens C/O Electromatic Industri A/S Neigaard
Ole C/O Electromatic Industri A/S Skovgaard
Kent C/O Electromatic Industri A/S Soerensen
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Carlo Gavazzi Services AG
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Carlo Gavazzi Services AG
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    • GPHYSICS
    • G08SIGNALLING
    • G08CTRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C15/00Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path
    • G08C15/06Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path successively, i.e. using time division
    • G08C15/12Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path successively, i.e. using time division the signals being represented by pulse characteristics in transmission link

Definitions

  • the present invention relates to an electrical circuit arrangement with at least two local transmission units for recording and coding of local measurement signals and for transmission of the coded measurement signals to a Central unit, the local transmission units each having a comparator Comparison of the local measurement signal with a reference value and trigger means for Have generation of a binary signal to be transmitted to the central unit.
  • Measurement signal an exact stochastic uniform distribution of the reference values required.
  • the prior art often an ergodic or stochastic random number generator used.
  • a serious disadvantage is that such, extreme complicated devices are difficult to control. It is also used a very large number of reference values generated by a random generator, in order to be able to assume the required uniform distribution of the reference values. This has the disadvantageous consequence, in particular, that the local Measurement signals over a longer period of time is essential.
  • An electrical circuit arrangement for Transmission and display of physical in electrical form Quantities or signals using binary pulse sequences are from the German patent specification DE-A-22 32 450 is known. From this document an arrangement of at least to be found in a comparator by at least one stochastic generator generated threshold values with the amplitudes of physical quantities or signals compares and binary decisions based on these comparisons to form the Output values meet, these output values occurring in the form of a pulse train.
  • the invention is based on the object, these known to improve electrical circuit arrangements such that the control of the Reference value is as simple, reliable and central as possible.
  • the underlying task several, not necessarily record, transmit and transmit independent measurements simultaneously to be able to process.
  • the central unit has a multiplex channel generator, Control means for determining the reference value and multiplex receiving means for recording and processing by the local Transmission units transmitted binary signals, and that the local Transmission units each processing means for processing the of the Control means set reference value and multiplex transmission means for transmitting the binary signal generated by the trigger means to the multiplex receiving means the central unit, wherein the multiplex transmission means are clearly assigned to the local transmission units.
  • the multiplex channel generator preferably a clock and a pulse generator has, by connecting to a multiplex two-wire line with both Multiplex receiving means of the central unit as well as with the local ones Transmission units connected, each of the local transmission units one Address in the multiplex two-wire system.
  • the multiplex two-wire line will be a simultaneous transmission of all of the local Measurement data determined transmission units guaranteed to the central unit. Due to the almost unlimited possibilities of channel selection in time multiplexing can use almost any number of local transmission units in this way can be connected to the central unit, however, due to the use the two-wire technology maintain the traceability of the circuit at all times remains.
  • the use of the multiplex two-wire method guarantees the simultaneous and equal provision and processing of accumulating data delivered by the respective local transmission units become.
  • the multiplex two-wire technology also enables this due to their very simple basic principle, the most varied and various uses and applications.
  • the Multiplex channel generator a pulse train, the pulses different Transmission time channels correspond, and both the multiplex transmission means as well as the multiplex receiving means have decoding means through which they activated during at least one transmission time channel assigned to them become.
  • This ensures the exact transmission of the determined and digitized Measurement data from the multiplex transmission means arranged in the local transmission units to the multiplex receiving means arranged in the central unit accomplished. Due to the identical arrangement of the decoding means both in the multiplex transmission means and in the multiplex reception means Here is a clear assignment of the respective local Data coming in transmission units to the corresponding receiving means in the central unit guarantees what is not only the desired transmission security guaranteed, but also significantly increases the transmission speed.
  • control means exist to determine the reference value from a one synchronization pulse Generating synchronization pulse generator, which is preferably a structural unit forms with the multiplex channel generator.
  • This one synchronization pulse per Pulse train is used by all local connected to the central unit Transmission units and in particular the processing equipment simultaneously recorded what the simple and safe operation of the central Control to determine the reference value guaranteed.
  • the processing means of local Transmission units advantageously a detector circuit, a counter and a digital / analog (D / A) converter.
  • the Comparator in the respective local transmission unit Difference value between the local measurement signal and the reference value switches those downstream of the comparator Trigger means by (i.e. binary signal value "1"), or disable (i.e. Binary signal value "0").
  • comparator and trigger means The digitalization of the analog measurement signals, for example, has been proven especially with regard to the speed and safety of the Data transmission as extremely advantageous, not least because digital Data transmission the susceptibility to faults and the frequency of errors is much lower than in the transmission of analog signals.
  • the Transmission means of the local transmission units to a multiplex transmitter transmits.
  • the receiving means of Central processing unit a multi-channel multiplex receiver, at least two counters and an evaluation circuit, with one counter each one local Transmission unit is assigned. This arrangement is an optimal Possible application for the multiplex method, because the sequence of individual pulse trains a simultaneous and error-free transmission of the local Measurement signals of all local transmission units connected to the central unit guaranteed in the shortest possible time.
  • Each of these n local transmission units 2 is supplied with a local, for example analog measurement signal UM 1 , UM 2 , ..., UM n .
  • the multiplex two-wire line 3 consists of two wires; For reasons of simplicity and clarity, the multiplex two-wire line 3 is thus identified by a line in FIGS. 1 to 9.
  • FIG. 2 shows a section of a block diagram of an inventive electrical circuitry.
  • the central unit 1 and one of several local transmission units 2 through the multiplex two-wire line 3 are connected.
  • the central unit 1 has a multiplex channel generator 4 on.
  • the central unit 1 further comprises a multi-channel multiplex receiver 5, counter 6 and an evaluation circuit, the present Embodiment consists of an evaluation unit 7 and a display unit 8.
  • the local transmission unit 2 also shown in FIG. 2 has one Detector circuit 9, a counter 10, a digital / analog (D / A) converter 11, a comparator 12, a trigger 13 and a multiplex transmitter 14.
  • the multiplex channel generator 4 arranged in the central unit 1 generates in periodic time intervals a pulse train 15 shown in Figure 3.
  • This pulse train 15 is composed of a synchronization pulse 16 and a sequence of at least two channel pulses 17a, 17b, ..., of which the one shown here Embodiment each a channel pulse 17a, 17b, ... one each of the Central unit 1 is assigned to connected local transmission units 2.
  • the immediately successive pulse trains 15 are transmitted via the multiplex two-wire line 3 to the individual local transmission units 2.
  • a detector circuit 9 arranged in each local transmission unit 2 opens the time window assigned to the respective local transmission unit 2 for the corresponding channel pulse, that is to say the detector circuit 9 arranged in the first local transmission unit 2 opens the time window for the channel pulse 17 a, that in the second local transmission unit 2 arranged detector circuit 9 opens the time window for the channel pulse 17b, etc.
  • the counter 10 sends to the digital / analog (D / A) converter 11 a digital signal which corresponds to a sequence of the bit sequences assigned to the decimal numbers 0 to 7.
  • the D / A converter 11 converts this digital signal into a corresponding analog signal, which is referred to as the reference value UR.
  • the difference value UD k between the, for example analog measurement signal UM k supplied to the local transmission unit 2 and the reference value UR is determined, the index k denoting the kth local transmission unit 2.
  • a trigger 13 downstream of the comparator 12 switches through, which corresponds to a binary signal value "1"
  • the trigger 13 for a non-positive difference value UD k ⁇ 0 disables (binary signal value "0").
  • the trigger 13 therefore serves to digitize the analog difference value UD k , each of the binary signals generated in it being transmitted as a channel pulse from the multiplex transmitter 14 on the channel A k to the multiplex receiver 5 arranged in the central unit 1.
  • This multiplex receiver 5 is set up for multi-channel operation, since it successively picks up the respective binary signal from all n local transmission units 2 as a channel pulse.
  • the multiplex channel generator 4 which activates the corresponding channel A k for the binary signal coming from the kth local transmission unit 2, that is to say all n local transmission units 2 in succession after the respective binary signal queried and this recorded by the multi-channel multiplex receiver 5.
  • the further evaluation of the respective binary signal is then carried out separately, ie channel-specifically in the counters 6, which are assigned to the evaluation unit 7. If necessary, the evaluation unit 7 is also followed by the display unit 8, which displays the data evaluated by means of counter 6 and evaluation unit 7 in a suitable form.
  • FIG. 4 shows an exemplary embodiment for the multiplex channel generator 4, an input stage 41, a trigger 42, a clock 43, an output stage 44, a pulse generator 45 and an encoding module 46.
  • the multiplex channel generator 4 belongs here to a digital pulse code on the Multiplex two-wire line 3 impress and so the entire electrical Circuit arrangement by clocking each individual module of the electrical Control circuit arrangement.
  • the multiplex channel generator 4 is used but also as a power supply for the multiplex transmitter 14, if this is not its own Power supply should have.
  • the multiplex channel generator 4 for the Generation of, for example, 8, 16, 32, 64 or 128 channels can be encoded.
  • the Input stage 41 detects whether the channel whose time window is currently open is activated by the multiplex transmitter 14. If this is the case, it changes Signal of the trigger 42 to the pulse generator 45, the pulse shape for the concerned, d. H. the activated channel.
  • the voltage signals are transmitted in a multiplex two-wire process with typical frequencies of the order of 1 kilohertz.
  • the pulse generator 45 generates pulse trains shown as examples in FIG 15, which are synchronized by means of the clock 43.
  • the number of with these Pulse trains 15 channels to be transmitted are, as mentioned above, determined by the coding module 46.
  • the output stage 44 which amplifies the signal and on the multiplex two-channel line 3 outputs, must be protected against short circuit, since the multiplex transmitter 14th the entire multiplex two-wire transmission system for a period of time that is in is about a sixth to a quarter of the time length of a channel pulse, shorts to indicate that input stage 144 of the one shown in FIG Multiplex transmitter 14 shown is activated.
  • FIG. 6 shows an embodiment for the multiplex transmitter 14, the an "AND" gate 141 with two inputs, a comparator 142, one Counter 143, an input stage 144, a coding module 145, a reset 146 and an input terminal 147, the comparator 142, the counter 143 and the coding module 145 are taken together as decoding means can.
  • the principle of operation of the multiplex transmitter 14, which is connected in parallel in the multiplex two-wire arrangement, is based on the fact that, when the input stage 144 is detected as open, ie activated, or closed, the multiplex transmitter 14 sends a signal to the multiplex channel generator 4, which in turn changes its pulse code from "0" to "1". This is done in the following ways:
  • the input stage 144 of the multiplex transmitter 14 is coded for a specific channel pulse by means of the coding module 145.
  • the counter 143 is used to monitor the digital pulses which are output by the multiplex channel generator 4, the counter 143 being reset by the reset device 146 as soon as the synchronization pulse 16 is detected.
  • the channel 142 for which the multiplex transmitter 14 is coded is compared by means of the comparator 142 with the stored number of channel pulses 17a, 17b,... If these two parameters are of equal size, the comparator 142 sends a signal to one of the two inputs of the "AND" gate circuit 141.
  • the other input of this "AND" gate circuit 141 is connected directly to the input stage 144 of the multiplex transmitter 14.
  • both inputs of the "AND” gate circuit 141 are activated, ie the output of the "AND” gate circuit 141 is at "high", the multiplex transmitter 14 closes for a period of time which is approximately one sixth to one quarter of the length of time of a channel pulse, the entire multiplex two-wire transmission system is short, whereupon the multiplex channel generator 4 is caused to change its pulse code during the encoded pulse time, this change being shown by way of example in FIG. If the input of the "AND” gate circuit 141 directly connected to the input stage 144 is not activated when its pulse code is reached, ie the output of the "AND” gate circuit 141 is at "low”, the output goes into a waiting cycle until the The next time input port 147 reaches its matching pulse code.
  • FIG. 7 shows an exemplary embodiment for a multiplex receiver 5, the one Detector 51, a comparator 52, a counter 53, an output stage 54 Encoding module 55, a reset 56 and an output terminal 57, wherein the comparator 52, the counter 53 and the coding module 55 together as Decoding means can be understood.
  • DIP dual-in-line
  • Figures 8 and 9 show two ways of connecting between the counter 10 and the D / A converter 11 in a local Transmission unit 2.
  • Figure 8 as well as in Figure 9 are each Exemplary embodiments are presented in which the counter 10 and the D / A converter 11 are connected by an 8-bit line.
  • the corresponding table has accordingly the following form: Bit sequence associated decimal number 0 0 0 0 1 0 0 4th 0 1 0 2nd 1 1 0 6 0 0 1 1 1 0 1 5 0 1 1 3rd 1 1 1 7
  • the right column of this table shows a stochastic fluctuation of the signal arriving at the input terminal of the D / A converter 11, so that the D / A converter 11 output analog reference signal UR no continuous, for example, has a monotonously increasing shape, but rather as desired arbitrarily, stochastically evenly fluctuates.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Analogue/Digital Conversion (AREA)

Claims (12)

  1. Circuit électrique comportant au moins deux unités locales de transmission (2) pour recevoir et pour coder des signaux de mesure locale et pour transmettre les signaux codés de mesure à une unité centrale (1), lesquelles unités locales de transmission (2) présentent chacune un comparateur (12) servant à comparer le signal de mesure locale à une valeur de référence, et un moyen de déclenchement (13) destiné à produire un signal binaire à transmettre à l'unité centrale (1),
       caractérisé
    a) en ce que l'unité centrale (1) présente
    a1) un générateur de voies multiplex (4) comportant
    a1.1) des moyens de variation servant à modifier la valeur de référence dans chaque unité locale de transmission (2),
    a1.2) des moyens d'adressage servant à désigner chaque unité locale de transmission (2), et
    a1.3) des moyens collecteurs afin de regrouper les signaux binaires transmis à partir des unités locales de transmission (2), et
    a2) des moyens récepteurs multiplex (5, 6, 7, 8) pour la réception et le traitement des signaux binaires transmis à partir des unités locales de transmission (2), et
    b) en ce que les unités locales de transmission (2) présentent chaque fois
    b1) des moyens de traitement (9, 10, 11) pour reconnaítre un ordre provenant de l'unité centrale (1), pour modifier la valeur de référence, pour exécuter cette modification et pour traiter la valeur de référence modifiée à partir du générateur de voies multiplex (4), et
    b2) des moyens de transmission multiplex (14) servant à transmettre le signal binaire, produit à partir des moyens de déclenchement (13), aux moyens récepteurs multiplex (5, 6, 7, 8) de l'unité centrale (1), les moyens de transmission multiplex étant chaque fois clairement coordonnés aux unités locales de transmission.
  2. Circuit électrique selon la revendication 1, caractérisé en ce que le générateur de voies multiplex (4) est relié, par raccordement à une ligne multiplex à deux fils (3), aussi bien aux moyens récepteurs multiplex (5, 6, 7, 8) de l'unité centrale (1) qu'aux unités locales de transmission (2), chacune des unités locales de transmission (2) ayant une adresse dans le système multiplex à deux fils.
  3. Circuit électrique selon la revendication 1 ou 2, caractérisé en ce que le générateur de voies multiplex (4) présente un générateur de cadencement (43) et un générateur d'impulsions (45).
  4. Circuit électrique selon l'une des revendications 1 à 3, caractérisé en ce que le générateur de voies multiplex (4) produit un train d'impulsions (15) dont les impulsions correspondent à différentes voies temporelles de transmission, et en ce que les moyens de transmission multiplex (14) et les moyens récepteurs multiplex (5, 6, 7, 8) présentent des moyens décodeurs (52, 53, 55), au moyen desquels ils sont activés pendant au moins une voie temporelle de transmission qui leur est associée.
  5. Circuit électrique selon l'une des revendications 1 à 4, caractérisé en ce que les moyens de commande consistent en un générateur d'impulsions de synchronisation produisant une impulsion de synchronisation.
  6. Circuit électrique selon la revendication 5, caractérisé en ce que le générateur de voies multiplex (4) et le générateur d'impulsions de synchronisation constituent une unité sur le plan de la conception.
  7. Circuit électrique selon l'une des revendications 1 à 6, caractérisé en ce que les moyens de traitement (9, 10, 11) des unités locales de transmission (2) présentent un circuit de détection (9), un compteur (10) et un convertisseur numérique/analogique (N/A) (11).
  8. Circuit électrique selon l'une des revendications 1 à 7, caractérisé en ce que le comparateur (12) établit, dans l'unité locale de transmission (2) correspondante, chaque fois la valeur de la différence (UD) entre le signal de mesure locale (UM) et la valeur de référence (UR).
  9. Circuit électrique selon la revendication 8, caractérisé en ce que les moyens de déclenchement (13) des unités locales de transmission (2) commutent en fonction du signe de la valeur de la différence (UD).
  10. Circuit électrique selon l'une des revendications 1 à 9, caractérisé en ce que les moyens de transmission des unités locales de transmission (2) présentent un émetteur multiplex (14), qui transmet aux moyens récepteurs multiplex (5, 6, 7, 8) de l'unité centrale (1) la valeur "1" ou bien "0" du signal fourni à partir des moyens de déclenchement (13).
  11. Circuit électrique selon l'une des revendications 1 à 10, caractérisé en ce que les moyens récepteurs multiplex (5, 6, 7, 8) de l'unité centrale (1) présentent un récepteur multiplex multivoie (5), au moins deux compteurs (6) et un circuit d'évaluation (7, 8), un compteur (6) étant chaque fois associé à une unité locale de transmission (2).
  12. Circuit électrique selon l'une des revendications 1 à Il, caractérisé en ce que la borne de sortie du compteur (10) pour le bit de poids le plus faible (LSB) est reliée à la borne d'entrée du convertisseur N/A (11) pour le bit de poids le plus fort (MSB), la borne de sortie du compteur (10) pour le bit de poids le plus faible suivant est reliée à la borne d'entrée du convertisseur N/A (11) pour le bit de poids le plus fort suivant, et ainsi de suite.
EP95101404A 1994-04-19 1995-02-02 Circuit électrique pour le codage et le transmission de données de mesure Expired - Lifetime EP0678839B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4413566 1994-04-19
DE4413566A DE4413566C2 (de) 1994-04-19 1994-04-19 Elektrische Schaltungsanordnung

Publications (2)

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EP0678839A1 EP0678839A1 (fr) 1995-10-25
EP0678839B1 true EP0678839B1 (fr) 1999-05-12

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EP (1) EP0678839B1 (fr)
DE (2) DE4413566C2 (fr)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004062525B4 (de) * 2004-12-24 2007-03-01 Messring Systembau Msg Gmbh Messdatenerfassungsvorrichtung für Prüfstände
DE102009005453A1 (de) 2009-01-21 2010-07-22 Ags Elektronik Gmbh Sensor-Bussystem

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2126598A5 (fr) * 1971-02-12 1972-10-06 Schlumberger Compteurs
DE2317851B2 (de) * 1973-04-10 1975-04-24 Grundig E.M.V. Elektro-Mechanische Versuchsanstalt Max Grundig, 8510 Fuerth Digital-Analog-Wandler
US4023139A (en) * 1974-10-24 1977-05-10 Gene Samburg Security control and alarm system
DE2823709A1 (de) * 1978-05-31 1979-12-06 Vdo Schindling Verfahren zur zeitmultiplexen uebertragung von daten analoger signale in einem bus-system
US4672374A (en) * 1985-06-20 1987-06-09 Firecom, Inc. System for bilateral communication of a command station with remotely located sensors and actuators
US5196823A (en) * 1986-04-24 1993-03-23 Multitecno S.P.A. Deratization apparatus with remote terminals
JPH01133494A (ja) * 1987-11-19 1989-05-25 Shinko Electric Co Ltd ビデオハードコピー装置の自動調整方法
DE3739725A1 (de) * 1987-11-24 1989-06-08 Vdo Schindling Anordnung zur ermittlung fehlerfreier digitaler elektrischer groessen bei einer mehrkanal-analog/digital-wandlung

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Publication number Publication date
EP0678839A1 (fr) 1995-10-25
DE4413566C2 (de) 1999-12-23
US5544166A (en) 1996-08-06
DE4413566A1 (de) 1995-10-26
DE59505880D1 (de) 1999-06-17

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