EP0489900A1 - Kristallisationsverfahren - Google Patents

Kristallisationsverfahren

Info

Publication number
EP0489900A1
EP0489900A1 EP91912797A EP91912797A EP0489900A1 EP 0489900 A1 EP0489900 A1 EP 0489900A1 EP 91912797 A EP91912797 A EP 91912797A EP 91912797 A EP91912797 A EP 91912797A EP 0489900 A1 EP0489900 A1 EP 0489900A1
Authority
EP
European Patent Office
Prior art keywords
gold
silicon
crystallisation
amorphous silicon
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP91912797A
Other languages
English (en)
French (fr)
Inventor
John Stoemenos
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BAE Systems Electronics Ltd
Original Assignee
GEC Marconi Ltd
Marconi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEC Marconi Ltd, Marconi Co Ltd filed Critical GEC Marconi Ltd
Publication of EP0489900A1 publication Critical patent/EP0489900A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02672Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using crystallisation enhancing elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B1/00Single-crystal growth directly from the solid state
    • C30B1/02Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing
    • C30B1/023Single-crystal growth directly from the solid state by thermal treatment, e.g. strain annealing from solids with amorphous structure
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02595Microstructure polycrystalline

Definitions

  • This invention relates to the crystallisation of amorphous silicon.
  • Figure 1 shows a plan view taken after fifteen minutes anneal, with a diffraction inset showing amorphous material. One minute later, rapid crystallisation occurred resulting in micron size crystal formation, see Figure 2. Area A, as seen in Figure 3, is a large single crystal as can be seen from the diffraction pattern.
  • a number of black contamination spots are visible on all of the plan view figures relating to in situ-heating, and serve as position markers. Their presence is normal.
  • TEM, XTEM and SEM were used to characterise the crystallisation resulting from annealing amorphous silicon (a-Si ) films prepared using Plasma Enhanced Chemical Vapour Deposition (PECVD) overlying a thin gold film on a thermally-oxidised silicon base.
  • a-Si amorphous silicon
  • PECVD Plasma Enhanced Chemical Vapour Deposition
  • the a-Si thickness was estimated as l ⁇ m and the gold thickness as O.l ⁇ m.
  • the a-Si was hydrogenated during deposition.
  • Sample A is as described above.
  • Sample B the gold was distributed in an array of 50 ⁇ diameter dots in a lattice of several millimetres spacing.
  • Sample C was the control sample in which no gold was present.
  • Samples A, B and C were annealed at 600°C for 24hrs in a furnace after being sealed in an evacuated ampoule.
  • the film was completely amorphous.
  • a gold layer was present.
  • Gold dots Annealed at 600°C for 24 hrs.
  • the microstructure was mostly a-Si with areas of defective mosaic polysilicon. SEM impression (secondary image, no tilt, cleaning or coating).
  • Films of amorphous silicon of thickness 300nm were deposited onto silicon wafers by LPCVD, rather than PECVD as used before, in order to reduce the hydrogen content and thereby reduce the damage to the film from hydrogen evolution during the anneal/crystallisation. These films were cleaned by plasma etching and then coated with 60nm of gold. Samples were taken from these wafers and were placed in quartz ampoules which were evacuated and then annealed for 24 hours, some at 500°C and some at 600°C.
  • FIGS 11,12 are cross sectional TEMs from the hazy areas of the sample which show that a film of pure silicon has been formed over the surface of the sample and a gold/silicon alloy nearest the substrate. Between pure silicon film and the gold/silicon alloy is a thin interlayer about 1.5nm thick. In addition, a number of small gold particles remain on the surface of the sample.
  • FIG. 13 A plan view micrograph (Figure 13) from the same area shows a mixture of silicon and gold crystallites, but diffraction patterns from the film reveal the presence of substantial single crystalline areas (see insets to Figures 11 and 13). This is attributed to the "single" crystalline silicon overlayer, which is clearly revealed by the cross sectional mi rographs.
  • the gold in order for this process to occur, the gold must be in intimate contact with the amorphous silicon, i.e. intermediate contamination layers of, for example, native oxide must not be present or must be very thin. Except in so far as it may affect the nature of any intermediate layers, it does not matter whether the gold is on top of the silicon or vice versa. Both positions have been shown to be effective.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Thermal Sciences (AREA)
  • Recrystallisation Techniques (AREA)
EP91912797A 1990-07-03 1991-07-03 Kristallisationsverfahren Withdrawn EP0489900A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9014723 1990-07-03
GB909014723A GB9014723D0 (en) 1990-07-03 1990-07-03 Crystallisation process

Publications (1)

Publication Number Publication Date
EP0489900A1 true EP0489900A1 (de) 1992-06-17

Family

ID=10678581

Family Applications (1)

Application Number Title Priority Date Filing Date
EP91912797A Withdrawn EP0489900A1 (de) 1990-07-03 1991-07-03 Kristallisationsverfahren

Country Status (4)

Country Link
EP (1) EP0489900A1 (de)
JP (1) JPH05501701A (de)
GB (2) GB9014723D0 (de)
WO (1) WO1992001089A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3497198B2 (ja) * 1993-02-03 2004-02-16 株式会社半導体エネルギー研究所 半導体装置および薄膜トランジスタの作製方法
US6997985B1 (en) 1993-02-15 2006-02-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US5639698A (en) * 1993-02-15 1997-06-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US6730549B1 (en) 1993-06-25 2004-05-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for its preparation
TW264575B (de) * 1993-10-29 1995-12-01 Handotai Energy Kenkyusho Kk
JP2860869B2 (ja) * 1993-12-02 1999-02-24 株式会社半導体エネルギー研究所 半導体装置およびその作製方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003916A1 (en) * 1985-12-19 1987-07-02 Allied Corporation Method of forming single crystal silicon using spe seed and laser crystallization
AU616739B2 (en) * 1988-03-11 1991-11-07 Unisearch Limited Improved solution growth of silicon films
DE58905580D1 (de) * 1988-03-24 1993-10-21 Siemens Ag Verfahren zum Herstellen von polykristallinen Schichten mit grobkristallinem Aufbau für Dünnschichthalbleiterbauelemente wie Solarzellen.

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9201089A1 *

Also Published As

Publication number Publication date
GB9014723D0 (en) 1990-08-22
WO1992001089A1 (en) 1992-01-23
GB2245552A (en) 1992-01-08
JPH05501701A (ja) 1993-04-02
GB9114398D0 (en) 1991-08-21

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