EP0344510A2 - Stummschaltung für Audioverstärker - Google Patents

Stummschaltung für Audioverstärker Download PDF

Info

Publication number
EP0344510A2
EP0344510A2 EP89108742A EP89108742A EP0344510A2 EP 0344510 A2 EP0344510 A2 EP 0344510A2 EP 89108742 A EP89108742 A EP 89108742A EP 89108742 A EP89108742 A EP 89108742A EP 0344510 A2 EP0344510 A2 EP 0344510A2
Authority
EP
European Patent Office
Prior art keywords
voltage
input
divider
circuit according
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP89108742A
Other languages
English (en)
French (fr)
Other versions
EP0344510A3 (en
EP0344510B1 (de
Inventor
Edoardo Botti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Publication of EP0344510A2 publication Critical patent/EP0344510A2/de
Publication of EP0344510A3 publication Critical patent/EP0344510A3/en
Application granted granted Critical
Publication of EP0344510B1 publication Critical patent/EP0344510B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/34—Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems
    • H03G3/348—Muting in response to a mechanical action or to power supply variations, e.g. during tuning; Click removal circuits

Definitions

  • This invention relates to a muting circuit for audio amplifiers having first and second input stages, being supplied a supply voltage through a current source, with respective outputs connected in parallel with each other to the input of an output stage and having a signal input applied to the second stage.
  • the signals which appear at the input not to be passed to the output during the period immediately following the amplifier turning on. During that period, in fact, spurious signals are usually present at the input which originate from apparatus upstream of the amplifier and generate noise in the loudspeaker connected downstream from the amplifier.
  • mute and its derivatives hereinafter to denote a muted operational state in which the amplifier, while being kept alive, outputs none of the signals which appear at the input.
  • the prior art currently provides muting circuits which, while being in several ways advantageous, are only able to bring the amplifier to a muted state with the amplifier on.
  • the technical problem that underlies this invention is to provide a muting circuit for audio amplifiers which has such design and performance characteristics as to meet the demands specified above, while overcoming the limitations of the prior art circuits.
  • a circuit as indicated being characterized in that it comprises a means of switching over the power supply between the first and second stages operatively linked to a comparator means effective to compare the values of a reference voltage, associated with the supply voltage pattern with a predetermined delay, to respective predetermined lower voltage values than the supply voltage.
  • a muting circuit for an audio amplifier 2 is a muting circuit for an audio amplifier 2.
  • the amplifier 2 comprises first 3 and second 4 input stages having their respective outputs parallel connected to the input of an output stage 5.
  • the output OUT of that stage 5 is intended for connection to an external loudspeaker, not shown because conventional.
  • the amplifier 2 has a signal input IN applied directly to the second stage 4.
  • a supply pole Vc′ is provided for the amplifier 2; that pole Vc′ is connected to the input stages 3 and 4 via a current source A1 and a switch-over means 10.
  • the latter comprises a change-over switch having a movable contact between two fixed terminals A and B, respectively, each connected to a corresponding stage, 4 and 3.
  • the means 10 is operatively linked to the output of a logic gate 9 of the AND type having two inputs, each connected to a respective output of a voltage comparator.
  • Vd the voltage Vd follows with a predetermined delay the pattern of a supply voltage Vc to the circuit 1, as explained hereinafter.
  • the reference voltage Vd is derived, for example, from a positive supply pole Vc via a resistive divider 8 which comprises a resistor pair, Rd1 and Rd2, connected serially to each other between that pole Vc and ground.
  • a capacitor C is connected between the center tap of the divider 8 and ground to provide, in combination with the resistor Rd2, a parallel RC circuit 11 to permit of the voltage Vd tapping off the divider center.
  • the circuit 1 further comprises a first voltage divider 17 formed of a pair of serially interconnected resistors R5 and R6 between the positive pole Vc and ground.
  • the non-inverting input of the comparator 6 is connected between such resistors R5 and R6 for supply with a voltage Va.
  • a second divider 19 comprising a second pair of resistors R7 and R8 interconnected in series, is connected between the pole Vc and the collector C5 of an npn-type transistor T5 having the emitter E5 grounded. Between such resistors R7 and R8, the inverting input of the second comparator 7 is connected for supply with a voltage Vb.
  • the base B5 of the transistor T5 is connected to the pole Vc via the series of a Zener diode Dz and a resistor R9. Under operational conditions, across the diode Dz there occurs a voltage drop Vz, while a voltage drop Vbe of 0.7 Volts occurs between the base B5 and the emitter E5 of the transistor T5.
  • the comparator 6 comprises a pair of transistors T1 and T2 of the pnp type which have respective emitters E1 and E2 connected to each other, via corresponding resistors R1 and R2, and to the source A1 of current I.
  • the base B1 of the transistor T1 is connected to the reference voltage pole Vd, and the base B2 of the other transistor is connected to the voltage pole Va.
  • the second comparator 7 comprises a transistor pair, T3 and T4, of the pnp type having their emitters E3 and E4 connected to each other, via respective resistors R3 and R4, and to the collector C1 of the transistor T1.
  • the resistors R1, R2, R3 and R4 perform the sole function of restricting the flow of current from one transistor to another in each comparator.
  • the base B3 of the transistor T3 is connected to the pole Vd, while the base B4 of the other transistor, T4, is connected to the voltage pole Vb.
  • the collector C3 of the transistor T3 is connected directly to supply a current Ib to the first stage 3 of the amplifier 2. Also connected to that collector C3, and hence to the stage 3, is the collector C2 of the transistor T2 incorporated to the first comparator 6.
  • the collector C4 of the transistor T4 is instead connected to the second stage 4 of the amplifier 2 to supply it with a current Ia.
  • the value of the voltage Va whose pattern is illustrated by the graph 13 is made larger than the value of the voltage Vb, illustrated by the graph 14.
  • the reference voltage Vd will follow with a predetermined delay, as illustrated by the graph 15, the pattern of the supply voltage Vc, to attain a steady state condition at a value which is lower than Va but higher than Vb.
  • FIGS 4 and 5 Shown in Figures 4 and 5 are the graphs 16 and 18 which illustrate versus time the patterns of the values of the currents Ib and Ia flowing to the inputs of the stages 3 and 4, respectively, of the amplifier 2. Indicated at t1 and t2 are the times when a change from the on to the off state, and vice versa, of the amplifier 2 takes place.
  • the current I from the source A1 is supplied, via the comparators 6 and 7, to the corresponding input stage, 3 and 4, of the amplifier 2.
  • the current I will flow through the transistors T1 and T3 to power the first stage 3 until (t1) the voltage Vd is held below the voltage value Vb.
  • the transistors T2 and T4 will not be conducting and the second stage 4 be off, thereby the signal applied to the input IN of the amplifier 2 will not be passed to the output OUT. Accordingly, the amplifier will be in a mute condition.
  • the circuit of this invention enables the amplifier to be muted over respective predetermined time periods, one immediately after turning on and the other preceding turning off.
  • the transistor T5 will be non-conductive and on the base B4 of the transistor T4 there will be such a voltage value as to hold this transistor also non-conductive. In such situations, the amplifier 2 will be in a muted condition, thereby the circuit of this invention attains the added objective of muting the audio amplifier even in those instances when the supply voltage is lower than a predetermined minimum value.
  • the circuit according to this invention solves, therefore, the technical problem in a simple and effective way with a reduced circuit overgrow.

Landscapes

  • Amplifiers (AREA)
EP89108742A 1988-06-02 1989-05-16 Stummschaltung für Audioverstärker Expired - Lifetime EP0344510B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT2084888 1988-06-02
IT20848/88A IT1217773B (it) 1988-06-02 1988-06-02 Circuito di ammutolimento per amplificatori audio

Publications (3)

Publication Number Publication Date
EP0344510A2 true EP0344510A2 (de) 1989-12-06
EP0344510A3 EP0344510A3 (en) 1990-12-05
EP0344510B1 EP0344510B1 (de) 1995-02-01

Family

ID=11172975

Family Applications (1)

Application Number Title Priority Date Filing Date
EP89108742A Expired - Lifetime EP0344510B1 (de) 1988-06-02 1989-05-16 Stummschaltung für Audioverstärker

Country Status (5)

Country Link
US (1) US4956616A (de)
EP (1) EP0344510B1 (de)
JP (1) JPH02111110A (de)
DE (1) DE68920909T2 (de)
IT (1) IT1217773B (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430236A2 (de) * 1989-11-30 1991-06-05 Kabushiki Kaisha Toshiba Leistungsverstärker
EP0642247A2 (de) * 1993-09-02 1995-03-08 TEMIC TELEFUNKEN microelectronic GmbH Lauthöreinrichtung für Fernsprechgeräte

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5426394A (en) * 1993-03-12 1995-06-20 Thomson Consumer Electronics S.A. Sound intermediate frequency amplifier for a broadcast receiver
DE69406108T2 (de) * 1994-04-15 1998-02-12 St Microelectronics Srl Niederfrequenzverstärker
US6316993B1 (en) * 1999-02-22 2001-11-13 Texas Instruments Incorporated Analog circuitry for start-up glitch suppression
TWI320996B (en) * 2006-07-06 2010-02-21 Tatung Co Pop sound prevention module and speaker apparatus thereof
US7460441B2 (en) * 2007-01-12 2008-12-02 Microchip Technology Incorporated Measuring a long time period
CN102868956B (zh) * 2012-09-24 2015-02-11 深圳市纳芯威科技有限公司 噪声门电路以及音频功放设备
CN113824470A (zh) * 2021-09-26 2021-12-21 海南宝通实业公司 一种跳频收信话音质量的改善方法及装置
CN115379344A (zh) * 2022-09-14 2022-11-22 重庆长安汽车股份有限公司 车载音响的静音电路、装置及车辆

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3840820A (en) * 1971-12-17 1974-10-08 Sony Corp Muting circuit
US4034268A (en) * 1975-11-10 1977-07-05 Heath Company Speaker protection circuit
JPS60229507A (ja) * 1984-04-27 1985-11-14 Matsushita Electric Ind Co Ltd ミユ−ト回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5935522B2 (ja) * 1979-10-16 1984-08-29 ヤマハ株式会社 電力増幅器
JP3546335B2 (ja) * 1994-06-21 2004-07-28 生化学工業株式会社 注射具のシリンダ筒のための補助具

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3840820A (en) * 1971-12-17 1974-10-08 Sony Corp Muting circuit
US4034268A (en) * 1975-11-10 1977-07-05 Heath Company Speaker protection circuit
JPS60229507A (ja) * 1984-04-27 1985-11-14 Matsushita Electric Ind Co Ltd ミユ−ト回路

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
& JP-A-60 229 507 (MATSUSHITA DENKI SANGYO K.K.) 14-11-1985 *
IEEE TRANSACTIONS ON CONSUMER ELECTRONICS, vol. CE-32, no. 3, August 1986, pages 651-657, IEEE, New York, US; Y. FUKUSHIMA et al.: "Integrated circuits for tape recorder operated by single dry battery" *
PATENT ABSTRACTS OF JAPAN, vol. 10, no. 87 (E-393)[2144], 5 April 1986; & JP - A - 60 229 507 (MATSUSHITA DENKI SANGYO K.K.) 14-11-1985 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0430236A2 (de) * 1989-11-30 1991-06-05 Kabushiki Kaisha Toshiba Leistungsverstärker
EP0430236A3 (en) * 1989-11-30 1991-10-16 Kabushiki Kaisha Toshiba Power amplifier
EP0642247A2 (de) * 1993-09-02 1995-03-08 TEMIC TELEFUNKEN microelectronic GmbH Lauthöreinrichtung für Fernsprechgeräte
EP0642247A3 (de) * 1993-09-02 1996-03-13 Telefunken Microelectron Lauthöreinrichtung für Fernsprechgeräte.

Also Published As

Publication number Publication date
DE68920909D1 (de) 1995-03-16
EP0344510A3 (en) 1990-12-05
US4956616A (en) 1990-09-11
JPH02111110A (ja) 1990-04-24
IT1217773B (it) 1990-03-30
EP0344510B1 (de) 1995-02-01
IT8820848A0 (it) 1988-06-02
DE68920909T2 (de) 1995-10-05

Similar Documents

Publication Publication Date Title
EP0344510A2 (de) Stummschaltung für Audioverstärker
EP0623997B1 (de) Mit niedriger Versorgungsspannung arbeitender, eine Hysteresis aufweisender Komparator
EP0084722B1 (de) Differenzverstärkerschaltungsanordnung
KR100366867B1 (ko) 누설저항 테스트용 회로장치
US4406955A (en) Comparator circuit having hysteresis
US5617285A (en) Circuit configuration for detecting undervoltage
US6356061B1 (en) Fully integrated linear regulator with darlington bipolar output stage
US4970452A (en) Integrated circuit comprising a switchable current generator
JPH0637550A (ja) ターンオン制御回路
US20030222681A1 (en) Comparator
KR100287613B1 (ko) 전원제거시필요동작을유지시키는스위칭회로를구비한제어시스템
JPH0695611B2 (ja) 開閉可能電流源回路
JP4221123B2 (ja) レギュレータ回路
US5146114A (en) Comparator circuit
US4764688A (en) Output current darlington transistor driver circuit
JP2870323B2 (ja) ウインドウコンパレータ
EP0496277B1 (de) Ausgangstufe für eine digitale Schaltung
JPS6022862A (ja) 電源回路
JPS5914828B2 (ja) デコ−ダ回路
KR0135186Y1 (ko) 개선된 출력속도를 가지는 비교기회로
JPH0793561B2 (ja) トライステ−ト信号−バイナリ信号変換回路
JPH0434849B2 (de)
JPH04812A (ja) 電子回路
USRE32479E (en) Feedback amplifier or threshold value switch for a current feed differential stage
JP3002553B2 (ja) アナログ・スイッチ回路

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB NL SE

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): DE FR GB NL SE

17P Request for examination filed

Effective date: 19901130

17Q First examination report despatched

Effective date: 19930803

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB NL SE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Effective date: 19950201

REF Corresponds to:

Ref document number: 68920909

Country of ref document: DE

Date of ref document: 19950316

ET Fr: translation filed
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Effective date: 19950501

NLV1 Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
REG Reference to a national code

Ref country code: FR

Ref legal event code: D6

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20020508

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20020515

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20020522

Year of fee payment: 14

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20030516

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20031202

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20030516

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20040130

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST