EP0293235A2 - Anzeigegerät und Ansteuersystem dafür - Google Patents

Anzeigegerät und Ansteuersystem dafür Download PDF

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Publication number
EP0293235A2
EP0293235A2 EP88304846A EP88304846A EP0293235A2 EP 0293235 A2 EP0293235 A2 EP 0293235A2 EP 88304846 A EP88304846 A EP 88304846A EP 88304846 A EP88304846 A EP 88304846A EP 0293235 A2 EP0293235 A2 EP 0293235A2
Authority
EP
European Patent Office
Prior art keywords
scanning
electrodes
display device
frame
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP88304846A
Other languages
English (en)
French (fr)
Other versions
EP0293235B1 (de
EP0293235A3 (en
Inventor
Takazi Numao
Kunihiko Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of EP0293235A2 publication Critical patent/EP0293235A2/de
Publication of EP0293235A3 publication Critical patent/EP0293235A3/en
Application granted granted Critical
Publication of EP0293235B1 publication Critical patent/EP0293235B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0224—Details of interlacing
    • G09G2310/0227—Details of interlacing related to multiple interlacing, i.e. involving more fields than just one odd field and one even field
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes

Definitions

  • the present invention is effective for the condition of 60 > in which "r" is the time required for rewriting the picture elements in one horizontal scanning period.
  • a display device such as an X-Y matrix type liquid crystal dis­play panel contains a pair of insulating substrates with a liquid crystal layer sandwiched therebetween.
  • "M" pcs. of scanning electrodes are provided on the inner side of one of the substrates, and "N” pcs. of signal electrodes on the inner side of the other substrate, the scanning electrodes crossing the signal electrodes at a right angle.
  • the dis­play device of the present invention provides an incomplete memory characteristic and takes "r" seconds to rewrite the picture elements in one horizontal scanning period.
  • An example of a substrate with an incomplete memory character­istic is ferrodielectric liquid crystal.
  • Image data to be supplied to the signal electrodes Y1, Y2, ... Y640 is sent in form of input signals Ei through a terminal 3 to a shift register 6 which comprises D flip flops R1, R2, ... R640 corresponding to the signal elec­trodes respectively.
  • the input signals Ei are applied to the data terminals of the D flip flops R1, R2, ... R640.
  • a basic clock pulse signal C is supplied from a converter cir­cuit 2 to the clock terminals of the D flip flops R1, R2, ... R640 so that data signals are output sequentially from the D flip flops R1, R2, ... R640 in this order.
  • the data signals thus output pass through D flip flops r1, r2, ...
  • the D flip flop b1 On receiving a selection signal and a horizontal clock pulse signal, the D flip flop b1 supplies an output equiva­lent to the selection signal to the following D flip flop b K+1 simultaneously as it supplies rewrite signal to the scanning electrode L1.
  • the D flip flop b K+1 on receiving the signal output from the D flip flop b1 and a horizontal clock pulse signal C1, outputs rewrite signal to the scan­ning electrode L K+1 and simultaneously supplies an output equivalent to the selection signal to the following D flip flop.
  • the scan­ning electrodes of the same order in all groups are rewrit­ten sequentially in the same frame period.
  • the first scanning electrodes of the groups are scanned first, and the second scanning electrodes of the groups are scanned next. This process is repeated until the K′th electrode ot the groups are scanned.
  • 2P′ scanning electrodes are scanned in each time, and the scanning operation is con­ducted K′ times to rewrite the picture on an entire display panel divided into the first and the second display blocks.
  • the selection signals U1 are sup­plied to D flip flops b1 and b101, and the selection signals U2 to D flip flops b2 and b102.
  • the output from the D flip flop b1 is given to the first scanning electrode L1 via a scanning electrode driver a1.
  • the output from the D flip flop b101 is given to the scanning electrode L101 in the second display block 1B via a scanning electrode driver a101.
  • D flip flops b3, b5, ... b99 are connected in series after the D flip flop b1, but they are not shown in Fig. 3.
  • selection signals U1 are supplied to the data terminals of the D flip flops b1 and b101.
  • the D flip flops b1 and b101 supply the scanning electrodes L1 and L101 with the output P1 shown in Fig. 5.
  • the outputs P1 are also input to the data terminals of the following D flip flops b3 and b103 (not shown).
  • the D flip flops b3 and b103 output signals P3 of Fig. 5 to the scanning electrodes L3 and L103.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)
EP19880304846 1987-05-29 1988-05-27 Anzeigegerät und Ansteuersystem dafür Expired - Lifetime EP0293235B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP133816/87 1987-05-29
JP62133816A JP2635967B2 (ja) 1987-05-29 1987-05-29 強誘電性液晶デバイスの駆動方法

Publications (3)

Publication Number Publication Date
EP0293235A2 true EP0293235A2 (de) 1988-11-30
EP0293235A3 EP0293235A3 (en) 1990-03-07
EP0293235B1 EP0293235B1 (de) 1995-05-03

Family

ID=15113712

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19880304846 Expired - Lifetime EP0293235B1 (de) 1987-05-29 1988-05-27 Anzeigegerät und Ansteuersystem dafür

Country Status (3)

Country Link
EP (1) EP0293235B1 (de)
JP (1) JP2635967B2 (de)
DE (1) DE3853697T2 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5206632A (en) * 1989-09-11 1993-04-27 Deutsche Thomson-Brandt Gmbh Actuating circuit for a liquid crystal display
US5289173A (en) * 1990-09-27 1994-02-22 Sharp Kabushiki Kaisha Display control method having partial rewriting operation

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57201294A (en) * 1981-06-04 1982-12-09 Suwa Seikosha Kk Matrix type video display unit
JPS6180226A (ja) * 1984-09-28 1986-04-23 Toshiba Corp アクテイブ・マトリツクス駆動装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5206632A (en) * 1989-09-11 1993-04-27 Deutsche Thomson-Brandt Gmbh Actuating circuit for a liquid crystal display
US5289173A (en) * 1990-09-27 1994-02-22 Sharp Kabushiki Kaisha Display control method having partial rewriting operation

Also Published As

Publication number Publication date
JPS63298286A (ja) 1988-12-06
JP2635967B2 (ja) 1997-07-30
EP0293235B1 (de) 1995-05-03
DE3853697D1 (de) 1995-06-08
DE3853697T2 (de) 1996-01-11
EP0293235A3 (en) 1990-03-07

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