EP0268953A2 - Elektrische Anordnung - Google Patents

Elektrische Anordnung Download PDF

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Publication number
EP0268953A2
EP0268953A2 EP87116785A EP87116785A EP0268953A2 EP 0268953 A2 EP0268953 A2 EP 0268953A2 EP 87116785 A EP87116785 A EP 87116785A EP 87116785 A EP87116785 A EP 87116785A EP 0268953 A2 EP0268953 A2 EP 0268953A2
Authority
EP
European Patent Office
Prior art keywords
electrical
accordance
electrical conductors
tip
root
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP87116785A
Other languages
English (en)
French (fr)
Other versions
EP0268953A3 (en
EP0268953B1 (de
Inventor
John Patrick Simpson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0268953A2 publication Critical patent/EP0268953A2/de
Publication of EP0268953A3 publication Critical patent/EP0268953A3/en
Application granted granted Critical
Publication of EP0268953B1 publication Critical patent/EP0268953B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3421Leaded components
    • H05K3/3426Leaded components characterised by the leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0271Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09418Special orientation of pads, lands or terminals of component, e.g. radial or polygonal orientation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10704Pin grid array [PGA]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10742Details of leads
    • H05K2201/1075Shape details
    • H05K2201/10757Bent leads
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • This invention relates to an electrical assembly with a strain relief device for use in mounting an electronic component to the surface of a printed circuit board.
  • one solution is to mount integrated circuit chips to a substrate which, in turn, is mounted to the surface of a printed circuit board.
  • a vehicle for accomplishing this goal has incorporated metalliz­ed ceramic substrates, as taught in United States Patent No. 3,921,285, issued to Krall and assigned to the present assignee, which comprise a rigid planar ceramic chip carrier to which is attached a rigid silicon integrated circuit chip.
  • Dual in-line packages are conventionally mounted to the surface of printed circuit boards. Generally these devices are rectangular and have one row of electrically conductive leads attached to each of the two longest edges. The amount of cir­cuitry and the complexity thereof are, of course, limited to that for which two parallel rows of leads are adequate.
  • the leads or pins must perform two functions: provide a mechanical, physical link between the chip, through the ceramic substrate, to the board; and provide an electrical connection so that circuitry on the chip can communicate with electrically conductive paths on the surface of or within the board.
  • the substrates themselves tend to be relatively rigid and inflexible, but the thermal coefficients of expansion differ between the material of which a printed circuit board is comprised and a second material of which a substrate to be mounted is comprised, causing a strain therebetween.
  • an epoxy printed circuit board tends to expand at as much as five times the rate of ceramic that is used to form a substrate.
  • flexure of the printed circuit board and other stresses such as mechanical vibration, shock and torque can also occur, giving rise to strain.
  • Shape of a strain relief mechanism is crucial in obtaining relative movement of two ends of the structure without exceeding the modulus of elasticity.
  • the helical structure of an automobile road spring accomplishes such a shock absorbing function in a relatively small amount of space.
  • a pin of sufficient length to provide strain relief can be folded, in accordance with the present invention hereinafter further described, in order to reduce vulnerability of short circuiting and to provide movement along the Z-axis (i.e., to provide vertical compliance within a reason­able length).
  • helical winding is difficult to implement and has electrical disadvantages.
  • Resilient pins or wires are used to connect the solder balls of chips to pads on a surface of a substrate. Once again, the chips themselves are connected to a frame structure. No mechanical connection is made by means of the resilient pins.
  • solder-Filled Elastomeric Spacer An article titled "Solder-Filled Elastomeric Spacer" by K. Hin­richsmeyer et al, IBM Technical Disclosure Bulletin, Vol. 27, No. 8, page 4855 (January, 1985) discloses a solder-filled elastomeric spacer which permits soldering semiconductor chips to substrates having a thermal coefficient of expansion different than that of the semiconductor material. Solder strings accommodate mechanical tensions resulting from the different thermal coefficients of thermal expansion. It is the ductility of solder - a plastic deformation phenomenon - that provides tension relief to this structure.
  • United States Patent No. 4,396,935 issued to Schuck discloses an integrated circuit package for flat circuit elements such as chips and an electrical connector for receiving such a package.
  • the electrical connector is a cylindrically shaped hollow socket.
  • the inner cylindrical wall contains resilient pin-like connec­tions arranged in a circle for making contact with the corresponding conductor of the integrated circuit package.
  • Such a configuration of pins is normally used to form wiping contacts, wherein one electrical contact or group of contacts brushes or wipes against a second contact or group of contacts. Fixed connections are not normally associated with such a connector apparatus.
  • the invention as claimed provides an electrical assembly with a strain relief device for use in mounting an integrated circuit chip by means of a substrate to a printed circuit board.
  • an electrical assembly having an integrated circuit package which has a plurality of electrical conductors fixed there­to.
  • the electrical conductors form mechanical and electrical connections.
  • Each of the electrical conductors has a root at one end and a tip at the other end.
  • the root of each conductor is attached to the integrated circuit package to form a fixed electrical and mechanical connection.
  • the tip of each conductor is adapted to be connected to a surface at a predetermined location.
  • Each of the electrical conductors has at least two bends between the root and the tip for providing strain relief when the tip is connected to a surface.
  • FIGURE 1 there is provided a generally planar board 10 fabricated from epoxy and glass or similar materials that are electrically non-conducting. Embedded in the board 10 are layers of copper 11 or similar electrically conductive material. The upper surface of the board 12 has a pattern of electrically conductive pads 13 forming electrical and mechanical connections to the board 10. Copper is most commonly used to form such pads 13 but other materials could be used.
  • the package 14 has a cap 14a with lower edge 15 which is sub­stantially parallel to the upper surface 12 of the board 10.
  • a substrate 16 fabricated from ceramics in the preferred embodiment.
  • the substrate 16 is generally rectangular having a surface area in the range of 1,61 to 22,86 cm2.
  • the lower edge 15 of the package cap 14a need not extend below the substrate 16 and need not even be present.
  • Mounted on the substrate 16 by solder or other suitable means is an integrated circuit chip or similar electronic component or device 18. It should be understood that any appropriate device can be used in conjunction with this invention, not necessarily limited to electrical components. For example, optical devices for which strain relief is required can also take advantage of the present invention.
  • the substrate 16 has a plurality of holes 20 drilled or etched completely through the substrate 16.
  • the most convenient and conventional shape of these holes 20 is circular, but other shapes can be formed, such as triangles, rectangles and polygons. These holes 20 are known as pin holes.
  • pins 22 Extending completely through the pin holes 20 of the substrate 16 are relatively thin pins 22.
  • pins 22 have a diameter in the range of 0,25 and 0,5 mm.
  • the pins 22 are fabricated of an electrically conductive material such as copper.
  • the cross section of any one of these pins 22 is generally circular, but other cross sectional shapes such as polygons or flat strips can be used to accommodate the shape of the pin holes 20.
  • the pins 22 begin with a head 23 at the upper surface 16a of the substrate 16 and extend through the pin holes 20 to the lower surface 16b of the substrate 16 and continue through the lower surface 15 of the integrated chip package 14.
  • the distance from the lower surface 16b of the substrate 16 to the upper surface 12 of the board 10 is identified by the letter H.
  • the dimension H is normally between 2 and 2,8 mm.
  • a portion of each pin 22 extending beyond the integrated circuit package 14 is called a root and is identified by reference numeral 24.
  • the pin 22 is bent or formed at reference numeral 26 and reformed back on itself (i.e., in the same plane) at reference numeral 28 to form a knee 29.
  • each pin 22 is then bent once again, also in the same plane, at reference numeral 30 so that the lowermost extension of the pin 22, called the tip 32, is substantially perpendicular to the planes of the substrate 16 and board 10 and directly below the root 24, coaxial therewith. In this way, all bends of an individual pin 22 are in the same plane, which plane is substantially perpendicular to the plane of the board 10.
  • the tip 32 of the pin 22 is fixedly attached in the preferred embodiment to the board 10 by means of solder, bonding or the like.
  • the knee 29 of each pin 22 is formed along a predetermined plane. The number and alignment of all such planes perpendicular to the plane of the board 10 can be arranged to suit the desired configuration. It can be seen that the knee 29 of any pin 22 can extend in proximity to, and mesh with, the opening formed by the knee 29 of an adjacent pin 22. In practice, however, it has been found that manufacturing techniques are simplified when such meshing is not required (i.e., when the distance between pins 22 is greater than the length of the knee 29).
  • FIGURE 2 there is shown an integrated circuit chip 18 disposed on a rectangular ceramic substrate 16. Rectangular and square substrates are most common, but other geometric shapes can also be used without departing from the spirit and scope of the present invention.
  • the substrate 16 has a plurality of pin holes 23, each of which has a pin 22 extending therethrough.
  • the pin holes 23 are arranged in one or more rows along the periphery or within the boundaries of the substrate 16 in the preferred embodiment. Any suitable configuration of holes 23 can be used in accordance with the present invention, another of which configurations is shown and described hereinbelow in conjunction with FIGURE 4.
  • the substrate 16 is mounted by means of the pins 22 to a printed circuit board 10 on or in which is disposed a plurality of circuit lines 11 comprising an electrically conductive material such as copper.
  • a printed circuit board 10 on or in which is disposed a plurality of circuit lines 11 comprising an electrically conductive material such as copper.
  • the number of circuit lines 11 can approach that of the number of pins 22.
  • At least some of the pins 22 are fixedly attached to the circuit lines 11 by means of a suitable bonding or similar attachment technique.
  • FIGURE 3a there is shown a simplified cross-sectional schematic view of an exaggerated relative movement of a board 10 and substrate 16 with pins 22 there­between.
  • the view is simplified in that only three pins 22 are depicted representing a plurality of pins 22 in various inter­mediate states of deformation, depending upon their location.
  • the leftmost pin 22 is elongated by action of a force F1 upon the board 10.
  • the deformation of the board 10 relative to the substrate 16 is accommodated by the temporary change in radius of the pin bends 26 and 30 and knee 29, preventing or minimizing the risk of rupture of the pin to board connection or pad 13.
  • the rightmost pin 22 is compressed by action of a force F2 upon board 10.
  • the shape of the pin bends 26 and 30 and knee 29 accommodates such a compressive force.
  • FIGURE 3b there is shown another simplified cross-sectional schematic view of an exaggerated relative movement of a board 10 and substrate 16 with pins 22 therebetween.
  • the view is simplified in that only three pins 22 are depicted representing a plurality of pins 22 in various intermediate states of deformation, depending upon their loca­tion.
  • the pins 22 are deformed by action of a force F3 upon the board 10 and in a direction along the plane of the substrate 16.
  • a force F3 is shown in this FIGURE from one direction only, the pins 22 are adapted to accommodate such a lateral force from any direction along the plane of the substrate 16.
  • the movement of the board 10 relative to the substrate 16, is accommodated by the temporary change in the shape of the pin, preventing or minimizing the risk of rupture of the pin to board connection or pad 13.
  • the overall length of the pin including bends 26 and 30 and knee 29 accommodates such a lateral movement.
  • FIGURE 4 there is shown a top perspective view of an integrated circuit package in accordance with an alternative embodiment of the present invention.
  • a chip 50 is disposed on a ceramic substrate 52.
  • the substrate 52 is planar and circular. Any other geometric shape can also be used.
  • Pin holes 54 are provided in a plurality of rows within the periphery of the substrate 52. Extending through each of the pin holes 54 is a pin 56.
  • the substrate 52 is disposed on a printed circuit board 55 on which are disposed circuit lines 57.
  • the knees 56a of the pins 56 of each row or track 58 and 59 can be aligned with the knees 56a of the pins 56 in subsequent rows. Accordingly, the knees 56a of the pins 56 that lie in the inner track 58 can be adapted to fit into the respective openings formed by the knees 56a of the pins 56 that lie in the outer track 59. In this manner, it can be seen that the knees of pins in any given interior track can be caused to mesh with the openings formed by the knees of an adjacent exterior track.
  • the actual meshing or overlapping of pins 56 need not be required, however, if manufacturing difficulties preclude it. Any reasonable geometric configuration can be used to advantage with kneed pins of the present invention.
  • a curved board 60 forms the base for a plurality of pins 62 which, in turn, are attached to a curved substrate 64.
  • An integrated circuit chip 66 is fixedly attached to the substrate 64 by means of solder, bonding or other con­ventional fixed attachment means well known in the art.
  • This packaging structure represents a board 60 and substrate 64 shown in their original shapes.
  • the curvature of the substrate 64 conforms to that of the board 60 in such a manner that their respective curved planes are substantially parallel to one another. It should be noted that the curvature of the substrate 64 need not correspond to that of the board 60, however, and in operation, due to tensile forces and stress, often does not precisely correspond at all points. It is in those dynamic and sometimes unstable situations that the present invention provides great advantages.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)
EP87116785A 1986-11-24 1987-11-13 Elektrische Anordnung Expired - Lifetime EP0268953B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/934,297 US4764848A (en) 1986-11-24 1986-11-24 Surface mounted array strain relief device
US934297 1986-11-24

Publications (3)

Publication Number Publication Date
EP0268953A2 true EP0268953A2 (de) 1988-06-01
EP0268953A3 EP0268953A3 (en) 1990-03-14
EP0268953B1 EP0268953B1 (de) 1994-06-01

Family

ID=25465318

Family Applications (1)

Application Number Title Priority Date Filing Date
EP87116785A Expired - Lifetime EP0268953B1 (de) 1986-11-24 1987-11-13 Elektrische Anordnung

Country Status (4)

Country Link
US (1) US4764848A (de)
EP (1) EP0268953B1 (de)
JP (1) JPS63138677A (de)
DE (1) DE3789938T2 (de)

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EP0898857A2 (de) * 1996-03-29 1999-03-03 General Dynamics Information Systems, Inc. Verfahren zur verbindung von kontaktflächengittern mit einer leiterplatte

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FR2091247A5 (de) * 1970-05-05 1972-01-14 Int Computers Ltd
US4155615A (en) * 1978-01-24 1979-05-22 Amp Incorporated Multi-contact connector for ceramic substrate packages and the like
EP0189342A2 (de) * 1985-01-22 1986-07-30 Itt Industries, Inc. Verbinderzusammenbau für ein flaches Paneel
EP0216363A2 (de) * 1985-09-27 1987-04-01 Hitachi, Ltd. Elektrischer Bauteil mit Anschlussdrähten

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2237690A (en) * 1989-10-08 1991-05-08 Murata Manufacturing Co Pin-shaped parallel terminals of an electronic component for inserting in a printed board
US5096425A (en) * 1989-10-08 1992-03-17 Murata Manufacturing Co., Ltd. Pin-shaped or flat-plate-shaped parallel terminals of an electronic or piezoelectric component for being inserted in a printed circuit board
GB2237690B (en) * 1989-10-08 1994-04-06 Murata Manufacturing Co A combination of an electronic component and a printed circuit board
US5441968A (en) * 1989-12-20 1995-08-15 Aktiebolaget Hassle Therapeutically active fluoro substituted benzimidazoles
EP0519200A1 (de) * 1991-06-15 1992-12-23 Daimler-Benz Aerospace Aktiengesellschaft Verbindung von LLCCC-Bauelementen für die Raumfahrtelektronik
EP0898857A2 (de) * 1996-03-29 1999-03-03 General Dynamics Information Systems, Inc. Verfahren zur verbindung von kontaktflächengittern mit einer leiterplatte
EP0898857A4 (de) * 1996-03-29 2005-06-01 Gen Dynamics Inf Systems Inc Verfahren zur verbindung von kontaktflächengittern mit einer leiterplatte

Also Published As

Publication number Publication date
US4764848A (en) 1988-08-16
JPS63138677A (ja) 1988-06-10
DE3789938D1 (de) 1994-07-07
EP0268953A3 (en) 1990-03-14
EP0268953B1 (de) 1994-06-01
JPH0437555B2 (de) 1992-06-19
DE3789938T2 (de) 1994-12-01

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