EP0141742A3 - Buffer system for input/output portion of digital data processing system - Google Patents
Buffer system for input/output portion of digital data processing system Download PDFInfo
- Publication number
- EP0141742A3 EP0141742A3 EP84402191A EP84402191A EP0141742A3 EP 0141742 A3 EP0141742 A3 EP 0141742A3 EP 84402191 A EP84402191 A EP 84402191A EP 84402191 A EP84402191 A EP 84402191A EP 0141742 A3 EP0141742 A3 EP 0141742A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- input
- data processing
- digital data
- buffer
- output portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US549608 | 1983-11-07 | ||
| US06/549,608 US4860244A (en) | 1983-11-07 | 1983-11-07 | Buffer system for input/output portion of digital data processing system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| EP0141742A2 EP0141742A2 (en) | 1985-05-15 |
| EP0141742A3 true EP0141742A3 (en) | 1989-04-12 |
Family
ID=24193709
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP84402191A Withdrawn EP0141742A3 (en) | 1983-11-07 | 1984-10-31 | Buffer system for input/output portion of digital data processing system |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US4860244A (enrdf_load_stackoverflow) |
| EP (1) | EP0141742A3 (enrdf_load_stackoverflow) |
| JP (1) | JPS60186956A (enrdf_load_stackoverflow) |
| AU (1) | AU575352B2 (enrdf_load_stackoverflow) |
| CA (1) | CA1227879A (enrdf_load_stackoverflow) |
| DK (1) | DK526584A (enrdf_load_stackoverflow) |
| FI (1) | FI844341L (enrdf_load_stackoverflow) |
| IE (1) | IE842855L (enrdf_load_stackoverflow) |
Families Citing this family (57)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU575351B2 (en) * | 1983-11-07 | 1988-07-28 | Digital Equipment Corporation | Data processing system |
| AU583108B2 (en) * | 1985-06-28 | 1989-04-20 | United Module Corporation | I/O structure for information processing system |
| US5101478A (en) * | 1985-06-28 | 1992-03-31 | Wang Laboratories, Inc. | I/O structure for information processing system |
| GB2203616B (en) * | 1987-04-01 | 1991-10-02 | Digital Equipment Int | Improvements in or relating to data communication systems |
| US5179678A (en) * | 1987-09-08 | 1993-01-12 | Nec Corporation | Address/control signal input circuit for a cache controller which clamps the address/control signals to predetermined logic level clamp signal is received |
| US4993030A (en) * | 1988-04-22 | 1991-02-12 | Amdahl Corporation | File system for a plurality of storage classes |
| JPH01293431A (ja) * | 1988-05-23 | 1989-11-27 | Toshiba Corp | メモリアクセス方式 |
| JPH027163A (ja) * | 1988-06-24 | 1990-01-11 | Brother Ind Ltd | データ入・出力装置 |
| JPH07122868B2 (ja) * | 1988-11-29 | 1995-12-25 | 日本電気株式会社 | 情報処理装置 |
| US5117486A (en) * | 1989-04-21 | 1992-05-26 | International Business Machines Corp. | Buffer for packetizing block of data with different sizes and rates received from first processor before transferring to second processor |
| US5146574A (en) * | 1989-06-27 | 1992-09-08 | Sf2 Corporation | Method and circuit for programmable selecting a variable sequence of element using write-back |
| US5179662A (en) * | 1989-08-31 | 1993-01-12 | International Business Machines Corporation | Optimized i/o buffers having the ability to increase or decrease in size to meet system requirements |
| US5218683A (en) * | 1989-10-30 | 1993-06-08 | Hayes Microcomputer Products, Inc. | Method and apparatus for concealing the enablement of a device by modifying a status word |
| US5687396A (en) * | 1989-12-04 | 1997-11-11 | Canon Kabushiki Kaisha | Data buffer apparatus with interrupted transmission/reception |
| US5729708A (en) * | 1989-12-04 | 1998-03-17 | Canon Kabushiki Kaisha | Portable data buffer apparatus with manually controlled reception/transmission |
| US5101477A (en) * | 1990-02-16 | 1992-03-31 | International Business Machines Corp. | System for high speed transfer of data frames between a channel and an input/output device with request and backup request count registers |
| US5315708A (en) * | 1990-02-28 | 1994-05-24 | Micro Technology, Inc. | Method and apparatus for transferring data through a staging memory |
| US5185876A (en) * | 1990-03-14 | 1993-02-09 | Micro Technology, Inc. | Buffering system for dynamically providing data to multiple storage elements |
| AU8417591A (en) * | 1990-07-16 | 1992-02-18 | Tekstar Systems Corporation | Interface system for data transfer with remote peripheral independently of host processor backplane |
| US5241630A (en) * | 1990-11-13 | 1993-08-31 | Compaq Computer Corp. | Device controller with a separate command path between a host and the device and a separate data path including a first in, first out memory between the host and the device |
| US5276808A (en) * | 1991-02-04 | 1994-01-04 | International Business Machines Corporation | Data storage buffer system and method |
| US5377328A (en) * | 1991-06-05 | 1994-12-27 | Data General Corporation | Technique for providing improved signal integrity on computer systems interface buses |
| US5222216A (en) * | 1991-07-12 | 1993-06-22 | Thinking Machines Corporation | High performance communications interface for multiplexing a plurality of computers to a high performance point to point communications bus |
| US5887196A (en) * | 1991-12-30 | 1999-03-23 | Apple Computer, Inc. | System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer |
| US5848297A (en) * | 1991-12-30 | 1998-12-08 | Apple Computer, Inc. | Control apparatus for maintaining order and accomplishing priority promotion in a computer interconnect |
| US5640599A (en) * | 1991-12-30 | 1997-06-17 | Apple Computer, Inc. | Interconnect system initiating data transfer over launch bus at source's clock speed and transfering data over data path at receiver's clock speed |
| JPH05257851A (ja) * | 1991-12-30 | 1993-10-08 | Apple Computer Inc | データの転送の順序を制御させる装置 |
| CA2080210C (en) * | 1992-01-02 | 1998-10-27 | Nader Amini | Bidirectional data storage facility for bus interface unit |
| US5325401A (en) * | 1992-03-13 | 1994-06-28 | Comstream Corporation | L-band tuner with quadrature downconverter for PSK data applications |
| US5396597A (en) * | 1992-04-03 | 1995-03-07 | International Business Machines Corporation | System for transferring data between processors via dual buffers within system memory with first and second processors accessing system memory directly and indirectly |
| FI90708C (fi) * | 1992-04-23 | 1994-03-10 | Nokia Telecommunications Oy | Menetelmä sekä järjestelmä digitaalisten signaalien siirtämiseksi digitaalisen signaaliprosessorin ja siihen liitettyjen oheispiirien välillä |
| US5418911A (en) * | 1992-06-09 | 1995-05-23 | Intel Corporation | Data path switch method and apparatus that provides capacitive load isolation |
| TW276312B (enrdf_load_stackoverflow) * | 1992-10-20 | 1996-05-21 | Cirrlis Logic Inc | |
| US5499384A (en) * | 1992-12-31 | 1996-03-12 | Seiko Epson Corporation | Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device |
| US5483640A (en) * | 1993-02-26 | 1996-01-09 | 3Com Corporation | System for managing data flow among devices by storing data and structures needed by the devices and transferring configuration information from processor to the devices |
| US6067408A (en) * | 1993-05-27 | 2000-05-23 | Advanced Micro Devices, Inc. | Full duplex buffer management and apparatus |
| US5664224A (en) * | 1993-07-23 | 1997-09-02 | Escom Ag | Apparatus for selectively loading data blocks from CD-ROM disks to buffer segments using DMA operations |
| US5623607A (en) * | 1993-10-05 | 1997-04-22 | Hitachi, Ltd. | Data transfer control method for controlling transfer of data through a buffer without causing the buffer to become empty or overflow |
| US5416520A (en) * | 1993-11-30 | 1995-05-16 | Intel Corporation | Multiple encoder output buffer apparatus for differential coding of video information |
| US5615392A (en) * | 1995-05-05 | 1997-03-25 | Apple Computer, Inc. | Method and apparatus for consolidated buffer handling for computer device input/output |
| US5802278A (en) * | 1995-05-10 | 1998-09-01 | 3Com Corporation | Bridge/router architecture for high performance scalable networking |
| US5592622A (en) * | 1995-05-10 | 1997-01-07 | 3Com Corporation | Network intermediate system with message passing architecture |
| US5805930A (en) * | 1995-05-15 | 1998-09-08 | Nvidia Corporation | System for FIFO informing the availability of stages to store commands which include data and virtual address sent directly from application programs |
| US5732286A (en) * | 1995-08-10 | 1998-03-24 | Cirrus Logic, Inc. | FIFO based receive packet throttle for receiving long strings of short data packets |
| JPH1040168A (ja) * | 1996-07-29 | 1998-02-13 | Ricoh Co Ltd | データ処理装置 |
| EP0859323B1 (en) * | 1997-02-14 | 2007-03-21 | Canon Kabushiki Kaisha | Data transmission apparatus, system and method, and image processing apparatus |
| US5958026A (en) * | 1997-04-11 | 1999-09-28 | Xilinx, Inc. | Input/output buffer supporting multiple I/O standards |
| US6073190A (en) | 1997-07-18 | 2000-06-06 | Micron Electronics, Inc. | System for dynamic buffer allocation comprising control logic for controlling a first address buffer and a first data buffer as a matched pair |
| US6243769B1 (en) | 1997-07-18 | 2001-06-05 | Micron Technology, Inc. | Dynamic buffer allocation for a computer system |
| US6661421B1 (en) | 1998-05-21 | 2003-12-09 | Mitsubishi Electric & Electronics Usa, Inc. | Methods for operation of semiconductor memory |
| US6559851B1 (en) | 1998-05-21 | 2003-05-06 | Mitsubishi Electric & Electronics Usa, Inc. | Methods for semiconductor systems for graphics processing |
| US6504550B1 (en) | 1998-05-21 | 2003-01-07 | Mitsubishi Electric & Electronics Usa, Inc. | System for graphics processing employing semiconductor device |
| US6535218B1 (en) | 1998-05-21 | 2003-03-18 | Mitsubishi Electric & Electronics Usa, Inc. | Frame buffer memory for graphic processing |
| US6145032A (en) * | 1998-09-21 | 2000-11-07 | International Business Machines Corporation | System for recirculation of communication transactions in data processing in the event of communication stall |
| US6993605B2 (en) | 2001-02-28 | 2006-01-31 | Sharp Laboratories Of America, Inc. | Adaptive run-time data transfer optimization |
| JP2008146459A (ja) * | 2006-12-12 | 2008-06-26 | Toshiba Corp | インタフェースコントローラ、リードアクセス制御方法及び該インタフェースコントローラを備える情報処理装置 |
| US8111331B2 (en) * | 2007-07-09 | 2012-02-07 | Cisco Technology, Inc. | Image resizer and resizing method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3249924A (en) * | 1962-12-31 | 1966-05-03 | Ibm | Asynchronous data processing system |
| DE2802160A1 (de) * | 1977-01-21 | 1978-07-27 | Schrack Elektrizitaets Ag E | Einrichtung zur zeitlichen pufferung seriell einlangender bitfolgen in einem oder mehreren silospeichern |
| US4378588A (en) * | 1976-09-07 | 1983-03-29 | Tandem Computers Incorporated | Buffer control for a data path system |
| DE3149678A1 (de) * | 1981-12-15 | 1983-06-23 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zur zwischenspeicherung von zwischen zwei funktionseinheiten in beiden richtungen zu uebertragenden informationen in einem pufferspeicher |
| EP0094746A2 (en) * | 1982-04-21 | 1983-11-23 | Digital Equipment Corporation | High-speed data transfer unit for digital data processing system |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51104233A (enrdf_load_stackoverflow) * | 1975-03-12 | 1976-09-14 | Hitachi Ltd | |
| US4099231A (en) * | 1975-10-01 | 1978-07-04 | Digital Equipment Corporation | Memory control system for transferring selected words in a multiple memory word exchange during one memory cycle |
| US4156906A (en) * | 1977-11-22 | 1979-05-29 | Honeywell Information Systems Inc. | Buffer store including control apparatus which facilitates the concurrent processing of a plurality of commands |
| US4204251A (en) * | 1977-12-28 | 1980-05-20 | Finn Brudevold | Interconnection unit for multiple data processing systems |
| US4245303A (en) * | 1978-10-25 | 1981-01-13 | Digital Equipment Corporation | Memory for data processing system with command and data buffering |
| US4232366A (en) * | 1978-10-25 | 1980-11-04 | Digital Equipment Corporation | Bus for a data processing system with overlapped sequences |
| JPS5917445B2 (ja) * | 1979-05-25 | 1984-04-21 | オムロン株式会社 | デ−タ転送方式 |
| JPS5833972B2 (ja) * | 1979-11-12 | 1983-07-23 | 富士通株式会社 | 計算機システム間通信方式 |
| US4509115A (en) * | 1982-04-21 | 1985-04-02 | Digital Equipment Corporation | Two-port memory controller |
| AU575351B2 (en) * | 1983-11-07 | 1988-07-28 | Digital Equipment Corporation | Data processing system |
-
1983
- 1983-11-07 US US06/549,608 patent/US4860244A/en not_active Expired - Lifetime
-
1984
- 1984-10-31 EP EP84402191A patent/EP0141742A3/en not_active Withdrawn
- 1984-11-01 AU AU34894/84A patent/AU575352B2/en not_active Ceased
- 1984-11-06 CA CA000467089A patent/CA1227879A/en not_active Expired
- 1984-11-06 FI FI844341A patent/FI844341L/fi not_active Application Discontinuation
- 1984-11-06 DK DK526584A patent/DK526584A/da not_active Application Discontinuation
- 1984-11-06 IE IE842855A patent/IE842855L/xx unknown
- 1984-11-07 JP JP59234836A patent/JPS60186956A/ja active Granted
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3249924A (en) * | 1962-12-31 | 1966-05-03 | Ibm | Asynchronous data processing system |
| US4378588A (en) * | 1976-09-07 | 1983-03-29 | Tandem Computers Incorporated | Buffer control for a data path system |
| DE2802160A1 (de) * | 1977-01-21 | 1978-07-27 | Schrack Elektrizitaets Ag E | Einrichtung zur zeitlichen pufferung seriell einlangender bitfolgen in einem oder mehreren silospeichern |
| DE3149678A1 (de) * | 1981-12-15 | 1983-06-23 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zur zwischenspeicherung von zwischen zwei funktionseinheiten in beiden richtungen zu uebertragenden informationen in einem pufferspeicher |
| EP0094746A2 (en) * | 1982-04-21 | 1983-11-23 | Digital Equipment Corporation | High-speed data transfer unit for digital data processing system |
Also Published As
| Publication number | Publication date |
|---|---|
| AU575352B2 (en) | 1988-07-28 |
| JPS60186956A (ja) | 1985-09-24 |
| FI844341A7 (fi) | 1985-05-08 |
| DK526584A (da) | 1985-06-14 |
| IE842855L (en) | 1985-05-07 |
| US4860244A (en) | 1989-08-22 |
| FI844341A0 (fi) | 1984-11-06 |
| AU3489484A (en) | 1985-05-16 |
| EP0141742A2 (en) | 1985-05-15 |
| FI844341L (fi) | 1985-05-08 |
| CA1227879A (en) | 1987-10-06 |
| JPH0332094B2 (enrdf_load_stackoverflow) | 1991-05-09 |
| DK526584D0 (da) | 1984-11-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
| AK | Designated contracting states |
Designated state(s): BE CH DE FR GB IT LI NL SE |
|
| PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
| AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): BE CH DE FR GB IT LI NL SE |
|
| 17P | Request for examination filed |
Effective date: 19890616 |
|
| 17Q | First examination report despatched |
Effective date: 19900816 |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 19940503 |
|
| RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: FLAHIVE, BARRY Inventor name: BRUCKERT, WILLIAM F. Inventor name: LACY, JAMES V. |