EP0135104B1 - Verfahren und Vorrichtung zum Ansteuern eines Schrittmotors - Google Patents

Verfahren und Vorrichtung zum Ansteuern eines Schrittmotors Download PDF

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Publication number
EP0135104B1
EP0135104B1 EP84109303A EP84109303A EP0135104B1 EP 0135104 B1 EP0135104 B1 EP 0135104B1 EP 84109303 A EP84109303 A EP 84109303A EP 84109303 A EP84109303 A EP 84109303A EP 0135104 B1 EP0135104 B1 EP 0135104B1
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European Patent Office
Prior art keywords
signal
rotor
circuit
motor
pulses
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French (fr)
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EP0135104A1 (de
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Luciano Antognini
Yves Güérin
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ETA SA Manufacture Horlogere Suisse
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Eta SA Fabriques dEbauches
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    • G—PHYSICS
    • G04—HOROLOGY
    • G04C—ELECTROMECHANICAL CLOCKS OR WATCHES
    • G04C3/00—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means
    • G04C3/14—Electromechanical clocks or watches independent of other time-pieces and in which the movement is maintained by electric means incorporating a stepping motor
    • G04C3/143—Means to reduce power consumption by reducing pulse width or amplitude and related problems, e.g. detection of unwanted or missing step

Definitions

  • the present invention relates to a method and a device for controlling a stepping motor and its main purpose is to reduce the consumption of this motor as much as possible while guaranteeing perfect operating safety even in the worst conditions.
  • the invention finds a particularly interesting application in the field of watchmaking.
  • electronic timepieces with analog display which include a stepping motor to drive the display members
  • most of the energy supplied by the electric power source which is in generally a battery, is consumed by the engine. It is therefore important to limit, as much as possible the consumption of this motor to increase the life of the battery or, for a given life, to be able to reduce its volume, the space available in a timepiece being very limited. .
  • the duration of the driving pulses sent at regular intervals to the motor is fixed. This duration, generally 7.8 ms, is provided in order to guarantee the proper functioning of the motor even under the worst conditions, that is to say with a low battery voltage, during the drive of the calendar mechanism , in the presence of shocks or external magnetic field, etc. As these unfavorable conditions occur only rarely, the engine is mostly supercharged.
  • a known solution for reducing the power consumption of the motor consists in applying normal motor pulses of reduced duration, for example 3.9 ms, but sufficient to ensure correct operation under the best conditions and to provide a device which, after each of these pulses detects whether or not the motor has run. In the absence of rotation, this detection device controls the sending to the motor of a long-term catching pulse, which allows the latter to take the missed step.
  • this detection device controls the sending to the motor of a long-term catching pulse, which allows the latter to take the missed step.
  • the present invention also aims to eliminate this drawback.
  • the method according to the invention for controlling a stepping motor comprising a rotor and a coil receiving normal driving pulses from a control device associated with the motor to rotate the rotor when this device is energized, does not only consist in measuring, during each normal driving pulse, a physical quantity representative of the movement of the rotor and in interrupting said driving pulse at an instant determined as a function of the time taken by the physical quantity measured to reach a reference level, but also to detect the condition of rotation or non-rotation of the rotor in response to normal driving pulses and to modify the reference level by based on the information provided by this detection.
  • the reference level is adjustable in steps between a minimum value and a maximum value and it is increased by one step when N steps not taken by the rotor in response to normal driving pulses have have been detected in a determined time interval, N being a number which may be equal to or greater than 1.
  • the steps not taken by the rotor in response to normal driving pulses are caught up by applying to the motor coil correction driving pulses of sufficient duration to ensure the rotation of the rotor.
  • a stepper motor control system where the voltage induced in the motor coil by the movement of the rotor is measured and compared to a threshold or reference level to allow adaptation of the duration of the driving pulses to the instantaneous load of the engine has already been the subject of the European patent application filed on January 21, 1982 in the name of Asulab SA and published under the number 60806.
  • the threshold level is fixed. This does not prevent certain elements of the device described in this European application from being found as such or in a slightly modified form in the embodiment which has been chosen by way of example to demonstrate the invention.
  • the elements of the known device which are found in that of the invention are designated by the same references in the present application as in the aforementioned European application.
  • the circuit for calculating the induced voltage which bears the reference 11 in FIG. 4 of the European patent application is designated by the same number in FIG. 1 of this application. It is the same for the circuit for calculating the duration of the driving pulses 13. Note that the same rule also applies to the signals which are the same in both cases.
  • the elements which fulfill the same function in the device of the invention as in the known device but which had to be modified carry in the present application a reference which is increased by 100 compared to the corresponding reference used in the application anterior.
  • the AND gate 43 with two inputs which drives the motor control transistors of FIG. 12 of the European demand becomes, in fig. 5 of the present application, the AND gate 143 with 3 inputs, these two doors fulfilling basically the same role.
  • control device which will now be described and the general diagram of which is shown in FIG. 1, which is to be put in parallel with FIG. 4 of the aforementioned European patent application, is intended to equip an electronic watch with second hand.
  • This device comprises a periodic signal generator circuit 8 constituted by a quartz oscillator 300 which produces a signal whose frequency is substantially equal to 32768 Hz and by a frequency divider 400 which, after a division by fifteen binary stages of the frequency of the oscillator and a shaping of the wave, delivers at its output which also constitutes that of circuit 8 a signal S 8 of 1 Hz, formed of fine pulses whose duration is, for example, equal to the period of the signal of the oscillator, about 30 ⁇ s.
  • a periodic signal generator circuit 8 constituted by a quartz oscillator 300 which produces a signal whose frequency is substantially equal to 32768 Hz and by a frequency divider 400 which, after a division by fifteen binary stages of the frequency of the oscillator and a shaping of the wave, delivers at its output which also constitutes that of circuit 8 a signal S 8 of 1 Hz, formed of fine pulses whose duration is, for example, equal to the period of the signal of the oscillator, about 30 ⁇ s.
  • a combinational logic circuit 203 is connected to the various outputs of the binary stages of the frequency divider 400 by a series of connections to produce three logic signals SA, SB, SC, which are necessary for the operation of the device and whose form will be specified later.
  • This circuit 203 which also has the function of dividing the output signal of the last binary stage of the frequency divider and of providing periodically, for example every hour, a fourth signal SD whose usefulness will also appear later, can be produced in a simple way that is within the reach of the skilled person. It will therefore not be described in detail here.
  • a control circuit 109 fulfilling a role similar to circuit 9 of the cited European application, has a first input connected to the output of the frequency divider 400, which supplies the signal S 8 .
  • the output of circuit 109 delivers driving pulses I to a stepping motor 10.
  • a second input of circuit 109 receives a signal S 13 for stopping the driving pulse I, as described in the cited reference.
  • a third input of circuit 109 receives a signal Q211 to make up for missed steps.
  • a resistor 18, visible in FIG. 5, connected in series with the motor 10, makes it possible to obtain at its terminals a voltage U19 representative of the current which flows through the motor during the driving pulse I.
  • a computing circuit 11 represented by FIG. 11 in the European reference cited, receives on its input the signal U19 and develops a measurement voltage U m , representative of the voltage induced by the rotor during its rotation, which appears at the output of this circuit, across the resistor 82 of European demand.
  • a comparator circuit 12 has a first input connected to the output of circuit 11 while a second input receives a reference or threshold voltage U ' S.
  • This comparator 12 delivers at its output a logic signal S12 which is at the low logic level if U m is less than U ' s and at the high logic level if U m is more than U' s .
  • the threshold voltage U ' s is chosen as a function of the amplitude of the measurement voltage U m obtained under these normal engine operating conditions, as will appear below.
  • the moment of transition of the signal S 12 from the low logic level to the high logic level, counted from the start of the driving pulse I, defines a time T 2 which is representative of the torque C supplied by the motor.
  • the output of comparator 12 is connected to a first input of a calculation circuit 13, which determines the duration of the driving pulse I, and the output of the frequency divider 400 is connected to a second input of this circuit.
  • the logic signal S 13 appears. This signal is generated by the circuit 13 from the signals S 8 and S 12 and it is applied to the second input of the control circuit 109.
  • the signal S i3 is normally at the low logic level and goes to the high logic level T 3 seconds after the transition of signal S 12 .
  • a high logic level of the signal S 13 has the effect of stopping the driving pulse 1 produced by the control circuit 109.
  • the output of circuit 11, on which the measurement voltage U m appears, is connected to the input of a missed step detector circuit 200.
  • the output of circuit 200 is connected to the third input of circuit 109 and to the input of a missed step counting circuit 201.
  • a logic signal Q211 appears which is normally in the logic low state and goes to the logic high state for one second, for example, after detection with a failed step.
  • the output of the counting circuit 201 is connected to a first input of a voltage reference circuit 202.
  • the output of this latter circuit, supplying the threshold voltage U ' s is connected to the second input of the circuit 12.
  • the circuit 202 increments the threshold voltage U ' s by a fixed step.
  • the voltage U ' s can thus vary between a minimum level U' so , which can be equal to 0, and a maximum level U ' sp in P steps. P is for example 10.
  • U ' s has reached its maximum level, it remains there even if circuit 202 receives other impulses.
  • Circuit 202 has a second input to which a signal S226 is applied. This signal reduces the voltage U ' s to the minimum value U' so each time that the entire circuit of FIG. 1 is switched on, for example when the battery is changed.
  • the voltage U ' s is again periodically reduced to U' so , for example every hour, by the signal SD produced by the combinational logic circuit 203 and applied to a third input of the circuit 202.
  • the first, or the bottom one includes the elements referenced 109, 10, 11, 12 and 13.
  • the second loop, or the top loop includes the elements 109, 10, 11 and 200 with, in addition, a branch formed of the elements 201 and 202.
  • the upper loop for catching up on lost steps, in connection with the branch formed by circuits 201 and 202 which controls the threshold voltage U ' s , makes it possible to largely overcome the need to match the constants of circuit 13 to the constants k, K of the motor and to make the device less sensitive to variations in the parameters of the other circuits.
  • the failed step counting circuit 201 makes it possible to define a satisfactory operating criterion of the motor when it is subjected to external disturbances.
  • Each pulse on the signal S220 produces the incrementation of a step of the threshold voltage U ' s of the circuit 202.
  • U' s corresponds an energy of the driving pulse 1 plus big.
  • This adaptation process can continue until the energy of the motor impulses satisfies the satisfactory operating criterion adopted. All the steps missed during this adjustment process are naturally caught up.
  • the voltage U ' s is reset to the minimum value U' so using S226 or SD signals.
  • the value U ' s obtained after the readjustment process then corresponds to the new engine operating conditions.
  • the circuit 11 reacts to a driving pulse 1 applied to the motor 10 in various situations.
  • the motor is of the stepping type and the driving pulses 1 are polarized. This means that to turn the motor one step from a given position, the driving pulse 1 must have the correct polarity with respect to the position of the rotor or, as we say, be in phase with the latter. Otherwise, if the pulse I has the wrong polarity, that is to say that it is in counterphase with the position of the rotor, the motor will not run.
  • the induced rotation voltage is then zero while the measurement voltage U m produced by the circuit 11 in this situation, represented by the curve 206, shows a low amplitude oscillation.
  • the motor receives a pulse 1 in counterphase. It cannot then rotate and the induced voltage is therefore also zero.
  • the measurement voltage U m takes a strong negative value, as the curve shows. 207 corresponding to this case in fig. 2. This stems from the fact that the magnetic flux created by the magnet of the rotor and that produced by the pulse 1 are added and saturate certain parts of the stator. This saturation has the effect of modifying the time constant UR of the motor, L being its inductance and R the resistance of the coil.
  • this time constant is used in circuit 11 to determine U m .
  • the circuit 11 supplies a measurement voltage U m which is erroneous but easy to detect. It suffices, in fact, to compare it with a negative reference voltage U R. If the resulting voltage is positive, the motor has run, if it is negative the motor has missed a step.
  • Fig. 3 shows the constitution of the missed step detection circuit 200.
  • This circuit includes a differential amplifier 210 whose output is connected to the terminal S for setting a bistable flip-flop 211.
  • the non-inverting input of the amplifier 210 is connected to a voltage reference not shown, supplying the negative voltage U R.
  • the inverting input of the same amplifier constitutes the input of circuit 200.
  • This input is connected to the output of circuit 11 to receive the measurement voltage U m .
  • the flip-flop 211 has a reset input R which is connected to the output of the frequency divider 400 to receive the signal S 3 .
  • the output terminal Q of the flip-flop 211 also constitutes the output of the circuit 200.
  • the signal S ⁇ comes from the output of the frequency divider 400 and it includes fine seconds pulses. The duration of these pulses is equal to the period of the signal of 32768 Hz coming from the quartz oscillator 300.
  • the voltage U m is formed, in synchronism with the signal S 8 , of positive pulses when the driving pulse 1 is in phase with the position of the motor rotor, whether it rotates or not, and negative pulses when pulse 1 is in counterphase.
  • the comparison of the voltage U m with the negative reference voltage U R in the differential amplifier 210 produces at its output a signal S210.
  • the signal S210 will be at the low logic level when U m is greater than U R and at the high logic level during the time when U m is less than U R.
  • the signal S210 therefore contains a positive pulse of a few milliseconds, slightly behind the pulses of the signal S 8 , when a missed engine step is detected.
  • the flip-flop 211 receives on its inputs R and S respectively the signals S 8 and S210.
  • the signal Sa resets the flip-flop to zero every second, which causes a low logic level on its output Q.
  • the flip-flop is set to the state, causing a high logic level on the output Q until the next pulse of the signal S 8 .
  • the logic signal Q211 which appears on the output Q of the flip-flop 211 is thus normally at the low logic level. It goes to the high logic level after the detection of a missed step and goes back to the low level a second later.
  • the motor receives a driving pulse I in phase and it rotates normally.
  • the rotor of the motor is supposed to be locked at time TB when the driving pulse in phase produces a voltage U m of lower amplitude than previously.
  • the next driving pulse 1 then comes in counterphase at time TC, the motor cannot turn, whether the rotor is free or blocked, and the voltage U m produced is negative. This causes the Q211 signal to go to high logic state.
  • the motor receives, by means which will be described later, two driving pulses of recovery producing the two positive pulses close to the measurement voltage U m . The watch then caught up with the two lost steps. Finally, still half a second later, at time TE, the motor receives a driving pulse I in phase and turns normally.
  • FIG. 5 of the present invention is to be compared with FIG. 12 of the previous European application.
  • Block 9 of fig. 12 is however replaced by block 109 in FIG. 5.
  • Block 109 shows the composition of the motor control circuit 10 according to the present invention. This block has the same general structure as block 9, despite some modifications and the presence of additional elements.
  • the circuit represented by block 109 of FIG. 5 of the present invention comprises the elements 10, 14, 15, 16, 17, 42, 45 and 58 already described in the cited European document, the gates ET 143 and ET 144 which have one more entry than the gates ET 43 and ET 44 of the cited document and finally a door AND 215 and three doors OR 216, OR 217 and OR 218 additional.
  • the output of the frequency divider 400 is connected to the first input of the OR gate 216 of FIG. 5. This input thus receives the second signal S ⁇ .
  • the output of the missed step detection circuit 200 is connected to the first input of the gate with two AND inputs 215, which thus receives the signal Q211.
  • the output of the AND gate 215 is connected to the second input of the OR gate 216.
  • the output of the latter gate is connected to the clock input C K of the flip-flop 42, to the input of the AND gate 58 operating as an inverter and finally at the clock input C K of the flip-flop 46, the latter being part of block 13.
  • the first input of the OR gate 217 is connected to the terminal of the combinational logic circuit 203 which produces the logic signal HER.
  • the second inputs of the doors with two AND inputs 215 and OR 218 are connected together and the common point is connected to the output of the logic circuit 203 which generates the logic signal SB.
  • the second input of the OR gate 217 is connected to the output of the AND gate 215 and the first input of the OR gate 218 is connected to the output Q of the flip-flop 45.
  • the output of the OR gate 218 is connected to the second inputs doors with three inputs AND 143 and AND 144.
  • the third inputs of these same doors AND 143 and AND 144 are connected to the output of the OR gate 217.
  • the first input of the AND gate 143 is connected to the output Q of the flip-flop 42 and the first input of AND gate 144 at the output Q * of the same flip-flop.
  • the signal S 8 is composed of positive seconds pulses with a duration of around 30 ⁇ s.
  • the signal SA is also composed of seconds pulses, synchronous with the pulses of the signal S 8 , but their duration is 7.8 ms.
  • the signal SB is formed by a series of pairs of pulses. Each pulse of the signal SB has a duration of 7.8 ms and each pair of pulses is located between two successive pulses of the signal S 8 . In the example of fig.
  • the pulses of the signal SB forming a pair are separated by an interval of 7.8 ms and each pair of pulses is located in the middle of the interval formed by two successive pulses of the signal S 8 .
  • signal Q45 has been described in the European reference cited when the engine is running normally. This signal is then formed of positive pulses, the duration of which determines that of the driving pulses I and varies as a function of the motor torque supplied. When the motor is blocked and loses a step, the amplitude of the measurement signal U m is insufficient to reach the threshold voltage U 'and produce the signal S13 to reset the flip-flop 45 to zero.
  • the signal Q45 then remains at the level logic high until the next catch-up motor pulse whose fixed duration of 7.8 ms is assumed to be sufficient to run the motor in the most unfavorable cases.
  • the signal 0211 has already been described with reference to FIGS. 3 and 4. This signal goes to the high logic level after detection of a missed step and remains in this state until the next pulse of the signal S 8 .
  • the signals S143 and S144 represent the driving pulses of the control transistors 14, 15, 16, 17 of the motor 10 in the case of normal operation and in that of the recovery of the lost steps. With the exception of the catch-up pulse pairs, the start of all the other pulses are synchronous with the start of the pulses of signal S 8 .
  • the time scale t indicates, as in fig. 4, in TA a normal rotation of the motor, in TB a missed step, in TC the detection of a missed step, in TD 1 and TD 2 the two catch-up steps and in TE again a normal rotation step.
  • circuit 5 When the engine is operating normally, signal Q211 is at low logic level since there have been no missed steps.
  • the output of the AND gate 215 then also remains at the low logic level, whatever the level of the signal SB.
  • the OR gate 216 then transmits, without modifying it, the signal S 8 which is thus applied to the terminals C K of the flip-flops 42 and 46 and to the input of the gate 58.
  • the output of the OR gate 217 provides a signal formed by the signal SA in normal operation and by the superposition of the signals SA and SB just after the detection of a missed step.
  • the output of the OR gate 218 provides a signal formed by the superposition of the signals SB and Q45.
  • the normal driving pulses 1 coming in synchronism with the signal S 8 appear while the signal SB is at the low logic level.
  • the signal SB therefore has, in this case, no effect on the OR gate 218 which then transmits only the signal Q45 defining the duration of the driving pulse I.
  • the signal at the output of the OR gate 217 is at the high logic level for 7.8 ms and the signal at the output of the OR gate 218 at the logic level also high, but for the duration of the pulse of the signal Q45.
  • the duration of the Q45 signal pulse is approximately 4 ms, much less than the 7.8 ms duration of the SA signal pulse.
  • the signal S143 which is at the output of the AND gate 143, has a period of two seconds and that it is formed of pulses which are inserted in the middle of the distance separating two successive pulses from the similar signal S144 supplied by the AND gate 144.
  • the signals S143 and S144 drive the control transistors 14 to 17, which generate the driving pulse I.
  • the block 109 of FIG. 5 of the present invention operates identically to block 9 of FIG. 12 of the European reference cited. This situation corresponds to the instant TA of the time scale t of FIG. 6.
  • the driving pulse cannot last longer than the 7.8 ms of the pulse of the signal SA.
  • the signal SA passing through the OR gate 217, controls the AND gates 143 and AND 144 by allowing the passage of the signals applied to the inputs of these gates only during the time when the signal SA is in the high logic state.
  • the engine having missed a step the following driving impulse 1 comes in counterphase and it is in principle incapable of turning the engine. This corresponds to the instant EC of the time scale t of FIG. 6.
  • the circuit 200 makes it possible at this instant to detect the non-rotation of the motor during the previous driving pulse by passing the output signal Q211 from the low logic state to the high logic state.
  • the signal Q211 remains in this state until the next pulse of the signal Sa at the instant TE of the time scale t of FIG. 6, thus defining a window with a duration of 1 second.
  • the motor has thus lost two steps which must be caught up before time TE, for example in the middle of the time interval separating TC from TL, at the instants TD1 and TD2 defined by the corresponding pair of pulses of the signal SB .
  • the signal Q211 is then at the high logic level, which allows the two pulses of the signal SB to pass through the AND gates 215 and OR 216 to reach the terminal C K of the flip-flop 42 of FIG. 5.
  • the signal SB then also passes through the OR gate 217, to reach the third inputs of the AND gates 143 and AND 144.
  • the first pulse of the signal SB puts the flip-flop 42 in a state making it possible to produce a driving pulse in phase with the instant TD1, since the driving impulse at the instant TC was in counterphase and the engine had not turned. In the case shown in fig. 6, it is the output Q * of the flip-flop 42 which must pass to the high logic level.
  • the signal SA is at the low logic level in the vicinity of the instants TD1 and TD2, at the output of the OR gate 218 there are only the two pulses of the signal SB.
  • the logic level of the output signal from the OR gate 218 is in the high logic state because the logic signals SB and Q45 are also in this state.
  • N the missed step counting circuit 201, represented in FIG. 7. It essentially comprises a counter by N referenced 220.
  • the value of N is typically equal to 5.
  • This counter has an input terminal, an output terminal and a reset terminal R.
  • the input terminal receives the signal Q211 coming from the missed step detector 200.
  • the output terminal delivers a signal S220 formed by a pulse of arbitrary duration, each time the counter has counted by N.
  • the terminal R receives a reset signal SC taken at the output of circuit 203 whose period T n is, for example, 8 seconds.
  • T n is, for example, 8 seconds.
  • This circuit includes a counter by P, referenced 221, having an input terminal, a reset terminal S and p output terminals denoted a, bc .. p.
  • the value of P is typically equal to 10.
  • the input terminal receives the signal S220, coming from the missed step counting circuit 201, and the reset terminal S is connected to the output of an OR gate 225 with two entrances.
  • the first input of this gate receives the signal SD, supplied by the circuit 203, which gives, for example, a pulse every hour.
  • the second input is connected to a circuit 226, not described but known per se, which delivers an output signal S226 containing a pulse when the battery which supplies the supply voltage U a is placed in the watch.
  • the output terminals a, b, ... p of counter 221 are each connected to the control terminal of a transmission door, the transmission doors being denoted respectively 223a, 223b, ... 223p.
  • Each transmission door connects the first terminal of a first load resistor 224, common to all these doors, to the first terminal of a second load resistor.
  • Each transmission gate therefore corresponds to a second load resistance and these p resistors are denoted respectively 224a, 224b, ... 224p.
  • the second terminals of resistors 224, 224a, 224b, ... 224p are all connected to ground.
  • a transmission door is made conductive when its control terminal is brought to the high logic level. If not it is in the blocking state.
  • a current source 222 is connected between the supply terminal Ua, connected to the watch battery, and the first terminal of the resistor 224. This source delivers a constant current IR. Finally, the threshold voltage U ' s constituting the output of circuit 202, is taken from the first terminal of resistor 224.
  • FIG. 9 This last figure represents the variations of the signals S221 a, S221b, ... S221 p, appearing on the output terminals a, b, ... p of the counter 221, as a function of the pulses A, B, ... P contained in the signal S220, as well as the variations in the threshold voltage U ′ which result therefrom.
  • the counter 221 is reset by a pulse of the signal S220 or of the signal SD, this pulse being transmitted to the terminal S of the counter by the OR gate 225.
  • the signals S221 a, S221 b ,. .. S221 p are then all at the high logical level.
  • the transmission doors 223a, 223b, ... 223p, controlled by these signals, are thus all made conductive. It follows that the load resistors 224a, 224b, ... 224p all come in parallel on the load resistor 224. The paralleling of all these resistors defines a minimum equivalent load resistance.
  • the current source 222 delivering a constant current IR in this equivalent load resistance, produces at its terminals a minimum threshold voltage U ' so . If the energy of the driving pulse I corresponding to this threshold is insufficient for the motor to function satisfactorily within the meaning of the criterion stated above, a pulse A will be generated by the circuit 201 and transmitted by the signal S220 to the counter 211 , which will advance by one.
  • the output signal S221a goes to the low logic level, the other outputs remaining at the high logic level.
  • the transmission door 223a then passes from the conducting state to the blocking state and disconnects the resistor 224a from the resistor 224.
  • the equivalent load resistance therefore increases in value. It is the same for the threshold voltage which goes from U ' so to the directly higher value U' sa .
  • the same process can be repeated, if necessary, with the pulses B, C, ... P incrementing, each time, the threshold voltage by one step up to the maximum value U ' s p. With the P + 1 pulse, the threshold voltage drops to the minimum value U ' so and the cycle can start again. In practice, the threshold voltage must stabilize at a value below U ' sp , the return to the minimum value U' so being produced only by the pulses of signals S226 or SD.
  • the threshold voltage U ' is periodically reset to its minimum value U' so , this on the one hand in order to be able to decrease it in the event that, due to external disturbances, the rotor has failed more than the N not provided and where, consequently, this tension would have been brought to take too high a value and, on the other hand, to allow the control device to adapt automatically to the possible variations of the characteristics and the conditions of engine operation over time.
  • the missed step counting circuit 201 is provided to prevent the threshold level from being precipitously increased, as soon as a step is not crossed by the rotor, whereas this may be due for example to a shock or to an external magnetic field and not the fact that this level is too low. It is therefore especially useful in the two cases which have just been envisaged, that is to say when the reference voltage is set to its minimum value only when the device is turned on for the first time or when 'it is only reset to this value each time the battery is changed. Indeed, without this counter, by attacking the circuit 202 directly by the signal Q211, the threshold voltage could then be brought very quickly to take its maximum value and the energy consumption of the motor would be unnecessarily high throughout the lifetime of the watch or at least of a battery.
  • the counting circuit 201 can be eliminated without great inconvenience, by connecting the output of circuit 200 to the first input of circuit 202, because the energy consumption can then be excessive only for a limited period. In addition, it is always possible to reduce energy losses by increasing the frequency of readjustment of the reference level.
  • the block diagram in fig. 1 would remain valid for these different variants except as regards the missed step counting circuit which, as has just been indicated, can in certain cases be omitted and the circuit for calculating the duration of the driving pulses which is not not always necessary, the interruption of these pulses can sometimes be directly controlled by the output of the comparator.
  • the other circuits, at least the measurement circuit 11 and the missed step detector circuit 200 should be adapted to the physical quantity chosen as a representative parameter.
  • circuit 11 can be one of those described in German patent application No. 3132304.
  • the physical quantity chosen to regulate the duration of the driving pulses was also used for the detection of missed steps. It is clear that this is not mandatory and that different parameters can be used for the two things. If this is the case, the input of the missed step detection circuit 200 must no longer be connected to the output of the measurement circuit 11 but directly to the motor coil or possibly to the motor control circuit.

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Claims (17)

1. Verfahren zur Steuerung eines Schrittmotors, umfassend einen Rotor und eine Spule, die von einer dem Motor zugeordneten Steuervorrichtung normale Antriebsimpulse erhält, um den genannten Rotor in Drehung zu versetzen, wenn die genannte Steuervorrichtung unter Spannung gesetzt wird, wobei das genannte Verfahren darin besteht, bei jedem normalen Antriebsimpuls eine der Rotorbewegung entsprechende physikalische Grösse zu messen und den genannten Antriebsimpuls zu einem Moment zu unterbrechen, der durch die Zeit gegeben ist, in welcher die physikalische Grösse einen Referenzpegel erreicht, dadurch gekennzeichnet, dass es auch darin besteht, den Zustand der Drehung oder Nichtdrehung des Rotors nach Abgabe der genannten normalen Antriebsimpulse zu erfassen und den genannten Referenzpegel in Abhängigkeit der durch diese Erfassung gelieferten Information zu ändern.
2. Verfahren gemäss Anspruch 1, dadurch gekennzeichnet, dass der genannte Referenzpegel schrittweise zwischen einem Mindestwert und einem Höchstwert einstellbar ist und jeweils um einen Schritt erhöht wird, wenn nach Abgabe von normalen Antriebsimpulsen N nicht vom Rotor ausgeführte Schritte in einer gegebenen Zeitspanne ermittelt worden sind, wobei N gleich oder grösser als 1 ist.
3. Verfahren gemäss Anspruch 2, dadurch gekennzeichnet, dass der genannte Referenzpegel beim ersten Unterspannungsetzen der Steuervorrichtung auf den genannten Mindestwert eingestellt wird.
4. Verfahren gemäss Anspruch 2, dadurch gekennzeichnet, dass der genannte Referenzpegel bei jedem Unterspannungsetzen der Steuervorrichtung auf den genannten Minimalwert zurückgeführt wird.
5. Verfahren gemäss Anspruch 3 oder 4, dadurch gekennzeichnet, dass der genannte Referenzpegel auch im Spannungszustand der Steuervorrichtung periodisch auf den genannten Minimalwert zurückgeführt wird.
6. Verfahren gemäss einem der Ansprüche 2 bis 5, dadurch gekennzeichnet, dass es auch darin besteht, an der Motorwicklung diese Korrekturantriebsimpulse anzulegen, während deren Dauer der Rotor jeden nach Abgabe eines normalen Antriebsimpulses nicht ausgeführten Schritt einholen kann.
7. Verfahren gemäss einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, dass die gemessene physikalische Grösse die durch die Rotorbewegung in die Wicklung induzierte Spannung ist.
8. Verfahren gemäss einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass die gemessene physikalische Grösse die Variation des Magnetflusses in der genannten Wicklung ist.
9. Vorrichtung zur Steuerung eines Schrittmotors zur Durchführung des Verfahrens gemäss Anspruch 1, umfassend Mittel zur Signalerzeugung, die ein Ausgangssignal immer dann abgeben, wenn der Rotor einen Schritt ausführen soll, Steuerungsmittel, um an die Motorwicklung nach Erhalt der von den Signalerzeugungsmitteln gelieferten Signale normale Antriebsimpulse anzulegen, mit dem Motor gekoppelte Mittel, um während jedem normalen Antriebsimpuls die die Rotorbewegung kennzeichnende physikalische Grösse zu messen und ein dieser Grösse entsprechendes Messsignal zu liefern, Mittel zur Erzeugung eines dem genannten Referenzpegel entsprechenden Referenzsignals, Mittel zur Lieferung eines Vergleichssignals zwischen dem genannten Messsignal und dem genannten Referenzsignal, und Mittel, die das genannte Vergleichssignal empfangen und auf die genannten Steuerungsmittel einwirken, um den genannten Antriebsimpuls zu einem Zeitpunkt zu unterbrechen, der in Abhängigkeit der Zeit gegeben ist, in der die genannte physikalische Grösse das genannte Referenzniveau erreicht, dadurch gekennzeichnet, dass sie ferner Erfassungsmittel (200, 201) umfasst, um den Zustand der Drehung oder Nichtdrehung des Rotors nach Abgabe der normalen Antriebsimpulse zu erfassen, und dass die Mittel (202) zur Erzeugung des genannten Referenzsignals (U's) so ausgebildet sind, dass sie den Wert dieses Signals in Abhängigkeit der von den genannten Erfassungsmitteln gelieferten tnformation ändern können.
10. Vorrichtung gemäss Anspruch 9, dadurch gekennzeichnet, dass die genannten Erfassungsmittel (200, 201) die vom Rotor nach Abgabe von normalen Antriebsimpulsen nicht ausgeführten Schritte ermitteln können, dass die Mittel zur Erzeugung des genannten Referenzsignals (U's) so ausgebildet sind, dass sie den Wert dieses Signals schrittweise zwischen einem Mindestwert (U'so) und einem Höchstwert (U'sp) ändern können, und dass der Wert des genannten Referenzsignals erhöht wird, wenn N nicht vom Rotor ausgeführte Schritte in einer bestimmten Zeitspanne ermittelt worden sind, wobei N gleich oder grösser als 1 ist.
11. Vortichtung gemäss Anspruch 10, dadurch gekennzeichnet, dass sie Mittel (226) umfasst, um den Wert des Referenzsignals (U' s) bei ihren ersten Unterspannungsnetzen auf den genannten Minimalwert (U'so) zu führen.
12. Vorrichtung gemäss Anspruch 10, dadurch gekennzeichnet, dass sie Mittel (226) umfasst, um den Wert des Referenzsignals (Us) auf den genannten Minimalwert (U'so) jedesmal dann zurückzuführen, wenn sie unter Spannung gesetzt wird.
13. Vorrichtung gemäss Anspruch 11 oder 12, dadurch gekennzeichnet, dass sie ferner Mittel (203) umfasst, um den Wert des Referenzsignals (U's) während ihres Spannungszustands periodisch auf den genannten Mindestwert (U'so) zurückzuführen.
14. Vorrichtung gemäss einem der Ansprüche 10 bis 13, dadurch gekennzeichnet, dass sie ausserdem Mittel (215, 218) umfasst, die mit den genannten Erfassungsmitteln verbunden sind, um an der Motorwicklung (10) Korrekturantriebsimpulse anzulegen, deren Dauer ausreichend ist, damit der Rotor jeden nach Abgabe eines normalen Antriebsimpulses nicht ausgeführten Schritt einholen kann.
15. Vorrichtung gemäss einem der Ansprüche 10 bis 14, dadurch gekennzeichnet, dass die genannten Erfassungsmittel (200, 201) das genannte Messsignal (Um) erhalten, um die vom Rotor nicht ausgeführten Schritte zu erfassen.
16. Vorrichtung gemäss einem der Ansprüche 9 bis 15, dadurch gekennzeichnet, dass die gemessene physikalische Grösse die durch die Rotorbewegung in die Wicklung induzierte Spannung ist.
17. Vorrichtung gemäss einem der Ansprüche 9 bis 15, dadurch gekennzeichnet, dass die gemessene physikalische Grösse die Variation des Magnetflusses in der genannten Wicklung ist.
EP84109303A 1983-08-12 1984-08-06 Verfahren und Vorrichtung zum Ansteuern eines Schrittmotors Expired EP0135104B1 (de)

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US4791343A (en) * 1987-08-31 1988-12-13 Allied-Signal Inc. Stepper motor shaft position sensor
US4851755A (en) * 1988-03-01 1989-07-25 Ampex Corporation Low power stepper motor drive system and method
JP3256342B2 (ja) * 1993-08-04 2002-02-12 ティーアールダブリュ オートモーティブ ジャパン株式会社 ステッピングモータの脱調検出装置
DE29609570U1 (de) * 1996-05-29 1996-10-24 Saia Ag, Murten Schaltung zum Erfassen des Aussertrittfallens eines Schritt- oder Synchronmotors
JP3541601B2 (ja) * 1997-02-07 2004-07-14 セイコーエプソン株式会社 ステッピングモーターの制御装置、その制御方法および計時装置
US6586898B2 (en) 2001-05-01 2003-07-01 Magnon Engineering, Inc. Systems and methods of electric motor control
JP4652610B2 (ja) * 2001-05-30 2011-03-16 セイコーインスツル株式会社 ステップモータの回転制御装置
JP2002365379A (ja) * 2001-06-11 2002-12-18 Seiko Instruments Inc アナログ電子時計
ES2425889T3 (es) * 2010-04-27 2013-10-17 Swiss Timing Ltd. Sistema de cronometraje de una competición deportiva que dispone de dos dispositivos de cronometraje
JP7219094B2 (ja) * 2019-01-11 2023-02-07 セイコーインスツル株式会社 アナログ電子時計、ステッピングモータ制御装置及びアナログ電子時計の制御方法

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JPS5477169A (en) * 1977-12-02 1979-06-20 Seiko Instr & Electronics Ltd Electronic watch
JPS55127897A (en) * 1979-03-26 1980-10-03 Janome Sewing Mach Co Ltd Pulse-motor-driving circuit
FR2459579A1 (fr) * 1979-06-21 1981-01-09 Suisse Horlogerie Detecteur d'avance d'un moteur pas a pas
GB2077002B (en) * 1980-05-21 1983-10-26 Berney Sa Jean Claude Electronic timepiece comprising a control circuit of the motor
JPS57106397A (en) * 1980-12-18 1982-07-02 Seiko Instr & Electronics Ltd Driving device for stepping motor
CH647383GA3 (de) * 1981-02-04 1985-01-31
CH644989GA3 (de) * 1981-03-18 1984-09-14

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DE3467645D1 (en) 1987-12-23
JPH0121719B2 (de) 1989-04-21
JPS6059995A (ja) 1985-04-06
HK32293A (en) 1993-04-08
EP0135104A1 (de) 1985-03-27
US4551665A (en) 1985-11-05
CH653850GA3 (de) 1986-01-31

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