EP0081827B1 - Semiconductor optical logic device - Google Patents
Semiconductor optical logic device Download PDFInfo
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- EP0081827B1 EP0081827B1 EP82111464A EP82111464A EP0081827B1 EP 0081827 B1 EP0081827 B1 EP 0081827B1 EP 82111464 A EP82111464 A EP 82111464A EP 82111464 A EP82111464 A EP 82111464A EP 0081827 B1 EP0081827 B1 EP 0081827B1
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- light
- light sensitive
- emitting
- emitting elements
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- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 5
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- 229910000154 gallium phosphate Inorganic materials 0.000 description 5
- LWFNJDOYCSNXDO-UHFFFAOYSA-K gallium;phosphate Chemical compound [Ga+3].[O-]P([O-])([O-])=O LWFNJDOYCSNXDO-UHFFFAOYSA-K 0.000 description 5
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/12—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto
- H01L31/16—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources
- H01L31/167—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto the semiconductor device sensitive to radiation being controlled by the light source or sources the light sources and the devices sensitive to radiation all being semiconductor devices characterised by at least one potential or surface barrier
Definitions
- the present invention generally relates to a semiconductor optical logic device. More specifically, the present invention relates to a novel semiconductor optical logic device including a light sensitive element composed of non-single cystalline semiconductor such as amorphous semiconductor (including that which is partially microcrystallized), polycrystalline semiconductor, or the like.
- a semiconductor optical logic device having the features indicated in the precharacterizing portion of claim 1 is known from GB-A-1080732.
- a principal object of the present invention met by the features of the characterizing portion of claim 1 is to provide a novel semiconductor optical logic device including a light sensitive element comprised of non-single crystalline semiconductor such as amorphous semiconductor, polycrystalline semiconductor, or the like.
- a semiconductor optical logic device in accordance with the present invention comprises a plurality of light-emitting elements each being independently responsive to an input signal for emitting light, and one or more light sensitive elements comprised of non-single crystalline semiconductor for commonly receiving or for individually receiving the light from the respective light-emitting elements for converting the light into an electrical signal, wherein a logical output of the input signals applied to the plurality of light-emitting elements is obtained in response to the outputs from one or more light sensitive elements.
- a device of a response rate can be achieved which is comparable to that in case where single crystalline semiconductor is utilized, in spite of the fact that non-single crystalline semiconductor is utilized.
- devices can be manufactured with a little manufacturing energy and with simplified steps on a continual mass production basis as compared with a case of single crystalline semiconductor.
- a very layer can be formed using plasma reaction (glow discharge), sputtering, or the like, an approximate flat substrate surface can be readily provided in forming an amorphous semiconductor layer. Since amorphous semiconductor can be grown anywhere in any condition of the substrate after once such an approximate flat substrate surface is attained, it becomes possible to make photocoupling pairs in a multilayer fashion or in three-dimensional manner, whereby the degree of integration can be enhanced.
- Fig. 1 shows one embodiment of the present invention.
- the reference numeral 1 denotes a transparent insulating substrate of glass, heat resistive plastic or the like
- the reference characters 2a and 2b denote first and second light-emitting elements disposed on one main surface 1a of one of the insulating substrate 1
- the reference characters 3a and 3b denote first and second light sensitive elements formed on the other main surface 1b of the insulating substrate 1, the first and second light-emitting elements 2a and 2b and the first and second light sensitive elements 3a and 3b, respectively, being faced to each other with the insulating substrate 1 therebetween.
- the above described first and second light-emitting elements 2a and 2b are made of a single crystal of gallium phosphate (GaP), for example, and a portion of the electrode surface is deposited on one main surface 1a of the insulating substrate 1 as shown in Fig. 2 through a conductive adhesive agent 4 of such as a silver paste as pattern screen processed so as not to interrupt light transmitting through the insulating substrate 1.
- the other electrode surface of the above described first and second light-emitting elements 2a and 2b is coupled to an electrode film 6 formed on the insulating substrate 1 through wire leads 5a and 5b.
- the first and second light sensitive elements 3a and 3b formed on the other main surface 1b of the insulating substrate 1 are structured to be layered such that an amorphous semiconductor layer 8 of a PIN junction type, for example, is deposited on a transparent electrode film 7, as patterned, of tin oxide (Sn0 2 ), indium oxide (In 2 0 3 ), indium: tin oxide (in 2 O 3 :SnO 2 ), or the like on the insulating substrate 1 and then a metallic electrode film 9 of aluminum or the like is layered thereon.
- the metallic electrode film 9 of the first light sensitive element 3a is coupled to the transparent electrode film 7 of the second light sensitive element 3b extending on and contiguous to the insulating substrate 1.
- the first light sensitive element 3a and the second light sensitive element 3b are placed in a series connection.
- a-Si:H amorphous silicon
- the time is controlled to obtain a desired thickness for each.
- the above described amorphous silicon semiconductor layer 8 is photoetched to define a predetermined pattern or is subjected to a plasma pattern etching or the like to form a pattern.
- the amorphous silicon semiconductor layer 8 may be selectively formed using a metallic mask without using the above described method.
- a metallic electrode film 9 of aluminum is evaporated on the above described amorphous silicon semiconductor layer 8 and a patterning process is performed through etching so that the first light sensitive element 3a and the second light sensitive element 3b may be placed in a series connection.
- the first and second light sensitive elements 3a and 3b made of the PIN junction type amorphous silicon semiconductor layer 8 have the light sensitive central wavelength ⁇ 1 at approximately 580 nm.
- Such light sensitive element may be structured in accordance with the teaching in United States Patent No. 4,281,208 issued July 28, 1981.
- the first and second light-emitting elements 2a and 2b are implemented using light-emitting diode pellets of green color made of a GaP single crystal of ⁇ 2 ⁇ 565 nm so that the central wavelength ⁇ 1 of the first and second light sensitive elements 3a and 3b may be consistent with the central wavelength ⁇ 2 of light emission. Then face down bonding is made to one electrode surface of the above described LED pellets, as shown by the dotted line, through a conductive adhesive agent 4 as pattern screen processed as shown in Fig. 2, on one main surface 1a to which the light sensitive elements 2a and 2b of the insulating substrate 1 are faced.
- first and second light-emitting elements 2a and 2b are connected to the above described conductive adhesive agent 4 and the electrode film 6 so as to be independently responsive to a supply of an input signal to emit light.
- lead frames 10 and 11 serving as input lines of the first and second light-emitting elements 2a and 2b and output lines of the first and second light sensitive elements 3a and 3b are coupled, whereupon the composite is molded with a molding material 12 for interrupting incident light as shown in Fig. 1, thereby to complete a semiconductor optical logical device.
- the light sensitive end of the thus manufactured semiconductor optical logical device comprises the first and second light sensitive elements 3a and 3b placed in a series connection and the same can be shown in an equivalent circuit diagram as shown in Fig. 3. More specifically, the light sensitive elements 3a and 3b can be repesented as an inverted parallel connection of direct current sources 13a and 13b and diodes 14a and 14b, respectively.
- the reference character R denotes a load resistance connected between the output terminals 15 and 16.
- the first light-emitting element 2a When the input signal is supplied through the lead frames 10 and 10 to the first light-emitting element 2a, the first light-emitting element 2a operates to emit light, which transmits through the insulating substrate 1 and is emitted to impinge upon the opposing first light sensitive element 3a.
- the first light senistive element 3a as illuminated produced electrons and holes in the free state mainly at the I-type layer of the amorphous silicon semiconductor layer 8 and the electrons and the holes move so as to be attracted by the PIN junction electric field, thereby to produce a photovoltaic force between the transparent electrode film 7 and the metallic electrode film 9.
- the opposing second light sensitive element 3b is placed in a state of a diode 14b in a reverse direction to the direct current source 13a caused by the above described photoelectromotive force. Accordingly, no photoelectric current flows through the load resistor R and no output is obtained between the output terminals 15 and 16.
- the second light sensitive element 3b turns from the state of the reverse directional diode 14b to a forward directional direct current source 13b, whereby a photocurrent flows through the load resistor R.
- an output signal is obtained between the output terminals 15 and 16.
- Fig. 5 shows another embodiment of the present invention and the feature thereof resides in formation of the first and second light-emitting elements 2a and 2b with amorphous semiconductor.
- formation is made using plasma reaction in the same manner as the light sensitive element 3a and 3b. More specifically, after the transparent electrode film 17 is formed in a predertermined pattern on one main surface of the insulating substrate 1, a reaction gas including 70% of silane SiH 4 and 30% of methane CH 4 is introduced, thereby to provide an amorphous silicon carbide (a-SiC:H) semiconductor layer 18 of the PIN junction type.
- B 2 H 6 and PH 3 are used each at the concentrations of 1000 ppm as an impurity gas for controlling the P-type and the N-type, respectively.
- the respective film thicknesses of the thus obtained PIN layers are in succession 100 to 200 A, 5000 A, and 500 A, respectively, wherein the central wavelength ⁇ 3 of light emission was 680 nm.
- amorphous semiconductor light-emitting element may be implemented in accordance with the teaching in United States Patent No. 4,069,492 issued January 17, 1978.
- the first and second light sensitive elements 3a and 3b of the previous embodiment comprise amorphous silicon semiconductor layer 8, the same are inconvenient to the present embodiment because the central wavelength ⁇ 1 is 580 nm. Therefore, in the embodiment in description the first and second light sensitive elements 3a and 3b are implemented using an amorphous silicon germanium (a-SiGe:H) semiconductor layer 8 having the central wavelength ⁇ 4 being 680 nm which is the same as that of the above described light-emitting elements 2a and 2b.
- the reaction gas introduced at that time is 60% of silane (SiH 4 ) and 40% of germane (GeH 4 ).
- the inventive device can be manufactured at an inexpensive cost by using amorpous semiconductor for the light-emitting elements 2a and 2b and the metallic electrode film 19 can be formed to extend on the insulating substrate 1 without the wire leads 5a and 5b, with the result that disconnection of the wire leads 5a and 5b in filling a molding material 20 can be avoided.
- a micro-crystallization of amorphous semiconductor for the light-emitting elements and the light sensitive elements a high efficieny can attained without decreasing an optical forbidden band width.
- Such micro-crystallization of amorphous semiconductor can be readily attaind by increasing a high frequency power on the occusion of the above described plasma reaction to be as large as ten times and by increasing the concentration of hydrogen.
- the amorphous semi- condoctor layers 8 and 18 exhibit a characteristic in which the light emission central wavelength have been shifted toward a wavelength longer than the light sensitive central wavelength in comparison of a case where a light-emitting element is formed with the same material and a case where the light sensitive element is formed with the same material, and any element having the sensitivity not only in a visible region but also in an ultraviolet or in an infrared region can be readily formed by properly selecting the composition and the composistion ratio of the reaction gas.
- Fig. 6 shows another embodiment of the present invention, in which the reference character 20 denotes an insulating substrate of glass, heat resistive plastic, ceramic or the like, and the reference characters 2a and 2b denote first and second light-emitting elements disposed on one main surface of the insulating substrate 20, wherein the light-emitting elements 2a and 2b have a sandwich structure in which the amorphous semiconductor layer 18 is sandwiched between a metallic electrode film 19 of stainless steel or the like and a transparent electrode film 17 at both the front and rear surfaces of the amorphous semiconductor layer 18.
- the reference character 1' denotes a transparent insulating film of silicon dioxide (Si0 2 ), silicon nitride (Si 3 N 4 ) or the like covering the light-emitting surface of the first and second light-emitting elements 2a and 2b
- the reference characters 3a and 3b denote first and second light sensitive elements facing to the first and second light-emitting elements 2a and 2b formed on the above described transparent insulating film 1', wherein the light sensitive elements 3a and 3b have a sandwich structure in which the transparent electrode film 7, the amorphous semiconductor layer 8 and the metallic electrode film 9 are in succession layered from the light receiving surface.
- the metallic electrode film 9 of the first light sensitive element 3 is coupled to the transparent electrode film 7 of the second light sensitive element 3 extending on and contiguous to the transparent insulating film 1'.
- the first light sensitive element 3a and the second light sensitive element 3b are connected to be in a series connection.
- the reference character 21 denotes a protection film of Si0 2 , Si0 3 N 4 or the like covering the surface of the above described light sensitive elements 3a and 3b
- the reference characters 22 and 23 denote lead wires for withdrawing a series connection output of the light sensitive elements 3a and 3b through a contact hole formed on the above described protection film 21.
- a metallic electrode film 19 of stainless steel is deposited by sputtering on the insulating substrate 20 made of aluminum ceramic and the same is patterned in a desired shape by etching.
- the insulating substrate 20 having the metallic electrode film 19 as patterned is disposed between the reaction electrodes of the plasma reaction furnace and a reaction gas and an impurity gas are suitably introduced with the above described insulating substrate 20 heated at approximately 300°C.
- amorphous silicon carbide layer 18 of a PIN junction type for example, silane (SiH 4 ) and methane (CH 4 ) are used as a reaction gas and diborane (B 2 H 6 ) is used as an impurity gas for determing the P-type, and phosphine (PH 3 ) is used as an impurity gas for determining the N-type.
- the mixture ratio of these gases are selected such that SiH 4 is 70%, CH 4 is 30%, and B 2 H 6 and PH 3 are each 1000 ppm.
- a high frequency electric power of 13.56 MHz and 100 W is applied between the reaction electrodes.
- the P-type layer of approximately 100 ⁇ , the I-type layer of approximately 5000 A, and the N-type layer of approximately 300 A in thickness are grown.
- the growth rate of the above described amorphous silicon carbide layer 18 is approximately 1pm/hrfor each layer and therefore the time is controlled to obtain a desired thickness as described above for each.
- the amorphous silicon carbide layer 18 is formed in a predetermined pattern by photoech- ing, plasma eching or the like. Alternatively, the amorphous silicon carbide layer 18 may be selectively formed using a metallic mask and by not using the above described means. Finally a transparent electrode film 17 of indium oxide (In 2 O 3 ), tin oxide (Sn0 2 ), indium:tin oxide (In 2 0 3 : Sn0 2 ) orthe like is deposited by evapoation on the amorphous silicon carbide layer 18. Then the transparent electrode film 17 is patterned, thereby to complete the first and second light-emitting elements 2a and 2b. The first and second light-emitting elements 2a and 2b made of such PIN junction type amorphous silicon carbide layer 18 has the light emission central wavelength ⁇ 1 at approximately 680 nm.
- the transparent insulating film 1' of Si0 2 is formed to a film thickness of several microns (um) by a chemical vapor deposition process on the above described first and second light-emitting elements 2a and 2b and the surface thereof is made even.
- the first and second light sensitive elements 3a and 3b are layered on the above described transparent insulating film 1'.
- First the transparent electrode film 7 is deposited on the surface of the transparent insulating film 1' as a substrate surface and then the same is patterned.
- an amorphous silicon germanium (a-SiGe:H) layer 8 of the PIN junction type is formed through plasma reaction.
- the reaction gas introduced at that time consists of silane (SiH 4 ) by 60% and germane (GeH 4 ) by 40%.
- the other conditions may be the same as those for the amorphous silicon carbide layer 18 of the light-emitting elements 2a and 2b.
- the metallic electrode film 9 of aluminum is vapored on the amorphous silicon germanium layer 8 and the same is etched to be patterned so that the first light sensitive element 3a and the second light sensitive element 3b may be connected in a series connection.
- the first and second light sensitive elements 3a and 3b thus made of the amorphous silicon germanium layer 8 of the PIN junction type have the light emission central wavelength N 2 at 680 nm which is the same as the light emission central wavelength ⁇ 1 of the first and second light-emitting elements 2a and 2b.
- the protecting film 21 of Si0 2 is deposited and the lead wires 22 and 23 are coupled, whereupon the composite is molded with the molding material 12 for interrupting incident light, thereby to complete a semiconductor photocoupling device.
- the light receiving side of the semiconductor photocoupling device or the optical logical device thus manufactured includes a series connection of the first and second light sensitive elements 3a and 3b, which can be shown in an equivalent circuit diagram as shown in Fig. 3.
- a logical sum product can be obtained between the output terminals 15 and 16 if and when at least either the first or the second light-emitting element 2a or 2b emits light.
- the amorphous semiconductor has a characterisitic in which the light emission central wavelength ⁇ , has been shifted toward a longer wavelength as compared with the light sensitive central wavelength A 2 in comparison of the case where the light-emitting elements 2a and 2b are made of the same material and the case where the light sensitive elements 3a and 3b are made of the same material. Therefore, in the above described embodiment the light-emitting elements 2a and 2b are made of amorphous silicon carbide and the light sensitive elements 3a and 3b are made of amorphous silicon germanium having the light sensitive central wavelength X 2 being approximately at 680 nm which is the light emission central wavelength ⁇ 1 of the above described amporphous silicon carbide.
- Fig. 7 is a further embodiment of the present invention, which is an expansion of the Fig. 6 embodiment. More specifically, assuming that a pair of semiconductor optical logical devices comprising the first and second light-emitting elements 2a and 2b and the first and second light sensitive elements 3a and 3b as shown in Fig. 6 is a first photocoupling pair or an optical logical circuit OLC1, then the Fig. 7 embodiment comprises a multilayer including a second optical logical circuit OLC2 having the first and second light-emitting elements 2a and 2b and the first and second light sensitive elements 3a and 3b laminated on the first optical logical circuit OLC1.
- a metallic light shielding member 24 of stainless steel or the like is disposed between the first optical logical circuit OLC1 and the second optical logical circuit OLC2 with the same insulated, so that light transmission therebetween may be interrupted.
- the above described metallic light shielding member 24 may not be necessarily provided, inasmuch as the light sensitive elements 3a and 3b of the first optical logical circuit OLC1 and the light-emitting elements 2a and 2b of the second optical logical circuit OLC2 are faced to each other through the respective metallic electrode films 9 and 19 and the metallic electrode films 9 and 19 serve as a light shielding member.
- the light-emitting elements 2a and 2b, and 2a and 2b and the light sensitive elements 3a and 3b, and 3a and 3b thus made of amorphous semiconductor does not require any specific technology such as a graphoepitaxial technology, a laser anneal technology or the like, as is dfferent from the case of single crystalline semiconductor, and hence can be implemented in a multilayer structure with extreme case.
- optical logical circuit was structured to comprise one set of two light-emitting elements and one set of two light sensitive elements, the same may be structured to comprise one set of one light-emitting element and one set of one light sensitive element, or to comprise one set of three or more elements for the light-emitting elements and the light sensitive elements.
- a multilayer structure is not limited to a two-layer structure but also may be a three-layer structure, a four-layer structure or the like.
- the thickness of the elements OLC1 and OLC2 per se is selected to be several pm and the thickness of the transparent insulating film 1' is selected to be 5 to 6 um in a structure having the optical logical circuit laminated as in the case of the above described embodiment, a device of a very small thickness and of flatness as a whole can be provided. If the transparent insulating film 1' between the light-emitting elements and the light sensitive elements is thus thin, there is no mutual interference of light in the adjacent photocoupling and accordingly malfunction due to the so-called cross talk can be avoided.
- Fig. 8 is a graph showing a spectral response of PIN junction type amorphous silicon and single crystalline silicon. More specifically, the spectrum light sensitivity of amorphous silicon exhibits a single peak characteristic having the light sensitive peak wavelength A o at approximately 580 nm as shown by the solid line. On the other hand, the single crystalline silicon exhibits an easy slope mountain shaped characteristic having a wide range of 400 to 1000 nm in wavelength as shown by the dotted line.
- Fig. 9 is a sectional view of the embodiment, wherein the reference character 1 denotes a tranparent insujating substrate of glass, heat resistive plastic or the like, the reference character 3 denotes a light sensitive element having a spectral response as shown in Fig. 11 in which the light sensitive peak comes to the wavelength ⁇ 3 .
- the light sensitive element 3 has a layered structure in which the transparent electrode film 7, the amorphous semiconductor layer 8 and the metallic electrode film 9 are in succession laminated on one main surface of the insulating substrate 1.
- the reference characters 2a' and 2b' denote the first and second light sources faced to the above described light sensitive element 3 formed on the other main surface of the above described insulating substrate 1 and made of light-emitting diode pellets, for example, where in the respective light sources 2a' and 2b' emit light of the first wavelength region which is of a wavelength longer than the peak wavelength ⁇ 3 and light of the second wavelength region which is of a wavelength shorter than the peak wavelength ⁇ 3 .
- the reference character 6' denotes a common electrode film for the electrode of one of the first and second light sources 2a' and 2b', which common electrode film is made of a conductive adhesive agent of silver paste or the like and is pattern screened in an E letter shaped as shown in Fig.
- the reference characters 5a and 5b denote wire leads for connecting the electrode of the other of the first and second light sources 2a' and 2b' and the electrodes pads 6a and 6b on the insulating substrate 1, the reference characters 10, 11,... denote lead frames for supplying an input signal in the above described first and second light sources 2a' and 2b' and for withdrawing an output signal in the light sensitive element 3, wherein the respective lead frames 10, 11,... are electrically and mechanically fixed through a conductive adhesive agent or the like to the respective electrode films 6', 6a, 6b, 7 and 9.
- the reference character 12 denotes a molding material for molding the first and second light sources 2a' and 2b' for interrupting incident light.
- Such amorphous silicon is formed by introducing silane (SiH 4 ) as a reaction gas into a plasma reaction furnace and by supplying a high frequency electric power between the reaction electrodes.
- silane SiH 4
- diborane B 2 H 6
- PH 3 N-type layer phosphine
- the growth rate is controlled to provide a PIN junction having the respective film thicknesses of approximately 100 A for the P-type layer, approximately 5000 A for the I-type (non-doped) layer and approximately 300 A forthe N-type layer.
- the light sensitive peak wavelength k o of the above described PIN junction type amorphous silicon is approximately 580nm.
- the light emission wavelengths ⁇ a and A b of the first and second light sources 2a' and 2b' are set with reference to approximately 580 nm which is the peak wavelength Ao of the above described light sensitive element 3.
- the first light source 2a' employs a red color light-emitting diode pellet of the light emission wavelength ⁇ b of 700 nm made of gallium phosphate (GaP) and the second light source 2 may employ a blue color light-emitting diode pellet of the light emission wavelength h b of 460 nm made of silicon carbide (SiC).
- the first light source 2a' operates to emit light, which transmit through the transparent insulating substrate 1 and the transparent electrode film 7 to impinge upon the light sensitive element 3 facing thereto.
- the light emission wavelength ⁇ a of the first light source 2a' for emitting light is 700 nm as described above and the peak wavelength ⁇ o of the light sensitive element 3 upon which light impinges is 580 nm and therefore the light of 700 nm is absorbed by the N-type layer of the amorphous silicon layer 8, with the result that an output Pa of a low level smaller than a predetermined level Pth can only be obtained as shown in Fig. 12.
- the same when an input signal is supplied to the second light source 2a' of the light emission wavelength A b of 460 nm, the same likewise operates to emit light to impinge upon the light sensitive element 3.
- the light of 460 nm reaches the amorphous silicon layer 8 of the light sensitive element 3 to be absorbed by the P-type layer. Accordingly, the output Pb obtained by light emission only of the second light source 2b becomes a low level lower than the predetermined level Pth.
- the output Pa of the low level could be obtained by the light emission of only the first light source 2a' and only the output Pb of the low level could be obtained by the light emission of only the second light source 2b'; however, by causing light emission simultaneously from both of the light sources 2a' and 2b', the output Po of a high level higher than the predetermined level Pth is obtained. More specifically, the output of the light sensitive element 3 becomes larger than the predetermined level Pth, only if and when the first and second light sources 2a' and 2b' make light-emitting operations simultaneously. Accordingly, the output obtained from the light sensitive element 3 becomes a logical product of the input signals of the first and second light sources 2a' and 2b'.
- germane (GH 4 ) is doped into the reaction gas for the purpose of increasing the relative sensitivity of the first wavelength region of the longer wavelength so that the N-type layer may be changed to be of amorphous silicon germanium; silane (SiH 4 ) is doped into methane (CH 4 ) in order to increase the relative sensitivity of the second wavelength region of the shorter wavelength side so that the P-type layer may be changed to be of amorphous silicon carbide.
- the amorphous semiconductor can be formed so that the light sensitive peak wavelength may be determined as desired without being limited to only the above described embodiment.
- the light sources 2a' and 2b' may be made of amorphous semiconductor.
- the wire leads 5a and 5b can be dispensed with, as is different in the case of the light-emitting diode pellets, and thus a possibility of disconnection on the occasion of molding can be avoided.
- the example of employing the PIN junction was shown in the foregoing description, alternatively a PN junction, a heteroface junction, or a Schottky junction may be employed.
- the effect of the present invention is achieved even in the case where the amorphous semiconductor layer forming the light sensitive element does not have a junction form for generating a photoelectromotive force in response to light impingement as described above and instead utilizes a photoconductive effect exhibiting an increasing conductivity in response to light impingement.
- a PN junction a heteroface junction
- a Schottky junction may be employed.
- the effect of the present invention is achieved even in the case where the amorphous semiconductor layer forming the light sensitive element does not have a junction form for generating a photoelectromotive force in response to light impingement as described above and instead utilizes a photoconductive effect exhibiting an increasing conductivity in response to light impingement.
- the light of a shorter wavelength acts on a relatively shallow portion of the substrate and the light of a longer wavelength reaches to a deep portion of the substrate, with the result that the light sensitive elements are rendered conductive only if and when two kinds of the light are caused to impinge upon simultaneously. This means that a logical product circuit is provided.
- Such differentiation of the light emission central wavelength of the light-emitting element or the peak wavelength of the spectral response of the light senistive element could be achieved with simplicity by simply changing the composition of the semiconductor layer, as described previously, by changing the composition of the gas being introduced to the reaction furnace in the case of amorphous semiconductor, for example.
Description
- The present invention generally relates to a semiconductor optical logic device. More specifically, the present invention relates to a novel semiconductor optical logic device including a light sensitive element composed of non-single cystalline semiconductor such as amorphous semiconductor (including that which is partially microcrystallized), polycrystalline semiconductor, or the like.
- A semiconductor optical logic device having the features indicated in the precharacterizing portion of
claim 1 is known from GB-A-1080732. - A principal object of the present invention met by the features of the characterizing portion of
claim 1 is to provide a novel semiconductor optical logic device including a light sensitive element comprised of non-single crystalline semiconductor such as amorphous semiconductor, polycrystalline semiconductor, or the like. - A semiconductor optical logic device in accordance with the present invention comprises a plurality of light-emitting elements each being independently responsive to an input signal for emitting light, and one or more light sensitive elements comprised of non-single crystalline semiconductor for commonly receiving or for individually receiving the light from the respective light-emitting elements for converting the light into an electrical signal, wherein a logical output of the input signals applied to the plurality of light-emitting elements is obtained in response to the outputs from one or more light sensitive elements.
- According to the present invention, since the input signal is once converted into a light signal, a device of a response rate can be achieved which is comparable to that in case where single crystalline semiconductor is utilized, in spite of the fact that non-single crystalline semiconductor is utilized. Furthermore, by employing amorphous semiconductor, devices can be manufactured with a little manufacturing energy and with simplified steps on a continual mass production basis as compared with a case of single crystalline semiconductor. In addition, since a very layer can be formed using plasma reaction (glow discharge), sputtering, or the like, an approximate flat substrate surface can be readily provided in forming an amorphous semiconductor layer. Since amorphous semiconductor can be grown anywhere in any condition of the substrate after once such an approximate flat substrate surface is attained, it becomes possible to make photocoupling pairs in a multilayer fashion or in three-dimensional manner, whereby the degree of integration can be enhanced.
- These objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
-
- Fig. 1 is a sectional view showing one embodiment of the present invention;
- Fig. 2 is a diagrammatic view showing an arrangement of the elements of the Fig. 1 embodiment;
- Fig. 3 is an equivalent circuit diagram of the Fig. 1 embodiment;
- Fig. 4 is another example of such equivalent circuit diagram;
- Fig. 5 is a sectional view of another embodiment of the present invention;
- Fig. 6 is a sectional view of a further embodiment of the present invention;
- Fig. 7 is a sectional view of a preferred embodiment of the Fig. 6 embodiment;
- Fig. 8 is a graph showing a spectral response of a light sensitive element;
- Fig. 9 is a sectional view showing still a further embodiment of the present invention;
- Fig. 10 is a diagrammatic view showing an arrangement of the elements of the Fig. 9 embodiment;
- Fig. 11 is a graph showing a relation between the intensity and the wavelength of the light of the light-emitting element of the Fig. 9 embodiment; and
- Fig. 12 is a graph showing the output from the light sensitive element of the Fig. 9 embodiment.
- Fig. 1 shows one embodiment of the present invention. Referring to the figure, the
reference numeral 1 denotes a transparent insulating substrate of glass, heat resistive plastic or the like, thereference characters insulating substrate 1, and thereference characters insulating substrate 1, the first and second light-emittingelements sensitive elements insulating substrate 1 therebetween. - The above described first and second light-emitting
elements insulating substrate 1 as shown in Fig. 2 through a conductiveadhesive agent 4 of such as a silver paste as pattern screen processed so as not to interrupt light transmitting through theinsulating substrate 1. The other electrode surface of the above described first and second light-emittingelements electrode film 6 formed on theinsulating substrate 1 through wire leads 5a and 5b. - On the other hand, the first and second light
sensitive elements insulating substrate 1 are structured to be layered such that anamorphous semiconductor layer 8 of a PIN junction type, for example, is deposited on atransparent electrode film 7, as patterned, of tin oxide (Sn02), indium oxide (In203), indium: tin oxide (in2O3:SnO2), or the like on theinsulating substrate 1 and then ametallic electrode film 9 of aluminum or the like is layered thereon. Themetallic electrode film 9 of the first lightsensitive element 3a is coupled to thetransparent electrode film 7 of the second lightsensitive element 3b extending on and contiguous to theinsulating substrate 1. As a result, the first lightsensitive element 3a and the second lightsensitive element 3b are placed in a series connection. - Now a more specific embodiment will be described in conjuction with a manufacturing process thereof.
- First the
transparent electrode film 7 is deposited by evaporation or sputtering and patterned on theinsulating substrate 1 made of glass and then theinsulating substrate 1 is disposed between reaction electrodes of a plasma reaction furnace. Then with theinsulating substrate 1 heated at approximately 300°C in the reaction furnace, a silane (SiH4) gas and an impurity gas of diborane (B2H6) at the concentration of 1000 ppm are introduced in the reaction furnace. Then a high frequency electric power of 13.56 MHz and 100 W is applied to the above described reaction electrodes, whereby amorphous silicon (a-Si:H) of P-type is obtained on theinsulating substrate 1 with the thickness of approximately 100 Å. (1 A=0.1 nm). Thereafter only B2H, gas is removed and I-type a-Si:H is deposited at the thickness of approximately 5000 Å. Then phosphine (PH3) serving as an impurity gas is mixed thereinto at the concentration of 1000 ppm, so that N-type a-Si:H is formed with the thickness of approximately 300 A, whereby an amorphous silicon (a-Si:H) semiconductor layer having a PIN junction with the respective PIN layers laminated from theinsulating substrate 1 is provided. - Meanwhile, since the growth rate of the above described a-Si:H is approximately 1 um/hr for each of the layers, the time is controlled to obtain a desired thickness for each.
- Then the above described amorphous
silicon semiconductor layer 8 is photoetched to define a predetermined pattern or is subjected to a plasma pattern etching or the like to form a pattern. Alternatively, the amorphoussilicon semiconductor layer 8 may be selectively formed using a metallic mask without using the above described method. Finally, ametallic electrode film 9 of aluminum is evaporated on the above described amorphoussilicon semiconductor layer 8 and a patterning process is performed through etching so that the first lightsensitive element 3a and the second lightsensitive element 3b may be placed in a series connection. - The first and second light
sensitive elements silicon semiconductor layer 8 have the light sensitive central wavelength À1 at approximately 580 nm. - One example of such light sensitive element may be structured in accordance with the teaching in United States Patent No. 4,281,208 issued July 28, 1981.
- On the other hand, the first and second light-emitting
elements sensitive elements adhesive agent 4 as pattern screen processed as shown in Fig. 2, on one main surface 1a to which the lightsensitive elements insulating substrate 1 are faced. Then the other electrode surface is bonded to theelectrode film 6 formed on theinsulating substrate 1 using the wire leads 5a and 5b. These first and second light-emittingelements adhesive agent 4 and theelectrode film 6 so as to be independently responsive to a supply of an input signal to emit light. - Then finally lead
frames elements sensitive elements molding material 12 for interrupting incident light as shown in Fig. 1, thereby to complete a semiconductor optical logical device. - The light sensitive end of the thus manufactured semiconductor optical logical device comprises the first and second light
sensitive elements sensitive elements current sources diodes 14a and 14b, respectively. In Fig. 3 the reference character R denotes a load resistance connected between theoutput terminals - When the input signal is supplied through the
lead frames emitting element 2a, the first light-emitting element 2a operates to emit light, which transmits through theinsulating substrate 1 and is emitted to impinge upon the opposing first lightsensitive element 3a. The first lightsenistive element 3a as illuminated produced electrons and holes in the free state mainly at the I-type layer of the amorphoussilicon semiconductor layer 8 and the electrons and the holes move so as to be attracted by the PIN junction electric field, thereby to produce a photovoltaic force between thetransparent electrode film 7 and themetallic electrode film 9. However, since the second light-emittingelement 2b is not in a light emission activated state, the opposing second lightsensitive element 3b is placed in a state of adiode 14b in a reverse direction to the directcurrent source 13a caused by the above described photoelectromotive force. Accordingly, no photoelectric current flows through the load resistor R and no output is obtained between theoutput terminals - On the other hand, if and when an input signal is applied to the second light-emitting
element 2b to emit light in such a state, the second lightsensitive element 3b turns from the state of the reversedirectional diode 14b to a forward directional directcurrent source 13b, whereby a photocurrent flows through the load resistor R. As a result, an output signal is obtained between theoutput terminals sensitive elements emitting elements - Likewise, by connecting the first light
sensitive element 3a and the second lightsensitive element 3b in a parallel relation as shown in Fig. 4, a logical sum can be obtained between theoutput terminals emitting element - Fig. 5 shows another embodiment of the present invention and the feature thereof resides in formation of the first and second light-emitting
elements sensitive element transparent electrode film 17 is formed in a predertermined pattern on one main surface of theinsulating substrate 1, a reaction gas including 70% of silane SiH4 and 30% of methane CH4 is introduced, thereby to provide an amorphous silicon carbide (a-SiC:H)semiconductor layer 18 of the PIN junction type. B2H6 and PH3 are used each at the concentrations of 1000 ppm as an impurity gas for controlling the P-type and the N-type, respectively. The respective film thicknesses of the thus obtained PIN layers are in succession 100 to 200 A, 5000 A, and 500 A, respectively, wherein the central wavelength λ3 of light emission was 680 nm. - Meanwhile, one example of such amorphous semiconductor light-emitting element may be implemented in accordance with the teaching in United States Patent No. 4,069,492 issued January 17, 1978.
- On the other hand, although the first and second light
sensitive elements silicon semiconductor layer 8, the same are inconvenient to the present embodiment because the central wavelength À1 is 580 nm. Therefore, in the embodiment in description the first and second lightsensitive elements semiconductor layer 8 having the central wavelength À4 being 680 nm which is the same as that of the above described light-emittingelements - According to such structure, the inventive device can be manufactured at an inexpensive cost by using amorpous semiconductor for the light-emitting
elements metallic electrode film 19 can be formed to extend on the insulatingsubstrate 1 without the wire leads 5a and 5b, with the result that disconnection of the wire leads 5a and 5b in filling amolding material 20 can be avoided. By using a micro-crystallization of amorphous semiconductor for the light-emitting elements and the light sensitive elements, a high efficieny can attained without decreasing an optical forbidden band width. Such micro-crystallization of amorphous semiconductor can be readily attaind by increasing a high frequency power on the occusion of the above described plasma reaction to be as large as ten times and by increasing the concentration of hydrogen. - As described previously, the amorphous semi-
condoctor layers - Fig. 6 shows another embodiment of the present invention, in which the
reference character 20 denotes an insulating substrate of glass, heat resistive plastic, ceramic or the like, and thereference characters substrate 20, wherein the light-emittingelements amorphous semiconductor layer 18 is sandwiched between ametallic electrode film 19 of stainless steel or the like and atransparent electrode film 17 at both the front and rear surfaces of theamorphous semiconductor layer 18. The reference character 1' denotes a transparent insulating film of silicon dioxide (Si02), silicon nitride (Si3N4) or the like covering the light-emitting surface of the first and second light-emittingelements reference characters elements sensitive elements transparent electrode film 7, theamorphous semiconductor layer 8 and themetallic electrode film 9 are in succession layered from the light receiving surface. Themetallic electrode film 9 of the first lightsensitive element 3 is coupled to thetransparent electrode film 7 of the second lightsensitive element 3 extending on and contiguous to the transparent insulating film 1'. As a result, the first lightsensitive element 3a and the second lightsensitive element 3b are connected to be in a series connection. Thereference character 21 denotes a protection film of Si02, Si03N4 or the like covering the surface of the above described lightsensitive elements reference characters sensitive elements protection film 21. - Now a specific embodiment will be described in conjunction with a manuracturing process thereof.
- First a
metallic electrode film 19 of stainless steel is deposited by sputtering on the insulatingsubstrate 20 made of aluminum ceramic and the same is patterned in a desired shape by etching. The insulatingsubstrate 20 having themetallic electrode film 19 as patterned is disposed between the reaction electrodes of the plasma reaction furnace and a reaction gas and an impurity gas are suitably introduced with the above described insulatingsubstrate 20 heated at approximately 300°C. In forming the amorphoussilicon carbide layer 18 of a PIN junction type, for example, silane (SiH4) and methane (CH4) are used as a reaction gas and diborane (B2H6) is used as an impurity gas for determing the P-type, and phosphine (PH3) is used as an impurity gas for determining the N-type. The mixture ratio of these gases are selected such that SiH4 is 70%, CH4 is 30%, and B2H6 and PH3 are each 1000 ppm. A high frequency electric power of 13.56 MHz and 100 W is applied between the reaction electrodes. As a result, the P-type layer of approximately 100 Å, the I-type layer of approximately 5000 A, and the N-type layer of approximately 300 A in thickness are grown. The growth rate of the above described amorphoussilicon carbide layer 18 is approximately 1pm/hrfor each layer and therefore the time is controlled to obtain a desired thickness as described above for each. - Then the amorphous
silicon carbide layer 18 is formed in a predetermined pattern by photoech- ing, plasma eching or the like. Alternatively, the amorphoussilicon carbide layer 18 may be selectively formed using a metallic mask and by not using the above described means. Finally atransparent electrode film 17 of indium oxide (In2O3), tin oxide (Sn02), indium:tin oxide (In203: Sn02) orthe like is deposited by evapoation on the amorphoussilicon carbide layer 18. Then thetransparent electrode film 17 is patterned, thereby to complete the first and second light-emittingelements elements silicon carbide layer 18 has the light emission central wavelength λ1 at approximately 680 nm. - Then the transparent insulating film 1' of Si02 is formed to a film thickness of several microns (um) by a chemical vapor deposition process on the above described first and second light-emitting
elements - By way of the final step the first and second light
sensitive elements transparent electrode film 7 is deposited on the surface of the transparent insulating film 1' as a substrate surface and then the same is patterned. Then an amorphous silicon germanium (a-SiGe:H)layer 8 of the PIN junction type is formed through plasma reaction. The reaction gas introduced at that time consists of silane (SiH4) by 60% and germane (GeH4) by 40%. The other conditions may be the same as those for the amorphoussilicon carbide layer 18 of the light-emittingelements metallic electrode film 9 of aluminum is vapored on the amorphoussilicon germanium layer 8 and the same is etched to be patterned so that the first lightsensitive element 3a and the second lightsensitive element 3b may be connected in a series connection. - The first and second light
sensitive elements silicon germanium layer 8 of the PIN junction type have the light emission central wavelength N2 at 680 nm which is the same as the light emission central wavelength λ1 of the first and second light-emittingelements - Then the protecting
film 21 of Si02 is deposited and thelead wires molding material 12 for interrupting incident light, thereby to complete a semiconductor photocoupling device. - The light receiving side of the semiconductor photocoupling device or the optical logical device thus manufactured includes a series connection of the first and second light
sensitive elements - By likewise connecting the first light
sensitive element 3a and the second lightsensitive elements 3b in a parallel connection as shown in Fig. 4, a logical sum product can be obtained between theoutput terminals element - Meanwhile, the amorphous semiconductor has a characterisitic in which the light emission central wavelength À, has been shifted toward a longer wavelength as compared with the light sensitive central wavelength A2 in comparison of the case where the light-emitting
elements sensitive elements elements sensitive elements - Fig. 7 is a further embodiment of the present invention, which is an expansion of the Fig. 6 embodiment. More specifically, assuming that a pair of semiconductor optical logical devices comprising the first and second light-emitting
elements sensitive elements elements sensitive elements light shielding member 24 of stainless steel or the like is disposed between the first optical logical circuit OLC1 and the second optical logical circuit OLC2 with the same insulated, so that light transmission therebetween may be interrupted. The above described metalliclight shielding member 24 may not be necessarily provided, inasmuch as the lightsensitive elements elements metallic electrode films metallic electrode films - It is also possible to make difference in the sensitivity wavelength of each of the optical logical circuits OLC1 and OLC2 by differentiating the materials or the compositions of the light-emitting
elements sensitive elements light shielding member 24 can be dispensed with. - The light-emitting
elements sensitive elements - Meanwhile, although the above described optical logical circuit was structured to comprise one set of two light-emitting elements and one set of two light sensitive elements, the same may be structured to comprise one set of one light-emitting element and one set of one light sensitive element, or to comprise one set of three or more elements for the light-emitting elements and the light sensitive elements. A multilayer structure is not limited to a two-layer structure but also may be a three-layer structure, a four-layer structure or the like.
- When the thickness of the elements OLC1 and OLC2 per se is selected to be several pm and the thickness of the transparent insulating film 1' is selected to be 5 to 6 um in a structure having the optical logical circuit laminated as in the case of the above described embodiment, a device of a very small thickness and of flatness as a whole can be provided. If the transparent insulating film 1' between the light-emitting elements and the light sensitive elements is thus thin, there is no mutual interference of light in the adjacent photocoupling and accordingly malfunction due to the so-called cross talk can be avoided.
- Fig. 8 is a graph showing a spectral response of PIN junction type amorphous silicon and single crystalline silicon. More specifically, the spectrum light sensitivity of amorphous silicon exhibits a single peak characteristic having the light sensitive peak wavelength Ao at approximately 580 nm as shown by the solid line. On the other hand, the single crystalline silicon exhibits an easy slope mountain shaped characteristic having a wide range of 400 to 1000 nm in wavelength as shown by the dotted line.
- The embodiment to be described subsequently was implemented in consideration of such spectral response of amorphous semiconductor and the embodiment will be described in detail with reference to Figs. 9 to 12.
- Fig. 9 is a sectional view of the embodiment, wherein the
reference character 1 denotes a tranparent insujating substrate of glass, heat resistive plastic or the like, thereference character 3 denotes a light sensitive element having a spectral response as shown in Fig. 11 in which the light sensitive peak comes to the wavelength λ3. The lightsensitive element 3 has a layered structure in which thetransparent electrode film 7, theamorphous semiconductor layer 8 and themetallic electrode film 9 are in succession laminated on one main surface of the insulatingsubstrate 1. Thereference characters 2a' and 2b' denote the first and second light sources faced to the above described lightsensitive element 3 formed on the other main surface of the above described insulatingsubstrate 1 and made of light-emitting diode pellets, for example, where in therespective light sources 2a' and 2b' emit light of the first wavelength region which is of a wavelength longer than the peak wavelength λ3 and light of the second wavelength region which is of a wavelength shorter than the peak wavelength λ3. The reference character 6' denotes a common electrode film for the electrode of one of the first and secondlight sources 2a' and 2b', which common electrode film is made of a conductive adhesive agent of silver paste or the like and is pattern screened in an E letter shaped as shown in Fig. 10 on the insulatingsubstrate 1 and also serves as fixing means for fixing the first and secondlight sources 2a' and 2b'. Thereference characters light sources 2a' and 2b' and theelectrodes pads substrate 1, thereference characters light sources 2a' and 2b' and for withdrawing an output signal in the lightsensitive element 3, wherein the respective lead frames 10, 11,... are electrically and mechanically fixed through a conductive adhesive agent or the like to therespective electrode films reference character 12 denotes a molding material for molding the first and secondlight sources 2a' and 2b' for interrupting incident light. - Now a specific embodiment employing PIN junction type amorphous silicon for the
amorphous silicon layer 8 of the lightsensitive element 3 will be described. Such amorphous silicon is formed by introducing silane (SiH4) as a reaction gas into a plasma reaction furnace and by supplying a high frequency electric power between the reaction electrodes. For example, in forming a P-type layer, diborane (B2H6) is properly doped and in forming an N-type layer phosphine (PH3) is properly doped. Then the growth rate is controlled to provide a PIN junction having the respective film thicknesses of approximately 100 A for the P-type layer, approximately 5000 A for the I-type (non-doped) layer and approximately 300 A forthe N-type layer. The light sensitive peak wavelength ko of the above described PIN junction type amorphous silicon is approximately 580nm. - On the other hand, the light emission wavelengths λa and Ab of the first and second
light sources 2a' and 2b' are set with reference to approximately 580 nm which is the peak wavelength Ao of the above described lightsensitive element 3. The firstlight source 2a' employs a red color light-emitting diode pellet of the light emission wavelength λb of 700 nm made of gallium phosphate (GaP) and the second light source 2 may employ a blue color light-emitting diode pellet of the light emission wavelength hb of 460 nm made of silicon carbide (SiC). - If and when an input signal is supplied to the first
light source 2a' of the light emission wavelength λa of 700 nm, the firstlight source 2a' operates to emit light, which transmit through the transparent insulatingsubstrate 1 and thetransparent electrode film 7 to impinge upon the lightsensitive element 3 facing thereto. However, the light emission wavelength λa of the firstlight source 2a' for emitting light is 700 nm as described above and the peak wavelength Ào of the lightsensitive element 3 upon which light impinges is 580 nm and therefore the light of 700 nm is absorbed by the N-type layer of theamorphous silicon layer 8, with the result that an output Pa of a low level smaller than a predetermined level Pth can only be obtained as shown in Fig. 12. - On the other hand, when an input signal is supplied to the second
light source 2a' of the light emission wavelength Ab of 460 nm, the same likewise operates to emit light to impinge upon the lightsensitive element 3. The light of 460 nm reaches theamorphous silicon layer 8 of the lightsensitive element 3 to be absorbed by the P-type layer. Accordingly, the output Pb obtained by light emission only of the secondlight source 2b becomes a low level lower than the predetermined level Pth. - Thus, only the output Pa of the low level could be obtained by the light emission of only the first
light source 2a' and only the output Pb of the low level could be obtained by the light emission of only the secondlight source 2b'; however, by causing light emission simultaneously from both of thelight sources 2a' and 2b', the output Po of a high level higher than the predetermined level Pth is obtained. More specifically, the output of the lightsensitive element 3 becomes larger than the predetermined level Pth, only if and when the first and secondlight sources 2a' and 2b' make light-emitting operations simultaneously. Accordingly, the output obtained from the lightsensitive element 3 becomes a logical product of the input signals of the first and secondlight sources 2a' and 2b'. - Meanwhile, other approaches may be considered in which germane (GH4) is doped into the reaction gas for the purpose of increasing the relative sensitivity of the first wavelength region of the longer wavelength so that the N-type layer may be changed to be of amorphous silicon germanium; silane (SiH4) is doped into methane (CH4) in order to increase the relative sensitivity of the second wavelength region of the shorter wavelength side so that the P-type layer may be changed to be of amorphous silicon carbide. Furthermore, by properly changing the composition and the composition ratio of the reaction gas, the amorphous semiconductor can be formed so that the light sensitive peak wavelength may be determined as desired without being limited to only the above described embodiment. Alternatively, the
light sources 2a' and 2b' may be made of amorphous semiconductor. In such case, the wire leads 5a and 5b can be dispensed with, as is different in the case of the light-emitting diode pellets, and thus a possibility of disconnection on the occasion of molding can be avoided. - Although the example of employing the PIN junction was shown in the foregoing description, alternatively a PN junction, a heteroface junction, or a Schottky junction may be employed. However, the effect of the present invention is achieved even in the case where the amorphous semiconductor layer forming the light sensitive element does not have a junction form for generating a photoelectromotive force in response to light impingement as described above and instead utilizes a photoconductive effect exhibiting an increasing conductivity in response to light impingement. For example, in modifying the Fig. 9 embodiment to utilize a photoconductive effect of the light sensitive element, the light of a shorter wavelength acts on a relatively shallow portion of the substrate and the light of a longer wavelength reaches to a deep portion of the substrate, with the result that the light sensitive elements are rendered conductive only if and when two kinds of the light are caused to impinge upon simultaneously. This means that a logical product circuit is provided.
- In case where a relatively thick
transparent substrate 1 is employed, as shown in the Fig. 1 embodiment, a so-called cross talk could arise in which the light from the light-emittingelement 2a impinges on the lightsensitive element 3b or the light from the light-emittingelement 2b impinges on the lightsensitive element 3a. The reason is that diffused reflection is liable to occur in the case where thesubstrate 1 is made of glass, for example. In such a case, one countermeasure can be thought in which the wavelengths of the light beams of the pair of the light-emittingelement 2a and the lightsensitive element 3a and the pair of the light-emittingelement 2b and the lightsensitive element 3b are differentiated. Such differentiation of the light emission central wavelength of the light-emitting element or the peak wavelength of the spectral response of the light senistive element could be achieved with simplicity by simply changing the composition of the semiconductor layer, as described previously, by changing the composition of the gas being introduced to the reaction furnace in the case of amorphous semiconductor, for example. - Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the scope of the present invention being limited only by the terms of the appended claims.
Claims (7)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56200469A JPS58101475A (en) | 1981-12-11 | 1981-12-11 | Semiconductor photocoupler |
JP200469/81 | 1981-12-11 | ||
JP56204596A JPS58105581A (en) | 1981-12-17 | 1981-12-17 | Semiconductor optical coupler |
JP204596/81 | 1981-12-17 | ||
JP56205953A JPS58106878A (en) | 1981-12-18 | 1981-12-18 | Semiconductor photo-coupler |
JP205953/81 | 1981-12-18 |
Publications (3)
Publication Number | Publication Date |
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EP0081827A2 EP0081827A2 (en) | 1983-06-22 |
EP0081827A3 EP0081827A3 (en) | 1985-06-26 |
EP0081827B1 true EP0081827B1 (en) | 1989-03-08 |
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Application Number | Title | Priority Date | Filing Date |
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EP82111464A Expired EP0081827B1 (en) | 1981-12-11 | 1982-12-10 | Semiconductor optical logic device |
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US (1) | US4626878A (en) |
EP (1) | EP0081827B1 (en) |
DE (1) | DE3279526D1 (en) |
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US5200631A (en) * | 1991-08-06 | 1993-04-06 | International Business Machines Corporation | High speed optical interconnect |
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1982
- 1982-12-06 US US06/447,195 patent/US4626878A/en not_active Expired - Fee Related
- 1982-12-10 EP EP82111464A patent/EP0081827B1/en not_active Expired
- 1982-12-10 DE DE8282111464T patent/DE3279526D1/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0081827A3 (en) | 1985-06-26 |
DE3279526D1 (en) | 1989-04-13 |
US4626878A (en) | 1986-12-02 |
EP0081827A2 (en) | 1983-06-22 |
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