DE69931512D1 - Phasendifferenzvergrösserer - Google Patents

Phasendifferenzvergrösserer

Info

Publication number
DE69931512D1
DE69931512D1 DE69931512T DE69931512T DE69931512D1 DE 69931512 D1 DE69931512 D1 DE 69931512D1 DE 69931512 T DE69931512 T DE 69931512T DE 69931512 T DE69931512 T DE 69931512T DE 69931512 D1 DE69931512 D1 DE 69931512D1
Authority
DE
Germany
Prior art keywords
phasendifferenzvergrösserer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69931512T
Other languages
English (en)
Other versions
DE69931512T2 (de
Inventor
M Volk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69931512D1 publication Critical patent/DE69931512D1/de
Publication of DE69931512T2 publication Critical patent/DE69931512T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
    • H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
DE69931512T 1998-10-27 1999-10-06 Phasendifferenzvergrösserer Expired - Lifetime DE69931512T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US181034 1998-10-27
US09/181,034 US6128359A (en) 1998-10-27 1998-10-27 Phase difference magnifier
PCT/US1999/023344 WO2000025472A1 (en) 1998-10-27 1999-10-06 Phase difference magnifier

Publications (2)

Publication Number Publication Date
DE69931512D1 true DE69931512D1 (de) 2006-06-29
DE69931512T2 DE69931512T2 (de) 2006-10-05

Family

ID=22662629

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69931512T Expired - Lifetime DE69931512T2 (de) 1998-10-27 1999-10-06 Phasendifferenzvergrösserer

Country Status (9)

Country Link
US (1) US6128359A (de)
EP (1) EP1125391B1 (de)
KR (1) KR100419795B1 (de)
CN (1) CN1166109C (de)
AU (1) AU6510199A (de)
DE (1) DE69931512T2 (de)
HK (1) HK1036712A1 (de)
TW (1) TW444427B (de)
WO (1) WO2000025472A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6265904B1 (en) * 1998-10-02 2001-07-24 Vlsi Technology Inc. Digital phase shift amplification and detection system and method
US6239626B1 (en) * 2000-01-07 2001-05-29 Cisco Technology, Inc. Glitch-free clock selector
KR100810346B1 (ko) * 2002-05-25 2008-03-07 삼성전자주식회사 이동통신 단말기의 256-탭 정합필터링 장치 및 방법
US7466174B2 (en) 2006-03-31 2008-12-16 Intel Corporation Fast lock scheme for phase locked loops and delay locked loops
US7725754B1 (en) * 2006-08-08 2010-05-25 Xilinx, Inc. Dual clock interface for an integrated circuit
WO2011104778A1 (ja) * 2010-02-24 2011-09-01 パナソニック株式会社 時間差デジタル変換ステージおよびそれを備えた時間差デジタル変換器
US9106400B2 (en) * 2012-10-23 2015-08-11 Futurewei Technologies, Inc. Hybrid timing recovery for burst mode receiver in passive optical networks
US9941894B1 (en) * 2017-05-04 2018-04-10 Analog Devices Global Multiple string, multiple output digital to analog converter

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5764171A (en) * 1980-10-08 1982-04-19 Advantest Corp Spectrum analyzer
JP2614482B2 (ja) * 1988-03-11 1997-05-28 三洋電機株式会社 光学式デイスクプレーヤの信号再生回路
JP3193805B2 (ja) * 1993-05-26 2001-07-30 三菱電機株式会社 Ｐｌｌ回路
JP3027692B2 (ja) * 1994-11-18 2000-04-04 赤井電機株式会社 位相差検出回路及び制御装置
US5744991A (en) * 1995-10-16 1998-04-28 Altera Corporation System for distributing clocks using a delay lock loop in a programmable logic circuit
JPH09251651A (ja) * 1996-03-15 1997-09-22 Toshiba Corp 位相差電圧生成回路
US6000022A (en) * 1997-10-10 1999-12-07 Micron Technology, Inc. Method and apparatus for coupling signals between two circuits operating in different clock domains
JPH11120769A (ja) * 1997-10-13 1999-04-30 Mitsubishi Electric Corp 同期型半導体記憶装置

Also Published As

Publication number Publication date
WO2000025472A1 (en) 2000-05-04
KR20010080912A (ko) 2001-08-25
DE69931512T2 (de) 2006-10-05
AU6510199A (en) 2000-05-15
HK1036712A1 (en) 2002-01-11
US6128359A (en) 2000-10-03
CN1166109C (zh) 2004-09-08
CN1324534A (zh) 2001-11-28
EP1125391B1 (de) 2006-05-24
EP1125391A4 (de) 2003-01-29
EP1125391A1 (de) 2001-08-22
KR100419795B1 (ko) 2004-02-21
TW444427B (en) 2001-07-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806