DE69920121D1 - Wortleitungstreiberschaltung mit ringförmiger Vorrichtung - Google Patents

Wortleitungstreiberschaltung mit ringförmiger Vorrichtung

Info

Publication number
DE69920121D1
DE69920121D1 DE69920121T DE69920121T DE69920121D1 DE 69920121 D1 DE69920121 D1 DE 69920121D1 DE 69920121 T DE69920121 T DE 69920121T DE 69920121 T DE69920121 T DE 69920121T DE 69920121 D1 DE69920121 D1 DE 69920121D1
Authority
DE
Germany
Prior art keywords
ring
word line
driver circuit
line driver
shaped device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69920121T
Other languages
English (en)
Other versions
DE69920121T2 (de
Inventor
Heinz Hoenigschmid
Dmitry Netis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
International Business Machines Corp
Original Assignee
Siemens AG
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, International Business Machines Corp filed Critical Siemens AG
Publication of DE69920121D1 publication Critical patent/DE69920121D1/de
Application granted granted Critical
Publication of DE69920121T2 publication Critical patent/DE69920121T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
DE69920121T 1998-08-25 1999-07-29 Wortleitungstreiberschaltung mit ringförmiger Vorrichtung Expired - Lifetime DE69920121T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US139514 1998-08-25
US09/139,514 US6236258B1 (en) 1998-08-25 1998-08-25 Wordline driver circuit using ring-shaped devices

Publications (2)

Publication Number Publication Date
DE69920121D1 true DE69920121D1 (de) 2004-10-21
DE69920121T2 DE69920121T2 (de) 2005-10-13

Family

ID=22487032

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69920121T Expired - Lifetime DE69920121T2 (de) 1998-08-25 1999-07-29 Wortleitungstreiberschaltung mit ringförmiger Vorrichtung

Country Status (7)

Country Link
US (1) US6236258B1 (de)
EP (1) EP0982777B1 (de)
JP (1) JP3304317B2 (de)
KR (1) KR100375885B1 (de)
AT (1) ATE276587T1 (de)
DE (1) DE69920121T2 (de)
TW (1) TW421877B (de)

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Publication number Priority date Publication date Assignee Title
JP2001319979A (ja) * 2000-05-08 2001-11-16 Nec Microsystems Ltd 半導体集積回路装置のコンタクト配置構造
DE10203152C1 (de) * 2002-01-28 2003-10-23 Infineon Technologies Ag Speichervorrichtung
US6768143B1 (en) 2003-08-26 2004-07-27 International Business Machines Corporation Structure and method of making three finger folded field effect transistors having shared junctions
JP4632287B2 (ja) * 2003-10-06 2011-02-16 株式会社日立製作所 半導体集積回路装置
US7851872B2 (en) 2003-10-22 2010-12-14 Marvell World Trade Ltd. Efficient transistor structure
US7960833B2 (en) 2003-10-22 2011-06-14 Marvell World Trade Ltd. Integrated circuits and interconnect structure for integrated circuits
KR100586549B1 (ko) * 2004-12-02 2006-06-08 주식회사 하이닉스반도체 포토 마스크 및 이를 이용한 패턴 제조 방법
JP2007243081A (ja) * 2006-03-13 2007-09-20 Hitachi Ltd 薄膜トランジスタ基板及び薄膜トランジスタ基板の生成方法
KR101373792B1 (ko) * 2006-05-08 2014-03-13 마벨 월드 트레이드 리미티드 효율적인 트랜지스터 구조
CN101452936B (zh) * 2007-12-06 2011-12-14 上海华虹Nec电子有限公司 单源多漏的mos器件
KR101857729B1 (ko) * 2011-06-17 2018-06-20 삼성전자주식회사 반도체 장치
KR102643111B1 (ko) 2016-07-05 2024-03-04 삼성디스플레이 주식회사 박막 트랜지스터, 이를 포함하는 박막 트랜지스터 표시판 및 그 제조 방법
CN107342316B (zh) * 2017-06-27 2019-11-12 成都海威华芯科技有限公司 一种矩阵排列的环形fet器件
CN107134485B (zh) * 2017-06-27 2019-11-12 成都海威华芯科技有限公司 一种环形fet器件
US10846458B2 (en) 2018-08-30 2020-11-24 Taiwan Semiconductor Manufacturing Company Ltd. Engineering change order cell structure having always-on transistor
US10748600B2 (en) 2018-12-11 2020-08-18 Micron Technologies, Inc. Phase charge sharing reduction

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53138281A (en) * 1977-05-09 1978-12-02 Nec Corp Insulated-gate field effect transistor
DE3065928D1 (en) * 1979-01-25 1984-01-26 Nec Corp Semiconductor memory device
JPS61150366A (ja) * 1984-12-25 1986-07-09 Nec Corp Ｍｉｓ型メモリ−セル
US4700328A (en) 1985-07-11 1987-10-13 Intel Corporation High speed and high efficiency layout for dram circuits
JPS6281054A (ja) 1985-10-04 1987-04-14 Nec Corp 半導体装置
JP2679074B2 (ja) 1988-01-27 1997-11-19 富士電機株式会社 電界効果トランジスタ
US5477467A (en) 1989-07-17 1995-12-19 Motorola, Inc. Shrinkable BiCMOS circuit layout
US5231590A (en) 1989-10-13 1993-07-27 Zilog, Inc. Technique for modifying an integrated circuit layout
JPH07105449B2 (ja) 1990-02-16 1995-11-13 三菱電機株式会社 半導体記憶装置
US5288653A (en) * 1991-02-27 1994-02-22 Nec Corporation Process of fabricating an insulated-gate field effect transistor
US5567553A (en) 1994-07-12 1996-10-22 International Business Machines Corporation Method to suppress subthreshold leakage due to sharp isolation corners in submicron FET structures

Also Published As

Publication number Publication date
US6236258B1 (en) 2001-05-22
TW421877B (en) 2001-02-11
JP3304317B2 (ja) 2002-07-22
ATE276587T1 (de) 2004-10-15
EP0982777B1 (de) 2004-09-15
JP2000077630A (ja) 2000-03-14
KR20000017482A (ko) 2000-03-25
EP0982777A1 (de) 2000-03-01
KR100375885B1 (ko) 2003-03-15
DE69920121T2 (de) 2005-10-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: INTERNATIONAL BUSINESS MACHINES CORP., ARMONK,, US