DE69840639D1 - Zur Verringerung des Querstroms fähige Verriegelungsschaltung - Google Patents

Zur Verringerung des Querstroms fähige Verriegelungsschaltung

Info

Publication number
DE69840639D1
DE69840639D1 DE69840639T DE69840639T DE69840639D1 DE 69840639 D1 DE69840639 D1 DE 69840639D1 DE 69840639 T DE69840639 T DE 69840639T DE 69840639 T DE69840639 T DE 69840639T DE 69840639 D1 DE69840639 D1 DE 69840639D1
Authority
DE
Germany
Prior art keywords
reduce
cross
locking circuit
flow capable
capable locking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69840639T
Other languages
English (en)
Inventor
Tadahiko Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Application granted granted Critical
Publication of DE69840639D1 publication Critical patent/DE69840639D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
    • H03K3/356156—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356165—Bistable circuits using complementary field-effect transistors using additional transistors in the feedback circuit
    • H03K3/356173—Bistable circuits using complementary field-effect transistors using additional transistors in the feedback circuit with synchronous operation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/3562—Bistable circuits of the master-slave type
    • H03K3/35625—Bistable circuits of the master-slave type using complementary field-effect transistors
DE69840639T 1997-04-18 1998-04-15 Zur Verringerung des Querstroms fähige Verriegelungsschaltung Expired - Fee Related DE69840639D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09116417A JP3114649B2 (ja) 1997-04-18 1997-04-18 ラッチ回路

Publications (1)

Publication Number Publication Date
DE69840639D1 true DE69840639D1 (de) 2009-04-23

Family

ID=14686570

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69840639T Expired - Fee Related DE69840639D1 (de) 1997-04-18 1998-04-15 Zur Verringerung des Querstroms fähige Verriegelungsschaltung

Country Status (4)

Country Link
US (1) US6163189A (de)
EP (1) EP0872956B1 (de)
JP (1) JP3114649B2 (de)
DE (1) DE69840639D1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6437625B1 (en) * 2001-06-21 2002-08-20 International Business Machines Corporation Edge triggered latch with symmetrical paths from clock to data outputs
JP4680448B2 (ja) * 2001-09-04 2011-05-11 ルネサスエレクトロニクス株式会社 高速サンプリングレシーバー
US7474134B2 (en) * 2006-05-18 2009-01-06 International Business Machines Corporation Radiation hardened programmable phase frequency divider
US7362154B2 (en) * 2006-05-18 2008-04-22 International Business Machines Corporation Radiation hardened latch
US8615205B2 (en) 2007-12-18 2013-12-24 Qualcomm Incorporated I-Q mismatch calibration and method
US8970272B2 (en) 2008-05-15 2015-03-03 Qualcomm Incorporated High-speed low-power latches
US8712357B2 (en) 2008-11-13 2014-04-29 Qualcomm Incorporated LO generation with deskewed input oscillator signal
US8718574B2 (en) 2008-11-25 2014-05-06 Qualcomm Incorporated Duty cycle adjustment for a local oscillator signal
US8847638B2 (en) 2009-07-02 2014-09-30 Qualcomm Incorporated High speed divide-by-two circuit
US20110001536A1 (en) * 2009-07-02 2011-01-06 Macronix International Co., Ltd. Static latch
US8791740B2 (en) 2009-07-16 2014-07-29 Qualcomm Incorporated Systems and methods for reducing average current consumption in a local oscillator path
US8164361B2 (en) * 2009-12-08 2012-04-24 Qualcomm Incorporated Low power complementary logic latch and RF divider
US8854098B2 (en) 2011-01-21 2014-10-07 Qualcomm Incorporated System for I-Q phase mismatch detection and correction
US9154077B2 (en) 2012-04-12 2015-10-06 Qualcomm Incorporated Compact high frequency divider
US9825636B1 (en) * 2016-10-20 2017-11-21 Arm Limited Apparatus and method for reduced latency signal synchronization
KR102588078B1 (ko) * 2016-11-21 2023-10-13 엘지디스플레이 주식회사 표시장치

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506167A (en) * 1982-05-26 1985-03-19 Motorola, Inc. High speed logic flip-flop latching arrangements including input and feedback pairs of transmission gates
US4569067A (en) * 1983-08-04 1986-02-04 Motorola, Inc. Dual master shift register bit
JPS61196614A (ja) * 1985-02-26 1986-08-30 Mitsubishi Electric Corp チヨツパ型比較器
JPS6290031A (ja) * 1985-10-15 1987-04-24 Mitsubishi Electric Corp 半導体集積回路
JPH03219717A (ja) * 1989-11-15 1991-09-27 Nec Corp 同期型ｒｓフリップフロップ回路
JPH05268000A (ja) * 1992-03-17 1993-10-15 Fujitsu Ltd ラッチ回路
US5408138A (en) * 1993-10-04 1995-04-18 Motorola, Inc. Flip flop circuit and method therefor
JPH07131302A (ja) * 1993-11-08 1995-05-19 Nec Corp レジスタ回路
US5406143A (en) * 1993-12-21 1995-04-11 Vertex Semiconductor Corporation GTL to CMOS level signal converter, method and apparatus
JPH0846495A (ja) * 1994-07-29 1996-02-16 Matsushita Electric Ind Co Ltd チョッパ型コンパレータ
US5486777A (en) * 1994-09-07 1996-01-23 National Semiconductor Corporation Low power differential receiver input circuit
US5612632A (en) * 1994-11-29 1997-03-18 Texas Instruments Incorporated High speed flip-flop for gate array
KR0145852B1 (ko) * 1995-04-14 1998-11-02 김광호 반도체메모리소자의 어드레스버퍼
US5789956A (en) * 1995-05-26 1998-08-04 Texas Instruments Incorporated Low power flip-flop

Also Published As

Publication number Publication date
EP0872956A2 (de) 1998-10-21
US6163189A (en) 2000-12-19
JP3114649B2 (ja) 2000-12-04
JPH10294648A (ja) 1998-11-04
EP0872956A3 (de) 2000-02-23
EP0872956B1 (de) 2009-03-11

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee