DE69829649D1 - Wiederprogrammierbare speichereinrichtung mit variablem seitenformat - Google Patents

Wiederprogrammierbare speichereinrichtung mit variablem seitenformat

Info

Publication number
DE69829649D1
DE69829649D1 DE69829649T DE69829649T DE69829649D1 DE 69829649 D1 DE69829649 D1 DE 69829649D1 DE 69829649 T DE69829649 T DE 69829649T DE 69829649 T DE69829649 T DE 69829649T DE 69829649 D1 DE69829649 D1 DE 69829649D1
Authority
DE
Germany
Prior art keywords
storage device
side size
variable side
reprogrammable storage
reprogrammable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69829649T
Other languages
English (en)
Other versions
DE69829649T2 (de
Inventor
A Thomsen
J Phoenix
Brian Boles
Henry Pena
E Luke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microchip Technology Inc
Original Assignee
Microchip Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Technology Inc filed Critical Microchip Technology Inc
Application granted granted Critical
Publication of DE69829649D1 publication Critical patent/DE69829649D1/de
Publication of DE69829649T2 publication Critical patent/DE69829649T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
DE69829649T 1997-12-16 1998-12-16 Wiederprogrammierbare speichereinrichtung mit variablem seitenformat Expired - Lifetime DE69829649T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/991,423 US5991196A (en) 1997-12-16 1997-12-16 Reprogrammable memory device with variable page size
US991423 1997-12-16
PCT/US1998/026726 WO1999031668A1 (en) 1997-12-16 1998-12-16 Reprogrammable memory device with variable page size

Publications (2)

Publication Number Publication Date
DE69829649D1 true DE69829649D1 (de) 2005-05-12
DE69829649T2 DE69829649T2 (de) 2006-02-02

Family

ID=25537202

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69829649T Expired - Lifetime DE69829649T2 (de) 1997-12-16 1998-12-16 Wiederprogrammierbare speichereinrichtung mit variablem seitenformat

Country Status (7)

Country Link
US (1) US5991196A (de)
EP (1) EP0960423B1 (de)
JP (1) JP2001512614A (de)
KR (1) KR20000070274A (de)
DE (1) DE69829649T2 (de)
TW (1) TW440847B (de)
WO (1) WO1999031668A1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6725316B1 (en) 2000-08-18 2004-04-20 Micron Technology, Inc. Method and apparatus for combining architectures with logic option
US6591330B2 (en) * 2001-06-18 2003-07-08 M-Systems Flash Disk Pioneers Ltd. System and method for flexible flash file
KR100463195B1 (ko) * 2001-08-28 2004-12-23 삼성전자주식회사 가속 열 스캔닝 스킴을 갖는 불 휘발성 반도체 메모리 장치
KR100437461B1 (ko) * 2002-01-12 2004-06-23 삼성전자주식회사 낸드 플래시 메모리 장치 및 그것의 소거, 프로그램,그리고 카피백 프로그램 방법
KR100645047B1 (ko) * 2004-10-12 2006-11-10 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 고속 프로그램 방법
JP4941644B2 (ja) 2005-09-28 2012-05-30 ハイニックス セミコンダクター インク 半導体メモリ装置
US7385855B2 (en) * 2005-12-26 2008-06-10 Ememory Technology Inc. Nonvolatile memory device having self reprogramming function
US8068365B2 (en) * 2008-02-04 2011-11-29 Mosaid Technologies Incorporated Non-volatile memory device having configurable page size
EP2267724A1 (de) * 2009-06-26 2010-12-29 STMicroelectronics Rousset SAS EEPROM Speicher-Architektur optimiert für eingebettete Speicher
KR20120036123A (ko) 2010-10-07 2012-04-17 삼성전자주식회사 비휘발성 메모리 장치

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2709751B2 (ja) * 1990-06-15 1998-02-04 三菱電機株式会社 不揮発性半導体記憶装置およびそのデータ消去方法
JP3080743B2 (ja) * 1991-12-27 2000-08-28 日本電気株式会社 不揮発性半導体記憶装置
JP2870328B2 (ja) * 1992-11-12 1999-03-17 日本電気株式会社 不揮発性半導体記憶装置
JP3212396B2 (ja) * 1993-01-14 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
JPH07230691A (ja) * 1994-02-16 1995-08-29 Fujitsu Ltd 半導体記憶装置
GB9423032D0 (en) * 1994-11-15 1995-01-04 Sgs Thomson Microelectronics Bit line sensing in a memory array
US5572467A (en) * 1995-04-24 1996-11-05 Motorola, Inc. Address comparison in an inteagrated circuit memory having shared read global data lines

Also Published As

Publication number Publication date
TW440847B (en) 2001-06-16
WO1999031668A1 (en) 1999-06-24
DE69829649T2 (de) 2006-02-02
US5991196A (en) 1999-11-23
JP2001512614A (ja) 2001-08-21
EP0960423B1 (de) 2005-04-06
KR20000070274A (ko) 2000-11-25
EP0960423A1 (de) 1999-12-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition