DE69908772D1 - Geraet mit kontextumschaltungsfaehigkeit - Google Patents

Geraet mit kontextumschaltungsfaehigkeit

Info

Publication number
DE69908772D1
DE69908772D1 DE69908772T DE69908772T DE69908772D1 DE 69908772 D1 DE69908772 D1 DE 69908772D1 DE 69908772 T DE69908772 T DE 69908772T DE 69908772 T DE69908772 T DE 69908772T DE 69908772 D1 DE69908772 D1 DE 69908772D1
Authority
DE
Germany
Prior art keywords
context switching
switching ability
ability
context
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69908772T
Other languages
English (en)
Other versions
DE69908772T2 (de
Inventor
D Arnold
Alfred Eder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies North America Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies North America Corp filed Critical Infineon Technologies North America Corp
Publication of DE69908772D1 publication Critical patent/DE69908772D1/de
Application granted granted Critical
Publication of DE69908772T2 publication Critical patent/DE69908772T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30116—Shadow registers, e.g. coupled registers, not forming part of the register space
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G06F9/30123—Organisation of register space, e.g. banked or distributed register file according to context, e.g. thread buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69908772T 1998-04-27 1999-02-25 Geraet mit kontextumschaltungsfaehigkeit Expired - Lifetime DE69908772T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/069,030 US6378065B1 (en) 1998-04-27 1998-04-27 Apparatus with context switching capability
US69030 1998-04-27
PCT/US1999/004134 WO1999056209A1 (en) 1998-04-27 1999-02-25 Apparatus with context switching capability

Publications (2)

Publication Number Publication Date
DE69908772D1 true DE69908772D1 (de) 2003-07-17
DE69908772T2 DE69908772T2 (de) 2004-07-08

Family

ID=22086270

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69908772T Expired - Lifetime DE69908772T2 (de) 1998-04-27 1999-02-25 Geraet mit kontextumschaltungsfaehigkeit

Country Status (6)

Country Link
US (1) US6378065B1 (de)
EP (1) EP1073956B1 (de)
JP (1) JP2002513182A (de)
KR (1) KR20010043091A (de)
DE (1) DE69908772T2 (de)
WO (1) WO1999056209A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7162615B1 (en) * 2000-06-12 2007-01-09 Mips Technologies, Inc. Data transfer bus communication using single request to perform command and return data to destination indicated in context to allow thread context switch
US7246220B1 (en) * 2001-07-27 2007-07-17 Magnum Semiconductor, Inc. Architecture for hardware-assisted context switching between register groups dedicated to time-critical or non-time critical tasks without saving state
JP2004220070A (ja) * 2003-01-09 2004-08-05 Japan Science & Technology Agency コンテキスト切り替え方法及び装置、中央演算装置、コンテキスト切り替えプログラム及びそれを記憶したコンピュータ読み取り可能な記憶媒体
US7366032B1 (en) * 2005-11-21 2008-04-29 Advanced Micro Devices, Inc. Multi-ported register cell with randomly accessible history
KR100679050B1 (ko) * 2005-12-12 2007-02-06 삼성전자주식회사 태스크간 빠른 문맥 교환을 위해 레지스터 문맥을 저장,복구하는 방법 및 장치
US9250899B2 (en) 2007-06-13 2016-02-02 International Business Machines Corporation Method and apparatus for spatial register partitioning with a multi-bit cell register file
US8812824B2 (en) 2007-06-13 2014-08-19 International Business Machines Corporation Method and apparatus for employing multi-bit register file cells and SMT thread groups
DE102008062692B4 (de) * 2008-12-17 2013-11-14 Texas Instruments Deutschland Gmbh Eingebettetes Mikrocontrollersystem und Verfahren zur Konfiguration eines eingebetteten Mikrocontrollersystems mit gesteuertem Schaltmodus
US9058860B2 (en) * 2012-03-29 2015-06-16 Memoir Systems, Inc. Methods and apparatus for synthesizing multi-port memory circuits
US10248595B2 (en) * 2017-08-10 2019-04-02 Infineon Technologies Ag Virtual machine monitor interrupt support for computer processing unit (CPU)
US11216277B2 (en) * 2019-09-26 2022-01-04 Arm Limited Apparatus and method of capturing a register state

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5616248A (en) * 1979-07-17 1981-02-17 Matsushita Electric Ind Co Ltd Processing system for interruption
US4434461A (en) 1980-09-15 1984-02-28 Motorola, Inc. Microprocessor with duplicate registers for processing interrupts
DE3480443D1 (en) 1984-05-14 1989-12-14 Ibm Deutschland Semiconductor memory
JPS63245529A (ja) * 1987-03-31 1988-10-12 Toshiba Corp レジスタ退避復元装置
GB2216307B (en) * 1988-03-01 1992-08-26 Ardent Computer Corp Vector register file
US5590122A (en) * 1994-12-22 1996-12-31 Emc Corporation Method and apparatus for reordering frames
US5680641A (en) * 1995-08-16 1997-10-21 Sharp Microelectronics Technology, Inc. Multiple register bank system for concurrent I/O operation in a CPU datapath
US5768530A (en) * 1995-12-28 1998-06-16 Emc Corporation High speed integrated circuit interface for fibre channel communications
US5778243A (en) * 1996-07-03 1998-07-07 International Business Machines Corporation Multi-threaded cell for a memory

Also Published As

Publication number Publication date
DE69908772T2 (de) 2004-07-08
EP1073956A1 (de) 2001-02-07
EP1073956B1 (de) 2003-06-11
JP2002513182A (ja) 2002-05-08
KR20010043091A (ko) 2001-05-25
US6378065B1 (en) 2002-04-23
WO1999056209A1 (en) 1999-11-04

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Legal Events

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