DE69626929D1 - Bidirektionale parallelschnittstelle - Google Patents

Bidirektionale parallelschnittstelle

Info

Publication number
DE69626929D1
DE69626929D1 DE69626929T DE69626929T DE69626929D1 DE 69626929 D1 DE69626929 D1 DE 69626929D1 DE 69626929 T DE69626929 T DE 69626929T DE 69626929 T DE69626929 T DE 69626929T DE 69626929 D1 DE69626929 D1 DE 69626929D1
Authority
DE
Germany
Prior art keywords
parallel interface
bidirectional parallel
bidirectional
interface
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69626929T
Other languages
English (en)
Other versions
DE69626929T2 (de
Inventor
E Ballachino
A Colgan
Franco Iacobelli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69626929D1 publication Critical patent/DE69626929D1/de
Publication of DE69626929T2 publication Critical patent/DE69626929T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Multi Processors (AREA)
DE69626929T 1995-05-26 1996-05-16 Bidirektionale parallelschnittstelle Expired - Lifetime DE69626929T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/452,350 US5710939A (en) 1995-05-26 1995-05-26 Bidirectional parallel data port having multiple data transfer rates, master, and slave operation modes, and selective data transfer termination
PCT/US1996/007095 WO1996037850A1 (en) 1995-05-26 1996-05-16 Bidirectional parallel signal interface

Publications (2)

Publication Number Publication Date
DE69626929D1 true DE69626929D1 (de) 2003-04-30
DE69626929T2 DE69626929T2 (de) 2003-10-30

Family

ID=23796133

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69626929T Expired - Lifetime DE69626929T2 (de) 1995-05-26 1996-05-16 Bidirektionale parallelschnittstelle

Country Status (5)

Country Link
US (1) US5710939A (de)
EP (3) EP1225514A3 (de)
KR (1) KR100403404B1 (de)
DE (1) DE69626929T2 (de)
WO (1) WO1996037850A1 (de)

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JPH096720A (ja) * 1995-06-15 1997-01-10 Canon Inc 情報伝送方法および情報伝送システム
JP3478519B2 (ja) * 1996-06-28 2003-12-15 株式会社リコー プリンタ装置
JP3301337B2 (ja) * 1997-03-18 2002-07-15 船井電機株式会社 インクジェットプリンタ
US6393498B1 (en) * 1999-03-02 2002-05-21 Mentor Arc Inc. System for reducing processor workloads with memory remapping techniques
US6363444B1 (en) * 1999-07-15 2002-03-26 3Com Corporation Slave processor to slave memory data transfer with master processor writing address to slave memory and providing control input to slave processor and slave memory
DE10011554A1 (de) * 2000-03-09 2001-09-13 Techno Team Bildverarbeitung G Verfahren und Anordnung zur Kopplung eines digitalen Signalprozessors (DSP) mit einem Personalcomputer
US7728744B2 (en) * 2005-10-26 2010-06-01 Analog Devices, Inc. Variable length decoder system and method
US8024551B2 (en) 2005-10-26 2011-09-20 Analog Devices, Inc. Pipelined digital signal processor
US8285972B2 (en) 2005-10-26 2012-10-09 Analog Devices, Inc. Lookup table addressing system and method
CN100448199C (zh) * 2007-01-10 2008-12-31 北京航空航天大学 双机通讯板
US7882284B2 (en) * 2007-03-26 2011-02-01 Analog Devices, Inc. Compute unit with an internal bit FIFO circuit
US8301990B2 (en) * 2007-09-27 2012-10-30 Analog Devices, Inc. Programmable compute unit with internal register and bit FIFO for executing Viterbi code
DE102007051345A1 (de) * 2007-10-26 2009-04-30 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Explosivstoffladung
US10481932B2 (en) * 2014-03-31 2019-11-19 Vmware, Inc. Auto-scaling virtual switches
TWI685259B (zh) * 2019-02-13 2020-02-11 瑞昱半導體股份有限公司 應用在主裝置與從裝置之間的資料傳輸及處理方法、應用於從裝置的資料處理方法、以及用於資料處理的從裝置

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US3975712A (en) * 1975-02-18 1976-08-17 Motorola, Inc. Asynchronous communication interface adaptor
US4644547A (en) * 1984-06-28 1987-02-17 Westinghouse Electric Corp. Digital message format for two-way communication and control network
US4933838A (en) * 1987-06-03 1990-06-12 The Boeing Company Segmentable parallel bus for multiprocessor computer systems
JPH02171948A (ja) * 1988-11-04 1990-07-03 Tektronix Inc プログラマブル出力ポート
US5097410A (en) * 1988-12-30 1992-03-17 International Business Machines Corporation Multimode data system for transferring control and data information in an i/o subsystem
US5204953A (en) * 1989-08-04 1993-04-20 Intel Corporation One clock address pipelining in segmentation unit
EP0428771B1 (de) * 1989-11-21 1995-02-01 Deutsche ITT Industries GmbH Zweiwege-Datenübergabe-Einrichtung
US5259006A (en) * 1990-04-18 1993-11-02 Quickturn Systems, Incorporated Method for substantially eliminating hold time violations in implementing high speed logic circuits or the like
DE69123629T2 (de) * 1990-05-04 1997-06-12 Ibm Maschinenarchitektur für skalaren Verbundbefehlssatz
JPH0827705B2 (ja) * 1990-07-25 1996-03-21 インターナショナル・ビジネス・マシーンズ・コーポレイション アダプタ
US5335329A (en) * 1991-07-18 1994-08-02 Texas Microsystems, Inc. Apparatus for providing DMA functionality to devices located in a bus expansion chassis
US5301275A (en) * 1991-10-03 1994-04-05 Compaq Computer Corporation Data transfer system with variable data buffer size and programmable interrupt frequency
US5471638A (en) * 1991-10-04 1995-11-28 Bull Hn Inforamtion Systems Inc. Bus interface state machines with independent access to memory, processor and registers for concurrent processing of different types of requests
US5189319A (en) * 1991-10-10 1993-02-23 Intel Corporation Power reducing buffer/latch circuit
US5254888A (en) * 1992-03-27 1993-10-19 Picopower Technology Inc. Switchable clock circuit for microprocessors to thereby save power
US5457785A (en) * 1993-02-10 1995-10-10 Elonex Technologies, Inc. CPU-independent and device-driver transparent system for translating a computer's internal bus signals onto an intermediate bus and further translating onto an expansion bus
US5481736A (en) * 1993-02-17 1996-01-02 Hughes Aircraft Company Computer processing element having first and second functional units accessing shared memory output port on prioritized basis
US5404473A (en) * 1994-03-01 1995-04-04 Intel Corporation Apparatus and method for handling string operations in a pipelined processor

Also Published As

Publication number Publication date
EP1225514A3 (de) 2005-10-12
KR100403404B1 (ko) 2004-03-24
DE69626929T2 (de) 2003-10-30
KR970705088A (ko) 1997-09-06
WO1996037850A1 (en) 1996-11-28
US5710939A (en) 1998-01-20
EP0772831A1 (de) 1997-05-14
EP0772831B1 (de) 2003-03-26
EP1223515A2 (de) 2002-07-17
EP1223515A3 (de) 2005-10-12
EP1225514A2 (de) 2002-07-24

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