DE69621526D1 - Stromverstärker und Datenbusschaltung - Google Patents

Stromverstärker und Datenbusschaltung

Info

Publication number
DE69621526D1
DE69621526D1 DE69621526T DE69621526T DE69621526D1 DE 69621526 D1 DE69621526 D1 DE 69621526D1 DE 69621526 T DE69621526 T DE 69621526T DE 69621526 T DE69621526 T DE 69621526T DE 69621526 D1 DE69621526 D1 DE 69621526D1
Authority
DE
Germany
Prior art keywords
data bus
current amplifier
bus circuit
circuit
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69621526T
Other languages
English (en)
Other versions
DE69621526T2 (de
Inventor
Satoru Tanoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lapis Semiconductor Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Publication of DE69621526D1 publication Critical patent/DE69621526D1/de
Application granted granted Critical
Publication of DE69621526T2 publication Critical patent/DE69621526T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069I/O lines read out arrangements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
DE69621526T 1995-07-14 1996-07-09 Stromverstärker und Datenbusschaltung Expired - Fee Related DE69621526T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7179168A JPH0935479A (ja) 1995-07-14 1995-07-14 電流アンプ及びデータバス回路

Publications (2)

Publication Number Publication Date
DE69621526D1 true DE69621526D1 (de) 2002-07-11
DE69621526T2 DE69621526T2 (de) 2003-01-16

Family

ID=16061135

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69621526T Expired - Fee Related DE69621526T2 (de) 1995-07-14 1996-07-09 Stromverstärker und Datenbusschaltung

Country Status (5)

Country Link
US (1) US5821777A (de)
EP (1) EP0753858B1 (de)
JP (1) JPH0935479A (de)
DE (1) DE69621526T2 (de)
TW (1) TW299447B (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100297139B1 (ko) * 1998-04-20 2001-10-29 가네꼬 히사시 반도체 집적회로
US6316969B1 (en) * 1999-02-26 2001-11-13 Micron Technology, Inc. Differential receivers in a CMOS process
JP2007207344A (ja) * 2006-02-01 2007-08-16 Micron Technology Inc 低電圧データ経路および電流センス増幅器
US20220165318A1 (en) * 2020-11-20 2022-05-26 Texas Instruments Incorporated Automatic serial bus equalization trim
CN112711558B (zh) * 2021-01-15 2023-07-21 飞腾信息技术有限公司 Lpc总线的串行中断系统、方法、介质

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5264743A (en) * 1989-12-08 1993-11-23 Hitachi, Ltd. Semiconductor memory operating with low supply voltage
JPH0474382A (ja) * 1990-07-17 1992-03-09 Fujitsu Ltd 半導体記憶装置
JPH05210992A (ja) * 1992-01-30 1993-08-20 Fujitsu Ltd 不揮発性半導体記憶装置
JPH05342872A (ja) * 1992-06-05 1993-12-24 Oki Micro Design Miyazaki:Kk 半導体記憶装置

Also Published As

Publication number Publication date
US5821777A (en) 1998-10-13
EP0753858A3 (de) 1998-03-18
EP0753858B1 (de) 2002-06-05
JPH0935479A (ja) 1997-02-07
EP0753858A2 (de) 1997-01-15
DE69621526T2 (de) 2003-01-16
TW299447B (de) 1997-03-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: OKI SEMICONDUCTOR CO.,LTD., TOKYO, JP

8339 Ceased/non-payment of the annual fee