DE69619885D1 - Datenverarbeitungsanordnung mit Koprozessor - Google Patents

Datenverarbeitungsanordnung mit Koprozessor

Info

Publication number
DE69619885D1
DE69619885D1 DE69619885T DE69619885T DE69619885D1 DE 69619885 D1 DE69619885 D1 DE 69619885D1 DE 69619885 T DE69619885 T DE 69619885T DE 69619885 T DE69619885 T DE 69619885T DE 69619885 D1 DE69619885 D1 DE 69619885D1
Authority
DE
Germany
Prior art keywords
coprocessor
data processing
processing arrangement
arrangement
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69619885T
Other languages
English (en)
Other versions
DE69619885T2 (de
Inventor
Toru Morikawa
Nobuo Higaki
Shinya Miyaji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69619885D1 publication Critical patent/DE69619885D1/de
Application granted granted Critical
Publication of DE69619885T2 publication Critical patent/DE69619885T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Advance Control (AREA)
  • Image Processing (AREA)
DE69619885T 1995-04-28 1996-04-25 Datenverarbeitungsanordnung mit Koprozessor Expired - Lifetime DE69619885T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7106624A JP2987308B2 (ja) 1995-04-28 1995-04-28 情報処理装置

Publications (2)

Publication Number Publication Date
DE69619885D1 true DE69619885D1 (de) 2002-04-25
DE69619885T2 DE69619885T2 (de) 2002-07-18

Family

ID=14438271

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69619885T Expired - Lifetime DE69619885T2 (de) 1995-04-28 1996-04-25 Datenverarbeitungsanordnung mit Koprozessor

Country Status (7)

Country Link
US (1) US5909565A (de)
EP (1) EP0740249B1 (de)
JP (1) JP2987308B2 (de)
KR (1) KR100235397B1 (de)
CN (1) CN1153155C (de)
DE (1) DE69619885T2 (de)
TW (1) TW310409B (de)

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US7376820B2 (en) 2000-03-16 2008-05-20 Fujitsu Limited Information processing unit, and exception processing method for specific application-purpose operation instruction
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US20060095723A1 (en) * 2001-11-05 2006-05-04 Moyer William C Method and apparatus for interfacing a processor to a coprocessor
US7007101B1 (en) * 2001-11-09 2006-02-28 Radisys Microware Communications Software Division, Inc. Routing and forwarding table management for network processor architectures
US7073048B2 (en) * 2002-02-04 2006-07-04 Silicon Lease, L.L.C. Cascaded microcomputer array and method
US7028167B2 (en) * 2002-03-04 2006-04-11 Hewlett-Packard Development Company, L.P. Core parallel execution with different optimization characteristics to decrease dynamic execution path
CN1295597C (zh) 2002-04-18 2007-01-17 皇家飞利浦电子股份有限公司 多发布处理器
US7386704B2 (en) * 2002-10-31 2008-06-10 Lockheed Martin Corporation Pipeline accelerator including pipeline circuits in communication via a bus, and related system and method
CA2503620A1 (en) * 2002-10-31 2004-05-21 Lockheed Martin Corporation Programmable circuit and related computing machine and method
US20040103269A1 (en) * 2002-11-27 2004-05-27 Intel Corporation Processor context register mapping
US7254696B2 (en) * 2002-12-12 2007-08-07 Alacritech, Inc. Functional-level instruction-set computer architecture for processing application-layer content-service requests such as file-access requests
US7430652B2 (en) * 2003-03-28 2008-09-30 Tarari, Inc. Devices for performing multiple independent hardware acceleration operations and methods for performing same
US7293159B2 (en) * 2004-01-15 2007-11-06 International Business Machines Corporation Coupling GP processor with reserved instruction interface via coprocessor port with operation data flow to application specific ISA processor with translation pre-decoder
US7765334B2 (en) * 2004-05-12 2010-07-27 Canon Kabushiki Kaisha Electronic apparatus for use with removable storage medium, control method therefor, and program for implementing the method
US7441106B2 (en) 2004-07-02 2008-10-21 Seagate Technology Llc Distributed processing in a multiple processing unit environment
US7395410B2 (en) * 2004-07-06 2008-07-01 Matsushita Electric Industrial Co., Ltd. Processor system with an improved instruction decode control unit that controls data transfer between processor and coprocessor
FR2875982B1 (fr) * 2004-09-28 2006-12-22 Commissariat Energie Atomique Architecture de communication semi-automatique noc pour applications "flots de donnees"
US8073974B2 (en) * 2004-10-01 2011-12-06 Lockheed Martin Corporation Object oriented mission framework and system and method
US7818724B2 (en) * 2005-02-08 2010-10-19 Sony Computer Entertainment Inc. Methods and apparatus for instruction set emulation
JP4211751B2 (ja) * 2005-03-25 2009-01-21 セイコーエプソン株式会社 集積回路装置
US8145882B1 (en) * 2006-05-25 2012-03-27 Mips Technologies, Inc. Apparatus and method for processing template based user defined instructions
US7647475B2 (en) * 2006-09-06 2010-01-12 Mips Technologies, Inc. System for synchronizing an in-order co-processor with an out-of-order processor using a co-processor interface store data queue
US8032734B2 (en) * 2006-09-06 2011-10-04 Mips Technologies, Inc. Coprocessor load data queue for interfacing an out-of-order execution unit with an in-order coprocessor
US20080082793A1 (en) * 2006-09-29 2008-04-03 Mips Technologies, Inc. Detection and prevention of write-after-write hazards, and applications thereof
US9946547B2 (en) 2006-09-29 2018-04-17 Arm Finance Overseas Limited Load/store unit for a processor, and applications thereof
US7594079B2 (en) 2006-09-29 2009-09-22 Mips Technologies, Inc. Data cache virtual hint way prediction, and applications thereof
JP2008310693A (ja) * 2007-06-15 2008-12-25 Panasonic Corp 情報処理装置
US7930519B2 (en) * 2008-12-17 2011-04-19 Advanced Micro Devices, Inc. Processor with coprocessor interfacing functional unit for forwarding result from coprocessor to retirement unit
FR2942556B1 (fr) * 2009-02-24 2011-03-25 Commissariat Energie Atomique Unite d'allocation et de controle
JP2011138308A (ja) * 2009-12-28 2011-07-14 Sony Corp プロセッサ、コプロセッサ、情報処理システムおよびそれらにおける制御方法
CN101895743B (zh) * 2010-03-11 2013-11-13 宇龙计算机通信科技(深圳)有限公司 一种处理器间编解码数据的传输方法、系统及可视电话
CN103064655A (zh) * 2011-10-20 2013-04-24 知惠科技股份有限公司 模块化程序处理装置
US9891886B2 (en) * 2014-07-02 2018-02-13 Via Alliance Semiconductor Co., Ltd Split-path heuristic for performing a fused FMA operation
US11132203B2 (en) * 2014-08-14 2021-09-28 Texas Instruments Incorporated System and method for synchronizing instruction execution between a central processor and a coprocessor
CN107451090B (zh) * 2016-06-01 2020-09-11 华为技术有限公司 数据处理系统和数据处理方法
CN106371807B (zh) * 2016-08-30 2019-03-19 华为技术有限公司 一种扩展处理器指令集的方法及装置
CN106598059A (zh) * 2017-01-25 2017-04-26 桂林航天工业学院 基于fpga的多旋翼无人机系统
CN109791503A (zh) * 2018-03-07 2019-05-21 华为技术有限公司 处理中断的方法和装置
US11030075B2 (en) * 2018-11-14 2021-06-08 Microsoft Technology Licensing, Llc Efficient register breakpoints
GB2579617B (en) * 2018-12-06 2021-01-27 Advanced Risc Mach Ltd An apparatus and method for handling exception causing events
CN110502278B (zh) * 2019-07-24 2021-07-16 瑞芯微电子股份有限公司 基于RiscV扩展指令的神经网络协处理器及其协处理方法
US11263014B2 (en) * 2019-08-05 2022-03-01 Arm Limited Sharing instruction encoding space between a coprocessor and auxiliary execution circuitry
CN113254070B (zh) * 2020-02-07 2024-01-02 阿里巴巴集团控股有限公司 加速单元、片上系统、服务器、数据中心和相关方法
CN113157636B (zh) * 2021-04-01 2023-07-18 西安邮电大学 协处理器、近数据处理装置和方法
CN117667220B (zh) * 2024-01-30 2024-05-17 芯来智融半导体科技(上海)有限公司 指令处理方法、装置、计算机设备和存储介质

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DE3486468D1 (de) * 1983-04-18 1998-08-06 Motorola Inc Verfahren und Vorrichtung für ein Processor um mit einem Coprocessor in der Verarbeitung eines im Programablauf des Processors befindlichen Befehls mitzuwirken.
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JPH0679307B2 (ja) * 1987-10-22 1994-10-05 日本電気株式会社 コプロセッサの並行動作制御方式
JPH01147656A (ja) * 1987-12-03 1989-06-09 Nec Corp マイクロプロセッサ
JP2667864B2 (ja) * 1988-03-23 1997-10-27 株式会社日立製作所 データ処理装置
JPH01243167A (ja) * 1988-03-25 1989-09-27 Hitachi Ltd データ処理装置
JP2741867B2 (ja) * 1988-05-27 1998-04-22 株式会社日立製作所 情報処理システムおよびプロセツサ
JP2946952B2 (ja) * 1992-07-31 1999-09-13 ティーディーケイ株式会社 複合型薄膜磁気ヘッド
US5655131A (en) * 1992-12-18 1997-08-05 Xerox Corporation SIMD architecture for connection to host processor's bus

Also Published As

Publication number Publication date
KR100235397B1 (ko) 1999-12-15
DE69619885T2 (de) 2002-07-18
JPH08305568A (ja) 1996-11-22
TW310409B (de) 1997-07-11
US5909565A (en) 1999-06-01
CN1153155C (zh) 2004-06-09
CN1140857A (zh) 1997-01-22
JP2987308B2 (ja) 1999-12-06
EP0740249A1 (de) 1996-10-30
EP0740249B1 (de) 2002-03-20
KR960038572A (ko) 1996-11-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP