DE69530037D1 - Automatische Bandmontage für Halbleiteranordnung - Google Patents
Automatische Bandmontage für HalbleiteranordnungInfo
- Publication number
- DE69530037D1 DE69530037D1 DE69530037T DE69530037T DE69530037D1 DE 69530037 D1 DE69530037 D1 DE 69530037D1 DE 69530037 T DE69530037 T DE 69530037T DE 69530037 T DE69530037 T DE 69530037T DE 69530037 D1 DE69530037 D1 DE 69530037D1
- Authority
- DE
- Germany
- Prior art keywords
- assembly
- semiconductor
- automatic band
- semiconductor assembly
- automatic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H01L2924/01027—Cobalt [Co]
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- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H01L2924/01033—Arsenic [As]
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- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25273994 | 1994-09-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69530037D1 true DE69530037D1 (de) | 2003-04-30 |
DE69530037T2 DE69530037T2 (de) | 2003-10-16 |
Family
ID=17241602
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69530037T Expired - Fee Related DE69530037T2 (de) | 1994-09-22 | 1995-09-20 | Automatische Bandmontage für Halbleiteranordnung |
Country Status (3)
Country | Link |
---|---|
US (1) | US5729051A (de) |
EP (1) | EP0704896B1 (de) |
DE (1) | DE69530037T2 (de) |
Families Citing this family (51)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3487524B2 (ja) * | 1994-12-20 | 2004-01-19 | 株式会社ルネサステクノロジ | 半導体装置及びその製造方法 |
US5677566A (en) * | 1995-05-08 | 1997-10-14 | Micron Technology, Inc. | Semiconductor chip package |
US6329711B1 (en) * | 1995-11-08 | 2001-12-11 | Fujitsu Limited | Semiconductor device and mounting structure |
US5891795A (en) * | 1996-03-18 | 1999-04-06 | Motorola, Inc. | High density interconnect substrate |
JPH09312374A (ja) | 1996-05-24 | 1997-12-02 | Sony Corp | 半導体パッケージ及びその製造方法 |
US6881611B1 (en) | 1996-07-12 | 2005-04-19 | Fujitsu Limited | Method and mold for manufacturing semiconductor device, semiconductor device and method for mounting the device |
CN1420538A (zh) * | 1996-07-12 | 2003-05-28 | 富士通株式会社 | 半导体装置的制造方法和半导体装置及其装配方法 |
JP2908330B2 (ja) * | 1996-07-16 | 1999-06-21 | 九州日本電気株式会社 | リードフレーム,半導体装置及び半導体装置の製造方法 |
US5854512A (en) * | 1996-09-20 | 1998-12-29 | Vlsi Technology, Inc. | High density leaded ball-grid array package |
US5909058A (en) * | 1996-09-25 | 1999-06-01 | Kabushiki Kaisha Toshiba | Semiconductor package and semiconductor mounting part |
JP3488038B2 (ja) * | 1996-10-17 | 2004-01-19 | 矢崎総業株式会社 | リレーの実装構造 |
KR100447035B1 (ko) * | 1996-11-21 | 2004-09-07 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치의 제조방법 |
US6064576A (en) * | 1997-01-02 | 2000-05-16 | Texas Instruments Incorporated | Interposer having a cantilevered ball connection and being electrically connected to a printed circuit board |
JP2982729B2 (ja) * | 1997-01-16 | 1999-11-29 | 日本電気株式会社 | 半導体装置 |
JP3793628B2 (ja) * | 1997-01-20 | 2006-07-05 | 沖電気工業株式会社 | 樹脂封止型半導体装置 |
US6057594A (en) * | 1997-04-23 | 2000-05-02 | Lsi Logic Corporation | High power dissipating tape ball grid array package |
JP2915892B2 (ja) * | 1997-06-27 | 1999-07-05 | 松下電子工業株式会社 | 樹脂封止型半導体装置およびその製造方法 |
JP3134815B2 (ja) * | 1997-06-27 | 2001-02-13 | 日本電気株式会社 | 半導体装置 |
US6861735B2 (en) * | 1997-06-27 | 2005-03-01 | Matsushita Electric Industrial Co., Ltd. | Resin molded type semiconductor device and a method of manufacturing the same |
KR100283744B1 (ko) | 1997-08-01 | 2001-04-02 | 윤종용 | 집적회로실장방법 |
JPH1197573A (ja) * | 1997-09-19 | 1999-04-09 | Sony Corp | 半導体パッケージ |
KR100252051B1 (ko) * | 1997-12-03 | 2000-04-15 | 윤종용 | 휨 방지막을 구비하는 탭 테이프 |
WO1999048145A1 (fr) * | 1998-03-19 | 1999-09-23 | Hitachi, Ltd. | Dispositif a semi-conducteur, procede de fabrication et structure de montage associes |
JPH11284007A (ja) * | 1998-03-31 | 1999-10-15 | Toshiba Corp | 半導体装置及びその製造方法 |
US6002169A (en) * | 1998-06-15 | 1999-12-14 | Lsi Logic Corporation | Thermally enhanced tape ball grid array package |
US5999415A (en) * | 1998-11-18 | 1999-12-07 | Vlsi Technology, Inc. | BGA package using PCB and tape in a die-down configuration |
JP3502776B2 (ja) * | 1998-11-26 | 2004-03-02 | 新光電気工業株式会社 | バンプ付き金属箔及び回路基板及びこれを用いた半導体装置 |
JP3171176B2 (ja) * | 1998-12-15 | 2001-05-28 | 日本電気株式会社 | 半導体装置およびボール・グリッド・アレイ製造方法 |
KR100335401B1 (ko) * | 1998-12-24 | 2002-07-18 | 박종섭 | 반도체소자의 중첩자 형성방법 |
US6034425A (en) * | 1999-03-17 | 2000-03-07 | Chipmos Technologies Inc. | Flat multiple-chip module micro ball grid array packaging |
JP4334054B2 (ja) * | 1999-03-26 | 2009-09-16 | 株式会社東芝 | セラミックス回路基板 |
JP3575001B2 (ja) * | 1999-05-07 | 2004-10-06 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
JP3398721B2 (ja) * | 1999-05-20 | 2003-04-21 | アムコー テクノロジー コリア インコーポレーティド | 半導体パッケージ及びその製造方法 |
USRE40112E1 (en) | 1999-05-20 | 2008-02-26 | Amkor Technology, Inc. | Semiconductor package and method for fabricating the same |
JP2001102486A (ja) * | 1999-07-28 | 2001-04-13 | Seiko Epson Corp | 半導体装置用基板、半導体チップ搭載基板、半導体装置及びその製造方法、回路基板並びに電子機器 |
US6645794B2 (en) | 2000-10-18 | 2003-11-11 | Hitachi, Ltd. | Method of manufacturing a semiconductor device by monolithically forming a sealing resin for sealing a chip and a reinforcing frame by transfer molding |
US7064447B2 (en) * | 2001-08-10 | 2006-06-20 | Micron Technology, Inc. | Bond pad structure comprising multiple bond pads with metal overlap |
US7323767B2 (en) * | 2002-04-25 | 2008-01-29 | Micron Technology, Inc. | Standoffs for centralizing internals in packaging process |
TWI237356B (en) * | 2002-11-04 | 2005-08-01 | Siliconware Precision Industries Co Ltd | Tray for ball grid array semiconductor packages |
US20070145548A1 (en) * | 2003-12-22 | 2007-06-28 | Amkor Technology, Inc. | Stack-type semiconductor package and manufacturing method thereof |
KR100657158B1 (ko) * | 2004-12-31 | 2006-12-12 | 동부일렉트로닉스 주식회사 | 실장 높이가 감소된 반도체 패키지 소자 및 그 제조 방법 |
JP2006210852A (ja) * | 2005-01-31 | 2006-08-10 | Toshiba Corp | 表面実装型回路部品を実装する回路基板及びその製造方法 |
JP4722690B2 (ja) * | 2005-12-12 | 2011-07-13 | 富士通セミコンダクター株式会社 | 半導体装置およびその製造方法 |
US9466545B1 (en) | 2007-02-21 | 2016-10-11 | Amkor Technology, Inc. | Semiconductor package in package |
KR20090067744A (ko) * | 2007-12-21 | 2009-06-25 | 엘지전자 주식회사 | 연성 필름 |
KR100896439B1 (ko) * | 2007-12-26 | 2009-05-14 | 엘지전자 주식회사 | 연성 필름 |
KR100889002B1 (ko) * | 2007-12-27 | 2009-03-19 | 엘지전자 주식회사 | 연성 필름 |
KR100947607B1 (ko) * | 2007-12-27 | 2010-03-15 | 엘지전자 주식회사 | 연성 필름 |
US10522505B2 (en) * | 2017-04-06 | 2019-12-31 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method for manufacturing the same |
US10381322B1 (en) | 2018-04-23 | 2019-08-13 | Sandisk Technologies Llc | Three-dimensional memory device containing self-aligned interlocking bonded structure and method of making the same |
US10879260B2 (en) | 2019-02-28 | 2020-12-29 | Sandisk Technologies Llc | Bonded assembly of a support die and plural memory dies containing laterally shifted vertical interconnections and methods for making the same |
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US4413308A (en) * | 1981-08-31 | 1983-11-01 | Bell Telephone Laboratories, Incorporated | Printed wiring board construction |
JP2602834B2 (ja) * | 1987-06-09 | 1997-04-23 | 三菱電機株式会社 | 半導体装置 |
US5045921A (en) * | 1989-12-26 | 1991-09-03 | Motorola, Inc. | Pad array carrier IC device using flexible tape |
US5293072A (en) * | 1990-06-25 | 1994-03-08 | Fujitsu Limited | Semiconductor device having spherical terminals attached to the lead frame embedded within the package body |
US5216278A (en) | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
US5288944A (en) * | 1992-02-18 | 1994-02-22 | International Business Machines, Inc. | Pinned ceramic chip carrier |
US5334857A (en) * | 1992-04-06 | 1994-08-02 | Motorola, Inc. | Semiconductor device with test-only contacts and method for making the same |
JPH06120296A (ja) * | 1992-10-07 | 1994-04-28 | Hitachi Ltd | 半導体集積回路装置 |
US5291062A (en) * | 1993-03-01 | 1994-03-01 | Motorola, Inc. | Area array semiconductor device having a lid with functional contacts |
JPH06268101A (ja) * | 1993-03-17 | 1994-09-22 | Hitachi Ltd | 半導体装置及びその製造方法、電子装置、リ−ドフレ−ム並びに実装基板 |
US5420460A (en) * | 1993-08-05 | 1995-05-30 | Vlsi Technology, Inc. | Thin cavity down ball grid array package based on wirebond technology |
US5397921A (en) * | 1993-09-03 | 1995-03-14 | Advanced Semiconductor Assembly Technology | Tab grid array |
US5506756A (en) * | 1994-01-25 | 1996-04-09 | Intel Corporation | Tape BGA package die-up/die down |
-
1995
- 1995-09-20 EP EP95114794A patent/EP0704896B1/de not_active Expired - Lifetime
- 1995-09-20 DE DE69530037T patent/DE69530037T2/de not_active Expired - Fee Related
- 1995-09-22 US US08/532,117 patent/US5729051A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5729051A (en) | 1998-03-17 |
EP0704896B1 (de) | 2003-03-26 |
EP0704896A2 (de) | 1996-04-03 |
DE69530037T2 (de) | 2003-10-16 |
EP0704896A3 (de) | 1998-04-08 |
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Legal Events
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8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |