DE69525739T2 - Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind - Google Patents

Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind

Info

Publication number
DE69525739T2
DE69525739T2 DE69525739T DE69525739T DE69525739T2 DE 69525739 T2 DE69525739 T2 DE 69525739T2 DE 69525739 T DE69525739 T DE 69525739T DE 69525739 T DE69525739 T DE 69525739T DE 69525739 T2 DE69525739 T2 DE 69525739T2
Authority
DE
Germany
Prior art keywords
semiconductor
sticked
carrier
production
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69525739T
Other languages
English (en)
Other versions
DE69525739D1 (de
Inventor
Ronald Dekker
Godefridus Maas
Steffen Hahn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69525739D1 publication Critical patent/DE69525739D1/de
Application granted granted Critical
Publication of DE69525739T2 publication Critical patent/DE69525739T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01011—Sodium [Na]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/928—Front and rear surface processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/958—Passivation layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
DE69525739T 1994-12-23 1995-11-29 Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind Expired - Lifetime DE69525739T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP94203751 1994-12-23
PCT/IB1995/001080 WO1996020497A1 (en) 1994-12-23 1995-11-29 Method of manufacturing semiconductor devices with semiconductor elements formed in a layer of semiconductor material glued on a support wafer

Publications (2)

Publication Number Publication Date
DE69525739D1 DE69525739D1 (de) 2002-04-11
DE69525739T2 true DE69525739T2 (de) 2002-10-02

Family

ID=8217491

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69525739T Expired - Lifetime DE69525739T2 (de) 1994-12-23 1995-11-29 Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind

Country Status (5)

Country Link
US (2) US5780354A (de)
EP (1) EP0746875B1 (de)
JP (1) JPH09509792A (de)
DE (1) DE69525739T2 (de)
WO (1) WO1996020497A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2744285B1 (fr) * 1996-01-25 1998-03-06 Commissariat Energie Atomique Procede de transfert d'une couche mince d'un substrat initial sur un substrat final
WO1997034317A1 (en) * 1996-03-12 1997-09-18 Philips Electronics N.V. Method of manufacturing a hybrid integrated circuit
JP3565090B2 (ja) * 1998-07-06 2004-09-15 セイコーエプソン株式会社 半導体装置の製造方法
DE19918671B4 (de) * 1999-04-23 2006-03-02 Giesecke & Devrient Gmbh Vertikal integrierbare Schaltung und Verfahren zu ihrer Herstellung
WO2000065655A1 (en) 1999-04-23 2000-11-02 Koninklijke Philips Electronics N.V. A semiconductor device with an operating frequency larger than 50mhz comprising a body composed of a soft ferrite material
TW455964B (en) * 2000-07-18 2001-09-21 Siliconware Precision Industries Co Ltd Multi-chip module package structure with stacked chips
JP2003023141A (ja) * 2001-07-09 2003-01-24 Tokyo Electron Ltd 半導体基板の製造方法および半導体基板
JP2003291343A (ja) * 2001-10-26 2003-10-14 Seiko Epson Corp 液体噴射ヘッド及びその製造方法並びに液体噴射装置
FR2871291B1 (fr) * 2004-06-02 2006-12-08 Tracit Technologies Procede de transfert de plaques
US7268012B2 (en) 2004-08-31 2007-09-11 Micron Technology, Inc. Methods for fabrication of thin semiconductor assemblies including redistribution layers and packages and assemblies formed thereby
DE102007034306B3 (de) * 2007-07-24 2009-04-02 Austriamicrosystems Ag Halbleitersubstrat mit Durchkontaktierung und Verfahren zur Herstellung eines Halbleitersubstrates mit Durchkontaktierung

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4468857A (en) * 1983-06-27 1984-09-04 Teletype Corporation Method of manufacturing an integrated circuit device
US4870475A (en) * 1985-11-01 1989-09-26 Nec Corporation Semiconductor device and method of manufacturing the same
JPS63308386A (ja) * 1987-01-30 1988-12-15 Sony Corp 半導体装置とその製造方法
US5065222A (en) * 1987-11-11 1991-11-12 Seiko Instruments Inc. Semiconductor device having two-layered passivation film
JPH0344067A (ja) * 1989-07-11 1991-02-25 Nec Corp 半導体基板の積層方法
JP2617798B2 (ja) * 1989-09-22 1997-06-04 三菱電機株式会社 積層型半導体装置およびその製造方法
US5362667A (en) * 1992-07-28 1994-11-08 Harris Corporation Bonded wafer processing
US5289031A (en) * 1990-08-21 1994-02-22 Kabushiki Kaisha Toshiba Semiconductor device capable of blocking contaminants
US5376561A (en) * 1990-12-31 1994-12-27 Kopin Corporation High density electronic circuit modules
JP2821830B2 (ja) * 1992-05-14 1998-11-05 セイコーインスツルメンツ株式会社 半導体薄膜素子その応用装置および半導体薄膜素子の製造方法
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating
EP0646286B1 (de) * 1992-06-17 2002-10-16 Harris Corporation Herstellung von Halbleiteranordnungen auf SOI substraten
US5270221A (en) * 1992-11-05 1993-12-14 Hughes Aircraft Company Method of fabricating high quantum efficiency solid state sensors
JP3158749B2 (ja) * 1992-12-16 2001-04-23 ヤマハ株式会社 半導体装置
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
JPH06296023A (ja) * 1993-02-10 1994-10-21 Semiconductor Energy Lab Co Ltd 薄膜状半導体装置およびその作製方法
JP3265718B2 (ja) * 1993-06-23 2002-03-18 株式会社日立製作所 Ｓｉ転写マスク、及び、Ｓｉ転写マスクの製造方法
DE69622339T2 (de) * 1995-05-10 2003-03-06 Koninkl Philips Electronics Nv Verfahren zum herstellen einer einrichtung, bei der ein substrat mit halbleiterelement und leiterbahnen auf ein trägersubstrat mit metallisierung aufgeklebt wird

Also Published As

Publication number Publication date
US6104081A (en) 2000-08-15
DE69525739D1 (de) 2002-04-11
JPH09509792A (ja) 1997-09-30
EP0746875B1 (de) 2002-03-06
EP0746875A1 (de) 1996-12-11
WO1996020497A1 (en) 1996-07-04
US5780354A (en) 1998-07-14

Similar Documents

Publication Publication Date Title
DE59106604D1 (de) Verfahren zur kontinuierlichen herstellung von partialglyceridsulfaten.
DE3484093D1 (de) Verfahren zur herstellung von buersten mit selbstbefestigung der borsten sowie nach diesem verfahren hergestellte buersten.
ATE128182T1 (de) Verfahren zur kontinuierlichen herstellung von würze.
DE3485880D1 (de) Verfahren zur herstellung von halbleiteranordnungen.
DE68923468D1 (de) Verfahren zur Herstellung von Mehrschichtschaltungen.
DE69104750D1 (de) Verfahren zur Herstellung von Mehrschichtplatinen.
DE3586666T2 (de) Karte mit ic-baustein und verfahren zur herstellung derselben.
DE3484834D1 (de) Verfahren zur herstellung von polyamidiminen und deren verwendung.
DE3484091D1 (de) Verstrecktes produkt aus kristallinischem polymer mit hoher festigkeit und hohem modul und verfahren zur herstellung desselben.
DE3780825T2 (de) Verfahren zur herstellung von urandioxid aus uranhexafluorid.
DE3650118D1 (de) Verfahren zur Herstellung von Mehrschichtwerkstoffen aus Kunststoff.
DE69525739D1 (de) Verfahren zur herstellung von halbleiterbauteilen mit halbleiterelementen, die in einer halbleiterschicht gebildet wurden, welche auf einen trägerwafer geklebt sind
DE3866124D1 (de) Multipack mit offenen enden und tragband und verfahren zur herstellung.
DE59103921D1 (de) Verfahren zur herstellung von glycerinethersulfaten.
DE3485089D1 (de) Verfahren zur herstellung von halbleitervorrichtungen.
DE3381801D1 (de) Halbleiteranordnung mit einer zwischenschicht aus einem uebergangselement und verfahren zur herstellung derselben.
DE69101148D1 (de) Verfahren zur herstellung von cyclischen sulfaten.
DE59301108D1 (de) Verfahren zur Herstellung von Organopolysiloxanharz.
ATE121451T1 (de) Verfahren zur herstellung von würze.
ATA231990A (de) Verfahren zur herstellung von platten od.dgl.
DE3575308D1 (de) Kunststoff mit hoher uv-durchlaessigkeit und verfahren zu seiner herstellung.
DE3854407D1 (de) Verfahren zur selektiven Herstellung von III-V Halbleiterschichten.
DE58907207D1 (de) Verfahren zur Herstellung von metallischen Schichten.
DE3582825D1 (de) Verfahren zur herstellung wismut-substituierter ferrimagnetischer granatschichten.
AT379544B (de) Verfahren zur herstellung von reifen aus giessfaehigen kunststoffen od.dgl.

Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

R082 Change of representative

Ref document number: 746875

Country of ref document: EP

Representative=s name: BOSCH JEHLE PATENTANWALTSGESELLSCHAFT MBH, 80639 M

R085 Willingness to licence withdrawn

Ref document number: 746875

Country of ref document: EP

Effective date: 20111223