DE69517264D1 - Steuerung einer kapazitiven Last - Google Patents

Steuerung einer kapazitiven Last

Info

Publication number
DE69517264D1
DE69517264D1 DE69517264T DE69517264T DE69517264D1 DE 69517264 D1 DE69517264 D1 DE 69517264D1 DE 69517264 T DE69517264 T DE 69517264T DE 69517264 T DE69517264 T DE 69517264T DE 69517264 D1 DE69517264 D1 DE 69517264D1
Authority
DE
Germany
Prior art keywords
control
capacitive load
capacitive
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69517264T
Other languages
English (en)
Other versions
DE69517264T2 (de
Inventor
Colin Whitfield
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
STMicroelectronics Ltd Great Britain
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Ltd Great Britain, SGS Thomson Microelectronics Ltd filed Critical STMicroelectronics Ltd Great Britain
Application granted granted Critical
Publication of DE69517264D1 publication Critical patent/DE69517264D1/de
Publication of DE69517264T2 publication Critical patent/DE69517264T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
DE69517264T 1994-08-26 1995-08-21 Steuerung einer kapazitiven Last Expired - Fee Related DE69517264T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9417265A GB9417265D0 (en) 1994-08-26 1994-08-26 Controlling capacitive load

Publications (2)

Publication Number Publication Date
DE69517264D1 true DE69517264D1 (de) 2000-07-06
DE69517264T2 DE69517264T2 (de) 2000-10-12

Family

ID=10760448

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69517264T Expired - Fee Related DE69517264T2 (de) 1994-08-26 1995-08-21 Steuerung einer kapazitiven Last

Country Status (5)

Country Link
US (1) US5726936A (de)
EP (1) EP0698888B1 (de)
JP (1) JP3131555B2 (de)
DE (1) DE69517264T2 (de)
GB (1) GB9417265D0 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5590076A (en) * 1995-06-21 1996-12-31 Advanced Micro Devices, Inc. Channel hot-carrier page write
US5941987A (en) * 1996-12-24 1999-08-24 Intel Corporation Reference cell for integrated circuit security
US6041221A (en) * 1997-05-21 2000-03-21 Motorola, Inc. Circuit and method for verifying data of a wireless communications device
US6486715B2 (en) 2001-04-02 2002-11-26 Sandisk Corporation System and method for achieving fast switching of analog voltages on large capacitive load
US7002401B2 (en) * 2003-01-30 2006-02-21 Sandisk Corporation Voltage buffer for capacitive loads
US6952041B2 (en) * 2003-07-25 2005-10-04 Robert Bosch Gmbh Anchors for microelectromechanical systems having an SOI substrate, and method of fabricating same
JP2005142289A (ja) * 2003-11-05 2005-06-02 Toshiba Corp 半導体記憶装置
DE102016110049A1 (de) * 2016-05-31 2017-11-30 Infineon Technologies Ag Ermitteln eines Zustands einer Speicherzelle
KR102544503B1 (ko) 2021-08-06 2023-06-16 고려대학교 산학협력단 아날로그 캐패시터 메모리 회로의 오차 보상 회로

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2633252B2 (ja) * 1987-06-11 1997-07-23 沖電気工業株式会社 半導体記憶装置
JPH02126498A (ja) * 1988-07-08 1990-05-15 Hitachi Ltd 不揮発性半導体記憶装置
US5229963A (en) * 1988-09-21 1993-07-20 Kabushiki Kaisha Toshiba Semiconductor nonvolatile memory device for controlling the potentials on bit lines
JPH0743952B2 (ja) * 1988-11-30 1995-05-15 日本電気株式会社 電源電圧低下検出回路
US5095461A (en) * 1988-12-28 1992-03-10 Kabushiki Kaisha Toshiba Erase circuitry for a non-volatile semiconductor memory device
JPH02233018A (ja) * 1989-03-06 1990-09-14 Nec Corp 出力バッファ
JPH02250425A (ja) * 1989-03-23 1990-10-08 Toshiba Corp 出力バッファ回路
JPH0810728B2 (ja) * 1990-02-01 1996-01-31 株式会社東芝 半導体記憶装置
DE69128635T2 (de) * 1990-09-25 1998-05-20 Toshiba Kawasaki Kk Nicht-flüchtiger halbleiterspeicher
JPH06236694A (ja) * 1991-05-07 1994-08-23 Intel Corp 高電圧レベル変換回路
KR950000496B1 (ko) * 1992-01-30 1995-01-24 삼성전자 주식회사 반도체 메모리 장치의 데이타 출력회로
JPH05276003A (ja) * 1992-03-27 1993-10-22 Nec Corp 出力回路装置

Also Published As

Publication number Publication date
JP3131555B2 (ja) 2001-02-05
EP0698888B1 (de) 2000-05-31
GB9417265D0 (en) 1994-10-19
DE69517264T2 (de) 2000-10-12
EP0698888A1 (de) 1996-02-28
JPH08195096A (ja) 1996-07-30
US5726936A (en) 1998-03-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee