DE69500100D1 - Analoge Spannung-Ausgangsschaltung - Google Patents

Analoge Spannung-Ausgangsschaltung

Info

Publication number
DE69500100D1
DE69500100D1 DE69500100T DE69500100T DE69500100D1 DE 69500100 D1 DE69500100 D1 DE 69500100D1 DE 69500100 T DE69500100 T DE 69500100T DE 69500100 T DE69500100 T DE 69500100T DE 69500100 D1 DE69500100 D1 DE 69500100D1
Authority
DE
Germany
Prior art keywords
test
terminals
output circuit
voltage output
analog voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69500100T
Other languages
English (en)
Other versions
DE69500100T2 (de
Inventor
Sylvie Drouot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE69500100D1 publication Critical patent/DE69500100D1/de
Publication of DE69500100T2 publication Critical patent/DE69500100T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/30—Marginal testing, e.g. by varying supply voltage
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167—Testing of combined analog and digital circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004—Voltage
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69500100T 1994-01-28 1995-01-23 Analoge Spannung-Ausgangsschaltung Expired - Fee Related DE69500100T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9400952A FR2715772B1 (fr) 1994-01-28 1994-01-28 Circuit de sortie de tension analogique.

Publications (2)

Publication Number Publication Date
DE69500100D1 true DE69500100D1 (de) 1997-01-16
DE69500100T2 DE69500100T2 (de) 1997-05-07

Family

ID=9459511

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69500100T Expired - Fee Related DE69500100T2 (de) 1994-01-28 1995-01-23 Analoge Spannung-Ausgangsschaltung

Country Status (5)

Country Link
US (1) US5705934A (de)
EP (1) EP0666481B1 (de)
JP (1) JPH0843496A (de)
DE (1) DE69500100T2 (de)
FR (1) FR2715772B1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6313658B1 (en) * 1998-05-22 2001-11-06 Micron Technology, Inc. Device and method for isolating a short-circuited integrated circuit (IC) from other IC's on a semiconductor wafer
JP3594221B2 (ja) * 1999-01-26 2004-11-24 シャープ株式会社 半導体集積回路装置のテスト回路
JP4109161B2 (ja) * 2003-07-24 2008-07-02 株式会社東芝 半導体装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6455857A (en) * 1987-08-26 1989-03-02 Nec Corp Semiconductor integrated device
US5498972A (en) * 1990-08-15 1996-03-12 Telefonaktiebolaget Lm Ericsson Device for monitoring the supply voltage on integrated circuits
KR930008886B1 (ko) * 1991-08-19 1993-09-16 삼성전자 주식회사 전기적으로 프로그램 할 수 있는 내부전원 발생회로
US5212442A (en) * 1992-03-20 1993-05-18 Micron Technology, Inc. Forced substrate test mode for packaged integrated circuits
US5349590A (en) * 1992-04-10 1994-09-20 Premier Laser Systems, Inc. Medical laser apparatus for delivering high power infrared light
JP3072880B2 (ja) * 1994-06-02 2000-08-07 株式会社アドバンテスト Ｉｃ試験用電圧発生回路

Also Published As

Publication number Publication date
DE69500100T2 (de) 1997-05-07
EP0666481B1 (de) 1996-12-04
FR2715772A1 (fr) 1995-08-04
EP0666481A1 (de) 1995-08-09
US5705934A (en) 1998-01-06
JPH0843496A (ja) 1996-02-16
FR2715772B1 (fr) 1996-07-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee