DE69431981D1 - Fehlerkorrektursysteme mit veränderter Viterbidekodierung - Google Patents

Fehlerkorrektursysteme mit veränderter Viterbidekodierung

Info

Publication number
DE69431981D1
DE69431981D1 DE69431981T DE69431981T DE69431981D1 DE 69431981 D1 DE69431981 D1 DE 69431981D1 DE 69431981 T DE69431981 T DE 69431981T DE 69431981 T DE69431981 T DE 69431981T DE 69431981 D1 DE69431981 D1 DE 69431981D1
Authority
DE
Germany
Prior art keywords
error correction
viterbi decoding
correction systems
modified viterbi
modified
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69431981T
Other languages
English (en)
Other versions
DE69431981T2 (de
Inventor
Richard V Cox
Reed Thorkildsen
Yong Zhou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Publication of DE69431981D1 publication Critical patent/DE69431981D1/de
Application granted granted Critical
Publication of DE69431981T2 publication Critical patent/DE69431981T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4161Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3961Arrangements of methods for branch or transition metric calculation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6569Implementation on processors, e.g. DSPs, or software implementations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6577Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/6583Normalization other than scaling, e.g. by subtraction
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • H04L1/0054Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
  • Dc Digital Transmission (AREA)
DE69431981T 1993-12-22 1994-12-09 Fehlerkorrektursysteme mit veränderter Viterbidekodierung Expired - Fee Related DE69431981T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/173,818 US5539757A (en) 1993-12-22 1993-12-22 Error correction systems with modified Viterbi decoding

Publications (2)

Publication Number Publication Date
DE69431981D1 true DE69431981D1 (de) 2003-02-13
DE69431981T2 DE69431981T2 (de) 2003-11-13

Family

ID=22633627

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69431981T Expired - Fee Related DE69431981T2 (de) 1993-12-22 1994-12-09 Fehlerkorrektursysteme mit veränderter Viterbidekodierung

Country Status (4)

Country Link
US (1) US5539757A (de)
EP (1) EP0660534B1 (de)
JP (1) JP3280183B2 (de)
DE (1) DE69431981T2 (de)

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KR0138875B1 (ko) * 1994-12-23 1998-06-15 양승택 비터비 복호기의 가지 메트릭 모듈
US5901182A (en) * 1997-03-26 1999-05-04 Sharp Laboratories Of America, Inc. Metric sifting in breadth-first decoding of convolutional coded data
US5987638A (en) * 1997-04-22 1999-11-16 Lsi Logic Corporation Apparatus and method for computing the result of a viterbi equation in a single cycle
US6115436A (en) * 1997-12-31 2000-09-05 Ericsson Inc. Non-binary viterbi decoder using butterfly operations
FR2778289B1 (fr) * 1998-05-04 2000-06-09 Alsthom Cge Alcatel Decodage iteratif de codes produits
US6272661B1 (en) * 1998-12-29 2001-08-07 Texas Instruments Incorporated Minimum memory implementation of high speed viterbi decoder
JP2000224054A (ja) * 1999-01-27 2000-08-11 Texas Instr Inc <Ti> ビタビデコ―ディングの速度を増大させる方法と装置
US6910082B1 (en) * 1999-11-18 2005-06-21 International Business Machines Corporation Method, system and program products for reducing data movement within a computing environment by bypassing copying data between file system and non-file system buffers in a server
JP3515720B2 (ja) * 1999-11-22 2004-04-05 松下電器産業株式会社 ビタビ復号器
DE10010238C2 (de) 2000-03-02 2003-12-18 Infineon Technologies Ag Verfahren zum Speichern von Pfadmetriken in einem Viterbi-Decodierer
US6665832B1 (en) 2000-03-31 2003-12-16 Qualcomm, Incorporated Slotted mode decoder state metric initialization
AUPR679301A0 (en) * 2001-08-03 2001-08-30 Lucent Technologies Inc. Arrangement for low power turbo decoding
FI111887B (fi) * 2001-12-17 2003-09-30 Nokia Corp Menetelmä ja järjestely trelliksen läpikäymisen tehostamiseksi
WO2004019498A1 (en) * 2002-08-08 2004-03-04 Telefonaktiebolaget Lm Ericsson (Publ) Convolutional decoder and method for decoding demodulated values
US20050157823A1 (en) * 2004-01-20 2005-07-21 Raghavan Sudhakar Technique for improving viterbi decoder performance
GB0418263D0 (en) * 2004-08-16 2004-09-15 Ttp Communications Ltd Soft decision enhancement
WO2007000708A1 (en) * 2005-06-28 2007-01-04 Koninklijke Philips Electronics N.V. Viterbi decoder and decoding method thereof
US8055979B2 (en) * 2006-01-20 2011-11-08 Marvell World Trade Ltd. Flash memory with coding and signal processing
JP5196567B2 (ja) * 2008-12-02 2013-05-15 日本電気株式会社 演算装置、復号化装置およびメモリ制御方法ならびにプログラム
JP5437874B2 (ja) * 2010-03-26 2014-03-12 富士通株式会社 受信装置および受信方法
CN105610761B (zh) * 2015-12-16 2019-04-09 西安空间无线电技术研究所 一种基于应用层系统级约束的星载gmsk误码率改善系统
US11502715B2 (en) * 2020-04-29 2022-11-15 Eagle Technology, Llc Radio frequency (RF) system including programmable processing circuit performing block coding computations and related methods
US11411593B2 (en) 2020-04-29 2022-08-09 Eagle Technology, Llc Radio frequency (RF) system including programmable processing circuit performing butterfly computations and related methods

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4240156A (en) * 1979-03-29 1980-12-16 Doland George D Concatenated error correcting system
US4631735A (en) * 1984-12-28 1986-12-23 Codex Corporation Coded modulation system with feedback
US4660214A (en) * 1985-08-01 1987-04-21 Infinet, Inc. QANI Trellis-coded signal structure
CA1260143A (en) * 1986-02-24 1989-09-26 Atsushi Yamashita Path trace viterbi decoder
JPS62233933A (ja) * 1986-04-03 1987-10-14 Toshiba Corp ヴイタビ復号法
DE3910739C3 (de) * 1989-04-03 1996-11-21 Deutsche Forsch Luft Raumfahrt Verfahren zum Verallgemeinern des Viterbi-Algorithmus und Einrichtungen zur Durchführung des Verfahrens
US5111483A (en) * 1989-08-07 1992-05-05 Motorola, Inc. Trellis decoder
US5208816A (en) * 1989-08-18 1993-05-04 At&T Bell Laboratories Generalized viterbi decoding algorithms
US5193094A (en) * 1990-03-07 1993-03-09 Qualcomm Incorporated Method and apparatus for generating super-orthogonal convolutional codes and the decoding thereof
FR2669445B1 (fr) * 1990-11-15 1993-01-08 Alcatel Radiotelephone Dispositif prevu pour le traitement de l'algorithme de viterbi comprenant un processeur et un operateur specialise.
US5220570A (en) * 1990-11-30 1993-06-15 The Board Of Trustees Of The Leland Stanford Junior University Programmable viterbi signal processor
US5243605A (en) * 1991-07-11 1993-09-07 Storage Technology Corporation Modified viterbi detector with run-length code constraint
US5229767A (en) * 1991-09-05 1993-07-20 Motorola, Inc. Decoder for convolutionally encoded information
US5291499A (en) * 1992-03-16 1994-03-01 Cirrus Logic, Inc. Method and apparatus for reduced-complexity viterbi-type sequence detectors
US5257272A (en) * 1992-04-15 1993-10-26 International Business Machines Corporation Time-varying modulo N trellis codes for input restricted partial response channels
US5280489A (en) * 1992-04-15 1994-01-18 International Business Machines Corporation Time-varying Viterbi detector for control of error event length
JPH06284018A (ja) * 1993-03-25 1994-10-07 Matsushita Electric Ind Co Ltd ビタビ復号方法および誤り訂正復号化装置
US5349608A (en) * 1993-03-29 1994-09-20 Stanford Telecommunications, Inc. Viterbi ACS unit with renormalization

Also Published As

Publication number Publication date
DE69431981T2 (de) 2003-11-13
JPH07221655A (ja) 1995-08-18
EP0660534A3 (de) 1996-07-24
US5539757A (en) 1996-07-23
EP0660534A2 (de) 1995-06-28
EP0660534B1 (de) 2003-01-08
JP3280183B2 (ja) 2002-04-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee