DE69721028D1 - Fehlerkorrektur mit zwei blockcodes - Google Patents

Fehlerkorrektur mit zwei blockcodes

Info

Publication number
DE69721028D1
DE69721028D1 DE69721028T DE69721028T DE69721028D1 DE 69721028 D1 DE69721028 D1 DE 69721028D1 DE 69721028 T DE69721028 T DE 69721028T DE 69721028 T DE69721028 T DE 69721028T DE 69721028 D1 DE69721028 D1 DE 69721028D1
Authority
DE
Germany
Prior art keywords
error correction
block codes
codes
block
correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69721028T
Other languages
English (en)
Other versions
DE69721028T2 (de
Inventor
E Wang
Sandeep Chennakeshu
Paul Dent
Kumar Balachandran
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ericsson Inc
Original Assignee
Ericsson Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Inc filed Critical Ericsson Inc
Application granted granted Critical
Publication of DE69721028D1 publication Critical patent/DE69721028D1/de
Publication of DE69721028T2 publication Critical patent/DE69721028T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2927—Decoding strategies
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H03M13/2927—Decoding strategies
    • H03M13/293—Decoding strategies with erasure setting
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2942—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes wherein a block of parity bits is computed only from combined information bits or only from parity bits, e.g. a second block of parity bits is computed from a first block of parity bits obtained by systematic encoding of a block of information bits, or a block of parity bits is obtained by an XOR combination of sub-blocks of information bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/3769—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 using symbol combining, e.g. Chase combining of symbols received twice or more
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/1505—Golay Codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/6306—Error control coding in combination with Automatic Repeat reQuest [ARQ] and diversity transmission, e.g. coding schemes for the multiple transmission of the same information or the transmission of incremental redundancy
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
DE69721028T 1996-10-09 1997-09-29 Fehlerkorrektur mit zwei blockcodes Expired - Lifetime DE69721028T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/728,158 US5838267A (en) 1996-10-09 1996-10-09 Method and apparatus for encoding and decoding digital information
PCT/US1997/017436 WO1998016016A2 (en) 1996-10-09 1997-09-29 Error correction with two block codes and error correction with transmission repetition

Publications (2)

Publication Number Publication Date
DE69721028D1 true DE69721028D1 (de) 2003-05-22
DE69721028T2 DE69721028T2 (de) 2003-11-27

Family

ID=24925662

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69721028T Expired - Lifetime DE69721028T2 (de) 1996-10-09 1997-09-29 Fehlerkorrektur mit zwei blockcodes
DE69720544T Expired - Lifetime DE69720544T2 (de) 1996-10-09 1997-09-29 Dekodierung eines Fehlerkorrekturcodes für ARQ-Protokoll

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69720544T Expired - Lifetime DE69720544T2 (de) 1996-10-09 1997-09-29 Dekodierung eines Fehlerkorrekturcodes für ARQ-Protokoll

Country Status (11)

Country Link
US (1) US5838267A (de)
EP (2) EP0931383B1 (de)
JP (1) JP3860218B2 (de)
KR (1) KR100330336B1 (de)
CN (2) CN1102813C (de)
AU (1) AU724590B2 (de)
BR (1) BR9711877A (de)
CA (1) CA2267211A1 (de)
DE (2) DE69721028T2 (de)
TW (1) TW357507B (de)
WO (1) WO1998016016A2 (de)

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US6606727B1 (en) * 1999-10-29 2003-08-12 Stmicroelectronics, Inc. System and method for providing error correction coding with selectively variable redundancy
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US6583735B2 (en) * 2001-02-01 2003-06-24 Nec Corporation Method and apparatus for adaptive bus coding for low power deep sub-micron designs
US20020162071A1 (en) * 2001-02-22 2002-10-31 Chang Shih-Jeh Forward error control of redundantly-transmitted codewords
US6859563B2 (en) * 2001-03-30 2005-02-22 Ricoh Co., Ltd. Method and apparatus for decoding information using late contexts
US7398451B2 (en) * 2001-08-09 2008-07-08 Adaptive Networks, Inc. Error correction process and mechanism
US20030039226A1 (en) * 2001-08-24 2003-02-27 Kwak Joseph A. Physical layer automatic repeat request (ARQ)
US7246294B2 (en) * 2002-04-01 2007-07-17 Intel Corporation Method for iterative hard-decision forward error correction decoding
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US6901083B2 (en) * 2002-10-25 2005-05-31 Qualcomm, Incorporated Method and system for code combining at an outer decoder on a communication system
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US6989776B2 (en) * 2003-11-17 2006-01-24 Seagate Technology Llc Generation of interleaved parity code words having limited running digital sum values
US7418644B2 (en) * 2004-03-01 2008-08-26 Hewlett-Packard Development Company, L.P. System for error correction coding and decoding
KR100989314B1 (ko) * 2004-04-09 2010-10-25 삼성전자주식회사 디스플레이장치
RU2348103C2 (ru) 2004-08-10 2009-02-27 Самсунг Электроникс Ко., Лтд. Устройство и способ кодирования и декодирования блочного кода разреженного контроля четности
US7350131B2 (en) * 2005-01-22 2008-03-25 Cisco Technology, Inc. Error protecting groups of data words
JP4663707B2 (ja) 2005-02-02 2011-04-06 パナソニック株式会社 無線通信システム、インタリーブパターン制御装置およびインタリーブパターン制御方法
WO2007134542A1 (fr) * 2006-05-23 2007-11-29 Huawei Technologies Co., Ltd. Procédé et appareil d'envoi et de réception de signaux
US7685493B2 (en) * 2006-09-29 2010-03-23 Agere Systems Inc. Buffer compression in automatic retransmission request (ARQ) systems
US8374224B2 (en) * 2007-05-24 2013-02-12 Lantiq Deutschland Gmbh Interleaver apparatus and method
CN102932101A (zh) * 2007-07-04 2013-02-13 日本电气株式会社 多载波移动体通信系统
US8423871B2 (en) * 2007-07-13 2013-04-16 Panasonic Corporation Transmitting device and transmitting method
US7900119B2 (en) * 2007-11-30 2011-03-01 Lantiq Deutschland Gmbh Interleaving redundancy apparatus and method
JP4978576B2 (ja) * 2008-07-03 2012-07-18 株式会社Ｊｖｃケンウッド 符号化方法および符号化装置ならびに復号方法および復号装置
WO2011033237A1 (fr) * 2009-09-17 2011-03-24 France Telecom Procede de transmission d'un signal numerique pour un systeme marc avec relais full-duplex, produit programme et dispositif relais correspondants
CN101938331B (zh) * 2010-09-03 2013-06-26 北京全路通信信号研究设计院有限公司 数据通信方法、装置及系统
US8924815B2 (en) * 2011-11-18 2014-12-30 Sandisk Enterprise Ip Llc Systems, methods and devices for decoding codewords having multiple parity segments
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CN103780329B (zh) 2012-10-17 2018-05-04 华为技术有限公司 一种编译码的方法、装置及系统
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Also Published As

Publication number Publication date
CN1240067A (zh) 1999-12-29
CN1102813C (zh) 2003-03-05
EP0998072A1 (de) 2000-05-03
KR100330336B1 (ko) 2002-04-01
AU4655997A (en) 1998-05-05
EP0998072B1 (de) 2003-04-02
BR9711877A (pt) 1999-08-24
EP0931383A2 (de) 1999-07-28
KR20000048678A (ko) 2000-07-25
WO1998016016A2 (en) 1998-04-16
CN1449152A (zh) 2003-10-15
AU724590B2 (en) 2000-09-28
DE69721028T2 (de) 2003-11-27
TW357507B (en) 1999-05-01
DE69720544D1 (de) 2003-05-08
DE69720544T2 (de) 2004-01-15
WO1998016016A3 (en) 1998-06-25
US5838267A (en) 1998-11-17
CA2267211A1 (en) 1998-04-16
JP2001502861A (ja) 2001-02-27
EP0931383B1 (de) 2003-04-16
JP3860218B2 (ja) 2006-12-20

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