DE69431338D1 - Datenverarbeitungssystem mit Busbreite-Wechselfunktion - Google Patents
Datenverarbeitungssystem mit Busbreite-WechselfunktionInfo
- Publication number
- DE69431338D1 DE69431338D1 DE69431338T DE69431338T DE69431338D1 DE 69431338 D1 DE69431338 D1 DE 69431338D1 DE 69431338 T DE69431338 T DE 69431338T DE 69431338 T DE69431338 T DE 69431338T DE 69431338 D1 DE69431338 D1 DE 69431338D1
- Authority
- DE
- Germany
- Prior art keywords
- data processing
- processing system
- bus width
- changing function
- width changing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4009—Coupling between buses with data restructuring
- G06F13/4018—Coupling between buses with data restructuring with data-width conversion
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microcomputers (AREA)
- Memory System (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5333637A JP3060812B2 (ja) | 1993-12-27 | 1993-12-27 | 情報処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69431338D1 true DE69431338D1 (de) | 2002-10-17 |
DE69431338T2 DE69431338T2 (de) | 2003-06-05 |
Family
ID=18268281
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69431338T Expired - Fee Related DE69431338T2 (de) | 1993-12-27 | 1994-12-27 | Datenverarbeitungssystem mit Busbreite-Wechselfunktion |
Country Status (5)
Country | Link |
---|---|
US (1) | US5764950A (de) |
EP (1) | EP0660242B1 (de) |
JP (1) | JP3060812B2 (de) |
KR (1) | KR0155178B1 (de) |
DE (1) | DE69431338T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6732203B2 (en) * | 2000-01-31 | 2004-05-04 | Intel Corporation | Selectively multiplexing memory coupling global bus data bits to narrower functional unit coupling local bus |
US7117376B2 (en) | 2000-12-28 | 2006-10-03 | Intel Corporation | Platform and method of creating a secure boot that enforces proper user authentication and enforces hardware configurations |
US20040078608A1 (en) * | 2001-04-02 | 2004-04-22 | Ruban Kanapathippillai | Method and apparatus for power reduction in a digital signal processor integrated circuit |
KR100475125B1 (ko) * | 2003-06-21 | 2005-03-14 | 삼성전자주식회사 | 데이터 버스 폭 변경이 자유로운 이동형 저장 장치 및이에 대한 데이터 버스 폭 설정 방법 |
JP2008046993A (ja) * | 2006-08-18 | 2008-02-28 | Fujitsu Ltd | 半導体装置およびバス間接続方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603226A (ja) * | 1983-06-21 | 1985-01-09 | Fuji Electric Co Ltd | 近接スイツチ |
US4716527A (en) * | 1984-12-10 | 1987-12-29 | Ing. C. Olivetti | Bus converter |
US4831514A (en) * | 1986-02-14 | 1989-05-16 | Dso "Izot" | Method and device for connecting a 16-bit microprocessor to 8-bit modules |
US5307469A (en) * | 1989-05-05 | 1994-04-26 | Wang Laboratories, Inc. | Multiple mode memory module |
JPH0398145A (ja) * | 1989-09-11 | 1991-04-23 | Hitachi Ltd | マイクロプロセッサ |
DE69034165T2 (de) * | 1990-07-20 | 2005-09-22 | Infineon Technologies Ag | Mikroprozessor mit einer Vielzahl von Buskonfigurationen |
JPH04241651A (ja) * | 1991-01-16 | 1992-08-28 | Nec Corp | マイクロコンピュータ |
JP2969966B2 (ja) * | 1991-01-21 | 1999-11-02 | 松下電器産業株式会社 | マイクロ波乾燥装置 |
JPH05174164A (ja) * | 1991-12-19 | 1993-07-13 | Nec Corp | マイクロ・コンピュータ |
US5335340A (en) * | 1992-05-29 | 1994-08-02 | The Whitaker Corporation | Byte-swap hardware simulator for a sixteen bit microprocessor coupled to an eight bit peripheral unit |
-
1993
- 1993-12-27 JP JP5333637A patent/JP3060812B2/ja not_active Expired - Lifetime
-
1994
- 1994-12-27 KR KR1019940037219A patent/KR0155178B1/ko not_active IP Right Cessation
- 1994-12-27 DE DE69431338T patent/DE69431338T2/de not_active Expired - Fee Related
- 1994-12-27 EP EP94120672A patent/EP0660242B1/de not_active Expired - Lifetime
- 1994-12-27 US US08/363,824 patent/US5764950A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0660242A1 (de) | 1995-06-28 |
KR950020178A (ko) | 1995-07-24 |
US5764950A (en) | 1998-06-09 |
EP0660242B1 (de) | 2002-09-11 |
KR0155178B1 (ko) | 1998-11-16 |
JP3060812B2 (ja) | 2000-07-10 |
DE69431338T2 (de) | 2003-06-05 |
JPH07191905A (ja) | 1995-07-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |