DE69430035T2 - CMOS-Schaltung zum Ausführen von bollescher Funktionen - Google Patents
CMOS-Schaltung zum Ausführen von bollescher FunktionenInfo
- Publication number
- DE69430035T2 DE69430035T2 DE69430035T DE69430035T DE69430035T2 DE 69430035 T2 DE69430035 T2 DE 69430035T2 DE 69430035 T DE69430035 T DE 69430035T DE 69430035 T DE69430035 T DE 69430035T DE 69430035 T2 DE69430035 T2 DE 69430035T2
- Authority
- DE
- Germany
- Prior art keywords
- bollean
- functions
- cmos circuit
- cmos
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/096—Synchronous circuits, i.e. using clock signals
- H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/152,764 US5455528A (en) | 1993-11-15 | 1993-11-15 | CMOS circuit for implementing Boolean functions |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69430035D1 DE69430035D1 (de) | 2002-04-11 |
DE69430035T2 true DE69430035T2 (de) | 2002-10-31 |
Family
ID=22544334
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69430035T Expired - Fee Related DE69430035T2 (de) | 1993-11-15 | 1994-11-05 | CMOS-Schaltung zum Ausführen von bollescher Funktionen |
Country Status (3)
Country | Link |
---|---|
US (1) | US5455528A (de) |
EP (1) | EP0653844B1 (de) |
DE (1) | DE69430035T2 (de) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW265489B (en) * | 1994-07-20 | 1995-12-11 | Micron Technology Inc | Low-to-high voltage cmos driver circuit for driving capacitive loads |
US5883538A (en) * | 1996-11-13 | 1999-03-16 | Micron Technology, Inc. | Low-to-high voltage CMOS driver circuit for driving capacitive loads |
US5541536A (en) * | 1995-03-01 | 1996-07-30 | Sun Microsystems, Inc. | Rubberband logic |
US5925913A (en) * | 1997-08-25 | 1999-07-20 | Advanced Micro Devices, Inc. | System for enhancing the performance of a circuit by reducing the channel length of one or more transistors |
US6091259A (en) * | 1997-08-29 | 2000-07-18 | Sun Microsystems, Inc. | Apparatus for accelerating digital signal transitions using a transition acceleration circuit and a transition termination circuit |
US6097222A (en) * | 1997-10-27 | 2000-08-01 | Cypress Semiconductor Corp. | Symmetrical NOR gates |
US6046608A (en) * | 1997-12-08 | 2000-04-04 | Intel Corporation | Differential precharge circuit |
JPH11186506A (ja) * | 1997-12-24 | 1999-07-09 | Mitsubishi Electric Corp | 集積回路 |
US6580296B1 (en) | 2000-09-22 | 2003-06-17 | Rn2R, L.L.C. | Low power differential conductance-based logic gate and method of operation thereof |
US6522189B1 (en) | 2000-10-02 | 2003-02-18 | Broadcom Corporation | High-speed bank select multiplexer latch |
US6717441B2 (en) * | 2001-10-22 | 2004-04-06 | Intel Corporation | Flash [II]-Domino: a fast dual-rail dynamic logic style |
US6806737B2 (en) * | 2002-03-21 | 2004-10-19 | Raymond Jit-Hung Sung | Bi-directional amplifier and method for accelerated bus line communication |
US6674671B1 (en) | 2002-08-14 | 2004-01-06 | Broadcom Corp. | Circuit for lines with multiple drivers |
JP2007504734A (ja) * | 2003-09-03 | 2007-03-01 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | スタティックラッチ |
EP2489127B1 (de) * | 2009-10-14 | 2022-11-30 | Chaologix, Inc. | Universelles logikarray von hoher verwendbarkeit mit variabler schaltungstopologie und logistikzuordungsschaltung zur erstellung verschiedener logikgates mit konstanten leistungssignaturen |
DE102019123539A1 (de) * | 2019-09-03 | 2021-03-04 | Infineon Technologies Ag | Halbleiterchip |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4112296A (en) * | 1977-06-07 | 1978-09-05 | Rockwell International Corporation | Data latch |
US4367420A (en) * | 1980-06-02 | 1983-01-04 | Thompson Foss Incorporated | Dynamic logic circuits operating in a differential mode for array processing |
JPH0713878B2 (ja) * | 1985-06-20 | 1995-02-15 | 三菱電機株式会社 | Cmosトランジスタ回路 |
US4654547A (en) * | 1985-06-28 | 1987-03-31 | Itt Corporation | Balanced enhancement/depletion mode gallium arsenide buffer/comparator circuit |
US4692639A (en) * | 1985-12-23 | 1987-09-08 | General Datacomm., Inc. | Regenerative strobe circuit for CMOS programmable logic array |
FR2596595B1 (fr) * | 1986-03-28 | 1988-05-13 | Radiotechnique Compelec | Porte logique mos du type domino |
KR900008022B1 (ko) * | 1986-10-16 | 1990-10-29 | 페어차일드 세미콘덕터 코퍼레이션 | 동기배열논리회로 및 시스템 |
JPS6491221A (en) * | 1987-09-30 | 1989-04-10 | Sharp Kk | Connecting circuit for precharging bus |
US5023480A (en) * | 1990-01-04 | 1991-06-11 | Digital Equipment Corporation | Push-pull cascode logic |
US5045723A (en) * | 1990-07-31 | 1991-09-03 | International Business Machines Corporation | Multiple input CMOS logic circuits |
US5153451A (en) * | 1991-08-19 | 1992-10-06 | Motorola, Inc. | Fail safe level shifter |
US5508640A (en) * | 1993-09-14 | 1996-04-16 | Intergraph Corporation | Dynamic CMOS logic circuit with precharge |
-
1993
- 1993-11-15 US US08/152,764 patent/US5455528A/en not_active Expired - Fee Related
-
1994
- 1994-11-05 EP EP94117488A patent/EP0653844B1/de not_active Expired - Lifetime
- 1994-11-05 DE DE69430035T patent/DE69430035T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0653844A3 (de) | 1996-04-03 |
EP0653844B1 (de) | 2002-03-06 |
US5455528A (en) | 1995-10-03 |
DE69430035D1 (de) | 2002-04-11 |
EP0653844A2 (de) | 1995-05-17 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: INTERGRAPH HARDWARE TECHNOLOGIES CO., LAS VEGAS, N |
|
8339 | Ceased/non-payment of the annual fee |