DE69429525D1 - Programmierbarer redundanz/syndromgenerator - Google Patents

Programmierbarer redundanz/syndromgenerator

Info

Publication number
DE69429525D1
DE69429525D1 DE69429525T DE69429525T DE69429525D1 DE 69429525 D1 DE69429525 D1 DE 69429525D1 DE 69429525 T DE69429525 T DE 69429525T DE 69429525 T DE69429525 T DE 69429525T DE 69429525 D1 DE69429525 D1 DE 69429525D1
Authority
DE
Germany
Prior art keywords
programmable
syndrome generator
syndromes
order
programmable redundancy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69429525T
Other languages
English (en)
Other versions
DE69429525T2 (de
Inventor
P Zook
Neal Glover
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cirrus Logic Inc
Original Assignee
Cirrus Logic Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cirrus Logic Inc filed Critical Cirrus Logic Inc
Publication of DE69429525D1 publication Critical patent/DE69429525D1/de
Application granted granted Critical
Publication of DE69429525T2 publication Critical patent/DE69429525T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
DE69429525T 1993-09-21 1994-09-20 Programmierbarer redundanz/syndromgenerator Expired - Fee Related DE69429525T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/124,938 US5473620A (en) 1993-09-21 1993-09-21 Programmable redundancy/syndrome generator
PCT/US1994/010668 WO1995008803A2 (en) 1993-09-21 1994-09-20 Programmable redundancy/syndrome generator

Publications (2)

Publication Number Publication Date
DE69429525D1 true DE69429525D1 (de) 2002-01-31
DE69429525T2 DE69429525T2 (de) 2002-07-18

Family

ID=22417508

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69429525T Expired - Fee Related DE69429525T2 (de) 1993-09-21 1994-09-20 Programmierbarer redundanz/syndromgenerator

Country Status (7)

Country Link
US (2) US5473620A (de)
EP (1) EP0720759B1 (de)
JP (1) JPH09505952A (de)
KR (1) KR960705272A (de)
DE (1) DE69429525T2 (de)
SG (1) SG46513A1 (de)
WO (1) WO1995008803A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5768296A (en) * 1994-07-01 1998-06-16 Quantum Corporation ECC system supporting different-length Reed-Solomon codes whose generator polynomials have common roots
JP3260630B2 (ja) * 1996-07-31 2002-02-25 エヌイーシーマイクロシステム株式会社 定数除算器及び定数除算方法
JPH11196006A (ja) * 1997-12-26 1999-07-21 Nec Corp 並列処理シンドロ−ム計算回路及びリ−ド・ソロモン複合化回路
US6026420A (en) * 1998-01-20 2000-02-15 3Com Corporation High-speed evaluation of polynomials
US6058500A (en) 1998-01-20 2000-05-02 3Com Corporation High-speed syndrome calculation
US6029186A (en) * 1998-01-20 2000-02-22 3Com Corporation High speed calculation of cyclical redundancy check sums
GB9815618D0 (en) 1998-07-18 1998-09-16 Univ Manchester Treatment of dyskinesia
EP1146650A1 (de) * 2000-04-10 2001-10-17 Hewlett-Packard Company, A Delaware Corporation Fehlerkorrektur für Datenauzeichnung und Übertragung
US20020104053A1 (en) * 2000-12-15 2002-08-01 Mike Lei In-band FEC encoder for sonet
JP4856848B2 (ja) * 2001-10-11 2012-01-18 アルテラ コーポレイション プログラマブルロジックリソース上のエラー検出
US7219289B2 (en) * 2005-03-15 2007-05-15 Tandberg Data Corporation Multiply redundant raid system and XOR-efficient method and apparatus for implementing the same
US8527851B2 (en) * 2008-08-04 2013-09-03 Lsi Corporation System and method for using the universal multipole for the implementation of a configurable binary Bose-Chaudhuri-Hocquenghem (BCH) encoder with variable number of errors
US8464141B2 (en) 2008-08-13 2013-06-11 Infineon Technologies Ag Programmable error correction capability for BCH codes

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0159403A3 (de) * 1984-04-27 1987-11-11 Siemens Aktiengesellschaft Anordnung zur Korrektur von Bündelfehlern in verkürzten zyklischen Blockcodes
JPS62180617A (ja) * 1986-02-04 1987-08-07 Victor Co Of Japan Ltd パリテイ生成回路
US4777635A (en) * 1986-08-08 1988-10-11 Data Systems Technology Corp. Reed-Solomon code encoder and syndrome generator circuit
JPS6356022A (ja) * 1986-08-26 1988-03-10 Victor Co Of Japan Ltd デイジタル記録再生装置
JP2556495B2 (ja) * 1986-12-26 1996-11-20 キヤノン株式会社 符号処理装置
US5325373A (en) * 1986-12-22 1994-06-28 Canon Kabushiki Kaisha Apparatus for encoding and decoding reed-solomon code
JPS63186338A (ja) * 1987-01-28 1988-08-01 Nec Corp 誤り訂正回路
US4782490A (en) * 1987-03-16 1988-11-01 Cythera Corporation Method and a system for multiple error detection and correction
US5107503A (en) * 1987-08-24 1992-04-21 Digital Equipment Corporation High bandwidth reed-solomon encoding, decoding and error correcting circuit
US4868828A (en) * 1987-10-05 1989-09-19 California Institute Of Technology Architecture for time or transform domain decoding of reed-solomon codes
EP0431629A3 (en) * 1989-12-08 1993-07-21 Sony Corporation Mutual division circuit
US5243604A (en) * 1990-12-18 1993-09-07 Seagate Technology, Inc. On-the-fly error correction
JP2662472B2 (ja) * 1991-06-13 1997-10-15 シャープ株式会社 誤り訂正処理用シンドローム演算回路
US5442578A (en) * 1991-12-12 1995-08-15 Sony Corporation Calculating circuit for error correction
US5444719A (en) * 1993-01-26 1995-08-22 International Business Machines Corporation Adjustable error-correction composite Reed-Solomon encoder/syndrome generator
JP2694792B2 (ja) * 1993-01-27 1997-12-24 日本電気株式会社 誤り位置多項式演算回路
JP2605966B2 (ja) * 1993-02-12 1997-04-30 日本電気株式会社 誤り訂正回路
DE69414631T2 (de) * 1993-03-31 1999-04-08 Kabushiki Kaisha Toshiba, Kawasaki, Kanagawa Schaltung zur Durchführung des Euclidschen Algorithmus bei der Dekodierung Arithmetischer Kodes
US5465260A (en) * 1993-11-04 1995-11-07 Cirrus Logic, Inc. Dual purpose cyclic redundancy check

Also Published As

Publication number Publication date
WO1995008803A3 (en) 1995-04-13
EP0720759B1 (de) 2001-12-19
EP0720759A4 (de) 1997-01-22
SG46513A1 (en) 1998-02-20
US5822337A (en) 1998-10-13
DE69429525T2 (de) 2002-07-18
EP0720759A1 (de) 1996-07-10
KR960705272A (ko) 1996-10-09
JPH09505952A (ja) 1997-06-10
WO1995008803A2 (en) 1995-03-30
US5473620A (en) 1995-12-05

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee