NO924916L - Koderings- og dekoderingsanordning for feilkorreksjon - Google Patents

Koderings- og dekoderingsanordning for feilkorreksjon

Info

Publication number
NO924916L
NO924916L NO92924916A NO924916A NO924916L NO 924916 L NO924916 L NO 924916L NO 92924916 A NO92924916 A NO 92924916A NO 924916 A NO924916 A NO 924916A NO 924916 L NO924916 L NO 924916L
Authority
NO
Norway
Prior art keywords
encoded
data
block
generator polynomial
decoding device
Prior art date
Application number
NO92924916A
Other languages
English (en)
Other versions
NO924916D0 (no
Inventor
Susumu Furushima
Nobuo Asano
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of NO924916D0 publication Critical patent/NO924916D0/no
Publication of NO924916L publication Critical patent/NO924916L/no

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0065—Serial concatenated codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Artificial Intelligence (AREA)
  • Error Detection And Correction (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)

Abstract

Fellkorreksjons-kodlngs- og dekodingsanordnlng som utfører blokkdekodlng av kodet iformasjonsdata på basis av et generatorpolynom. Ved en sendestasjon blir hver ramme med informasjonsdata kodet i en blokk-kodet data ved hjelp av en blokk-koder ved bruk av et generator- polynom G(x), og, etter tillegging av en endebit til kodet data, blir dataen kodet av en omhyllingskoder til en omhylllngskodet data og videresendt. Ved en mottakerstasjon blir mottatt omhyllingskodet data dekodet i en Viterbi-dekoder i en revers rekkefølge ved hjelp av en tilbakefølging, og dekodet data blir så utsatt for blokkdekoding ved hjelp av en blokkdekoder ved bruk av et resiprokt polynom G'(x), som er resiprositeten av generatorpolynomet G(x) anvendt i blokk-koderen, for derved å minimalisere en uønsket forsinkelse i behandlingen som følge av tllbakefølg- ingen.
NO92924916A 1991-12-25 1992-12-18 Koderings- og dekoderingsanordning for feilkorreksjon NO924916L (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34264591A JPH05175852A (ja) 1991-12-25 1991-12-25 誤り訂正符復号装置

Publications (2)

Publication Number Publication Date
NO924916D0 NO924916D0 (no) 1992-12-18
NO924916L true NO924916L (no) 1993-06-28

Family

ID=18355384

Family Applications (1)

Application Number Title Priority Date Filing Date
NO92924916A NO924916L (no) 1991-12-25 1992-12-18 Koderings- og dekoderingsanordning for feilkorreksjon

Country Status (3)

Country Link
EP (1) EP0551646A3 (no)
JP (1) JPH05175852A (no)
NO (1) NO924916L (no)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2208660C (en) * 1996-07-19 2002-09-17 Takashi Suzuki Data transmission device
JP3312363B2 (ja) * 1996-12-27 2002-08-05 株式会社エヌ・ティ・ティ・ドコモ 符号化装置および復号化装置および符号化復号化システム並びに方法
US6272187B1 (en) * 1998-03-27 2001-08-07 Lsi Logic Corporation Device and method for efficient decoding with time reversed data
JP4071879B2 (ja) * 1998-12-09 2008-04-02 富士通株式会社 誤り検出器、この誤り検出器を備えた通信システム、および誤り検出方法
DE19940666C2 (de) * 1999-08-27 2003-02-20 Bosch Gmbh Robert Verfahren und Vorrichtung zur Dekodierung von über einen Übertragungskanal übertragenen kanalkodierten Daten
WO2008023571A1 (fr) * 2006-08-21 2008-02-28 Panasonic Corporation Appareil de correction d'erreur, circuit intégré et procédé de correction d'erreur
GB2585271B (en) * 2019-07-01 2022-04-13 Accelercomm Ltd Cyclic redundancy check computation circuit, communication unit, and method therefor

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62180617A (ja) * 1986-02-04 1987-08-07 Victor Co Of Japan Ltd パリテイ生成回路
US4907233A (en) * 1988-05-18 1990-03-06 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration VLSI single-chip (255,223) Reed-Solomon encoder with interleaver

Also Published As

Publication number Publication date
EP0551646A3 (en) 1993-08-11
EP0551646A2 (en) 1993-07-21
NO924916D0 (no) 1992-12-18
JPH05175852A (ja) 1993-07-13

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