JPS5760753A - Correcting system for error of block code - Google Patents

Correcting system for error of block code

Info

Publication number
JPS5760753A
JPS5760753A JP13538180A JP13538180A JPS5760753A JP S5760753 A JPS5760753 A JP S5760753A JP 13538180 A JP13538180 A JP 13538180A JP 13538180 A JP13538180 A JP 13538180A JP S5760753 A JPS5760753 A JP S5760753A
Authority
JP
Japan
Prior art keywords
register
error
syndrome
operating
block code
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13538180A
Other languages
Japanese (ja)
Other versions
JPS6144416B2 (en
Inventor
Takeshi Hattori
Katsuya Kaneko
Kensho Yoshikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP13538180A priority Critical patent/JPS5760753A/en
Publication of JPS5760753A publication Critical patent/JPS5760753A/en
Publication of JPS6144416B2 publication Critical patent/JPS6144416B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/17—Burst error correction, e.g. error trapping, Fire codes

Abstract

PURPOSE:To obtain an error position efficiently to shorten the correction time, by shifting a syndrome operating register by every parity bits in order cyclically after obtaining a syndrome to check and correct the error. CONSTITUTION:A shift register 3 having the number of stages which is equal to the degree of a generator polynomial to be divisor, a syndrome operating register including the number of exclusive OR circuits which corresponds to coefficients of the polynomial, a receiving code accumulating register 6 where a received block code is accumulated, and a control circuit 5 which controls the register 6 and the operating register are provided to constitute an error correcting system. A switch SW is closed by the circuit 5, and clocks CL1 and CL2 of a speed equal to the receiving speed are given until all bits of the receiving block code are inputted to the register 6 and the operating register. After all bits are taken in, a syndrome is obtained, and the operating register is shifted in order cyclically by every parity bits to check and correct an error, thus obtaining the error position efficiently.
JP13538180A 1980-09-27 1980-09-27 Correcting system for error of block code Granted JPS5760753A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13538180A JPS5760753A (en) 1980-09-27 1980-09-27 Correcting system for error of block code

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13538180A JPS5760753A (en) 1980-09-27 1980-09-27 Correcting system for error of block code

Publications (2)

Publication Number Publication Date
JPS5760753A true JPS5760753A (en) 1982-04-12
JPS6144416B2 JPS6144416B2 (en) 1986-10-02

Family

ID=15150372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13538180A Granted JPS5760753A (en) 1980-09-27 1980-09-27 Correcting system for error of block code

Country Status (1)

Country Link
JP (1) JPS5760753A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008074241A1 (en) * 2006-12-20 2008-06-26 Huawei Technologies Co., Ltd. An error detection, error correction method and apparatus for the synchronization frame

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0789021B2 (en) * 1987-05-29 1995-09-27 井関農機株式会社 Motor controller for grain dryer

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008074241A1 (en) * 2006-12-20 2008-06-26 Huawei Technologies Co., Ltd. An error detection, error correction method and apparatus for the synchronization frame
US8448055B2 (en) 2006-12-20 2013-05-21 Huawei Technologies Co., Ltd. Methods and apparatuses for performing error detection and error correction for synchronization frame

Also Published As

Publication number Publication date
JPS6144416B2 (en) 1986-10-02

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