DE69428645D1 - Datenbussteuerung mit Pegeleinstellungsschaltung - Google Patents

Datenbussteuerung mit Pegeleinstellungsschaltung

Info

Publication number
DE69428645D1
DE69428645D1 DE69428645T DE69428645T DE69428645D1 DE 69428645 D1 DE69428645 D1 DE 69428645D1 DE 69428645 T DE69428645 T DE 69428645T DE 69428645 T DE69428645 T DE 69428645T DE 69428645 D1 DE69428645 D1 DE 69428645D1
Authority
DE
Germany
Prior art keywords
data bus
adjustment circuit
level adjustment
bus control
level
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69428645T
Other languages
English (en)
Other versions
DE69428645T2 (de
Inventor
Hitoshi Kasugai-Shi Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE69428645D1 publication Critical patent/DE69428645D1/de
Publication of DE69428645T2 publication Critical patent/DE69428645T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
DE69428645T 1993-07-20 1994-06-17 Datenbussteuerung mit Pegeleinstellungsschaltung Expired - Lifetime DE69428645T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17939693A JP3483594B2 (ja) 1993-07-20 1993-07-20 半導体装置

Publications (2)

Publication Number Publication Date
DE69428645D1 true DE69428645D1 (de) 2001-11-22
DE69428645T2 DE69428645T2 (de) 2002-04-25

Family

ID=16065138

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69428645T Expired - Lifetime DE69428645T2 (de) 1993-07-20 1994-06-17 Datenbussteuerung mit Pegeleinstellungsschaltung

Country Status (5)

Country Link
US (1) US5841995A (de)
EP (1) EP0635791B1 (de)
JP (1) JP3483594B2 (de)
KR (1) KR0121804B1 (de)
DE (1) DE69428645T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09204243A (ja) * 1996-01-29 1997-08-05 Fujitsu Ltd データ転送方法
JP3033550B2 (ja) * 1998-01-13 2000-04-17 三菱電機株式会社 Ｓｃｓｉインタフェース接続装置、ｓｃｓｉコントローラ、ｓｃｓｉケーブル及びｓｃｓｉバックプレーン
DE10345384B3 (de) * 2003-09-30 2005-03-24 Infineon Technologies Ag Schaltungssystem
JP2006197374A (ja) * 2005-01-14 2006-07-27 Fujitsu Ltd データバス回路
US10425361B2 (en) 2017-03-16 2019-09-24 Trane International Inc. Dynamic allocation of termination resistors in a communication network

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4450370A (en) * 1979-01-31 1984-05-22 Phillips Petroleum Company Active termination for a transmission line
JPS56116147A (en) * 1980-02-20 1981-09-11 Hitachi Ltd Digital semiconductor integrated circuit and digital control system using it
JPS61139866A (ja) * 1984-12-11 1986-06-27 Toshiba Corp マイクロプロセツサ
US4788693A (en) * 1985-09-30 1988-11-29 American Telephone And Telegraph Company, At&T Bell Laboratories Data communication replicator
US4748426A (en) * 1986-11-07 1988-05-31 Rodime Plc Active termination circuit for computer interface use
US4866309A (en) * 1988-07-18 1989-09-12 Western Digital Corporation Multiplexed bus architecture for configuration sensing
US5119498A (en) * 1989-06-12 1992-06-02 International Business Machines Corporation Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact
JPH04318612A (ja) * 1991-04-18 1992-11-10 Hitachi Ltd バス制御方式
US5120909A (en) * 1991-04-26 1992-06-09 Ag Communication Systems Corporation Terminating devices detection and verification circuit
US5382841A (en) * 1991-12-23 1995-01-17 Motorola, Inc. Switchable active bus termination circuit
US5381034A (en) * 1992-04-27 1995-01-10 Dallas Semiconductor Corporation SCSI terminator
US5313595A (en) * 1992-12-10 1994-05-17 Digital Equipment Corporation Automatic signal termination system for a computer bus
US5434516A (en) * 1993-07-09 1995-07-18 Future Domain Corporation Automatic SCSI termination circuit
US5422580A (en) * 1993-10-14 1995-06-06 Aps Technologies Switchable active termination for SCSI peripheral devices

Also Published As

Publication number Publication date
JPH0736826A (ja) 1995-02-07
KR950004007A (ko) 1995-02-17
KR0121804B1 (ko) 1997-11-22
EP0635791A3 (en) 1995-03-01
DE69428645T2 (de) 2002-04-25
EP0635791A2 (de) 1995-01-25
JP3483594B2 (ja) 2004-01-06
US5841995A (en) 1998-11-24
EP0635791B1 (de) 2001-10-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

Owner name: FUJITSU VLSI LTD., KASUGAI, AICHI, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

Owner name: FUJITSU VLSI LTD., KASUGAI, AICHI, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE