DE69422113D1 - DRAM-Steuerschaltung - Google Patents

DRAM-Steuerschaltung

Info

Publication number
DE69422113D1
DE69422113D1 DE69422113T DE69422113T DE69422113D1 DE 69422113 D1 DE69422113 D1 DE 69422113D1 DE 69422113 T DE69422113 T DE 69422113T DE 69422113 T DE69422113 T DE 69422113T DE 69422113 D1 DE69422113 D1 DE 69422113D1
Authority
DE
Germany
Prior art keywords
control circuit
dram control
dram
circuit
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69422113T
Other languages
English (en)
Other versions
DE69422113T2 (de
Inventor
Osamu Ishikawa
Toshikazu Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69422113D1 publication Critical patent/DE69422113D1/de
Publication of DE69422113T2 publication Critical patent/DE69422113T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE69422113T 1993-09-17 1994-09-13 DRAM-Steuerschaltung Expired - Fee Related DE69422113T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23164193 1993-09-17

Publications (2)

Publication Number Publication Date
DE69422113D1 true DE69422113D1 (de) 2000-01-20
DE69422113T2 DE69422113T2 (de) 2000-06-15

Family

ID=16926686

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69422113T Expired - Fee Related DE69422113T2 (de) 1993-09-17 1994-09-13 DRAM-Steuerschaltung

Country Status (4)

Country Link
US (1) US5574884A (de)
EP (1) EP0644550B1 (de)
KR (1) KR100229260B1 (de)
DE (1) DE69422113T2 (de)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5951073B2 (ja) * 1980-03-27 1984-12-12 富士通株式会社 半導体記憶装置
US5270970A (en) * 1991-03-15 1993-12-14 Motorola, Inc. Memory device having a buffer for gating data transmissions
EP0553338B1 (de) * 1991-08-16 1999-10-13 Cypress Semiconductor Corp. Dynamisches hochleistungsspeichersystem
DE69228980T2 (de) * 1991-12-06 1999-12-02 Nat Semiconductor Corp Integriertes Datenverarbeitungssystem mit CPU-Kern und unabhängigem parallelen, digitalen Signalprozessormodul
JP3283362B2 (ja) * 1993-10-15 2002-05-20 松下電器産業株式会社 半導体装置
US5488691A (en) * 1993-11-17 1996-01-30 International Business Machines Corporation Memory card, computer system and method of operation for differentiating the use of read-modify-write cycles in operating and initializaiton modes

Also Published As

Publication number Publication date
DE69422113T2 (de) 2000-06-15
EP0644550A3 (de) 1995-11-15
US5574884A (en) 1996-11-12
EP0644550A2 (de) 1995-03-22
EP0644550B1 (de) 1999-12-15
KR950009719A (ko) 1995-04-24
KR100229260B1 (ko) 1999-11-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee